2424int MXC_TMR_Init (mxc_tmr_regs_t * tmr , mxc_tmr_cfg_t * cfg , bool init_pins )
2525{
2626 int tmr_id = MXC_TMR_GET_IDX (tmr );
27+ (void )tmr_id ;
2728 uint8_t clockSource = MXC_TMR_CLK0 ;
2829
2930 if (cfg == NULL ) {
@@ -34,48 +35,17 @@ int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg, bool init_pins)
3435
3536 switch (cfg -> clock ) {
3637 case MXC_TMR_IBRO_CLK :
37- if (tmr_id > 3 ) { // Timers 4-5 do not support this clock source
38- return E_NOT_SUPPORTED ;
39- }
40-
41- clockSource = MXC_TMR_CLK2 ;
42- MXC_SYS_ClockSourceEnable (MXC_SYS_CLOCK_IBRO );
43- MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , IBRO_FREQ );
44- break ;
45-
46- case MXC_TMR_IBRO_DIV8_CLK :
47- if (tmr_id != 5 ) { // Only timer 5 supports this clock source
48- return E_NOT_SUPPORTED ;
49- }
50-
5138 clockSource = MXC_TMR_CLK1 ;
5239 MXC_SYS_ClockSourceEnable (MXC_SYS_CLOCK_IBRO );
53- MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , ( IBRO_FREQ / 8 ) );
40+ MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , IBRO_FREQ );
5441 break ;
5542
5643 case MXC_TMR_ERTCO_CLK :
57- if (tmr_id == 4 ) {
58- clockSource = MXC_TMR_CLK1 ;
59- } else if (tmr_id < 4 ) {
60- clockSource = MXC_TMR_CLK3 ;
61- } else { // Timers 5 do not support this clock source
62- return E_NOT_SUPPORTED ;
63- }
64-
44+ clockSource = MXC_TMR_CLK2 ;
6545 MXC_SYS_ClockSourceEnable (MXC_SYS_CLOCK_ERTCO );
6646 MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , ERTCO_FREQ );
6747 break ;
6848
69- case MXC_TMR_INRO_CLK :
70- if (tmr_id < 4 ) { // Timers 0-3 do not support this clock source
71- return E_NOT_SUPPORTED ;
72- }
73-
74- clockSource = MXC_TMR_CLK2 ;
75- MXC_SYS_ClockSourceEnable (MXC_SYS_CLOCK_INRO );
76- MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , INRO_FREQ );
77- break ;
78-
7949 default :
8050 MXC_TMR_RevB_SetClockSourceFreq ((mxc_tmr_revb_regs_t * )tmr , PeripheralClock );
8151 break ;
@@ -218,49 +188,25 @@ uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, mxc_tmr_clock_t clock, uint32_t
218188{
219189 uint32_t clockFrequency = PeripheralClock ;
220190 int tmr_id = MXC_TMR_GET_IDX (tmr );
191+ (void )tmr_id ;
221192
222193 MXC_ASSERT (tmr_id >= 0 );
223194
224- if (tmr_id > 3 ) {
225- switch (clock ) {
226- case MXC_TMR_APB_CLK :
227- clockFrequency = IBRO_FREQ ;
228- break ;
229-
230- #if (TARGET_NUM != 32680 )
231- case MXC_TMR_ERTCO_CLK :
232- clockFrequency = ERTCO_FREQ ;
233- break ;
234- #endif
195+ switch (clock ) {
196+ case MXC_TMR_APB_CLK :
197+ clockFrequency = PeripheralClock ;
198+ break ;
235199
236- case MXC_TMR_INRO_CLK :
237- clockFrequency = INRO_FREQ ;
238- break ;
200+ case MXC_TMR_IBRO_CLK :
201+ clockFrequency = IBRO_FREQ ;
202+ break ;
239203
240- case MXC_TMR_IBRO_DIV8_CLK :
241- clockFrequency = IBRO_FREQ / 8 ;
242- break ;
204+ case MXC_TMR_ERTCO_CLK :
205+ clockFrequency = ERTCO_FREQ ;
206+ break ;
243207
244- default :
245- break ;
246- }
247- } else {
248- switch (clock ) {
249- case MXC_TMR_APB_CLK :
250- clockFrequency = PeripheralClock ;
251- break ;
252-
253- case MXC_TMR_IBRO_CLK :
254- clockFrequency = IBRO_FREQ ;
255- break ;
256-
257- case MXC_TMR_ERTCO_CLK :
258- clockFrequency = ERTCO_FREQ ;
259- break ;
260-
261- default :
262- break ;
263- }
208+ default :
209+ break ;
264210 }
265211
266212 return MXC_TMR_RevB_GetPeriod ((mxc_tmr_revb_regs_t * )tmr , clockFrequency , prescalar , frequency );
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