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fix(adrv937x): correct ZC706+AD9371 GPIO numbers + wire AD9528 reset
The builder was wiring the AD9371 reset/sysref_req lines to GPIOs 130/136 — which is the ZCU102+ADRV9009 pinout, not ZC706+AD9371. On bq the Mykonos driver logged ``ad9371 spi1.1: RESET Failed`` during probe, then the jesd204 FSM bounced off ``link_pre_setup`` with error -19 (ENODEV) in a retry loop, and the TPL DMA never streamed. Fix: move all three GPIO numbers to match the Kuiper ``zc706-adrv9371`` reference DT on bq's SD card: - ``trx_reset_gpio`` 130 → 106 (AD9371 reset) - ``trx_sysref_req_gpio`` 136 → 112 (AD9371 SYSREF_REQ) - new ``ad9528_reset_gpio`` 113 (AD9528 reset — wasn't emitted before). Additions to support ``ad9528_reset_gpio``: - ``ADRV937xBuilder`` now passes a ``_GpioLine(prop="reset-gpios", …)`` into ``AD9528_1(gpio_lines=[…])`` so the ad9528 node renders ``reset-gpios = <&gpio0 113 0>;`` alongside its channel subnodes. - ``_ADRV9009_BOARD_ALLOWED_KEYS`` + ``_ADRV9009_BOARD_INT_KEYS`` in ``adidt/xsa/profiles.py`` gain ``ad9528_reset_gpio`` so the profile-JSON loader doesn't reject it. - ``adidt/xsa/profiles/adrv937x_zc706.json`` defaults updated. - System-API side (``adidt/eval/adrv937x_fmc.py``) updated in lockstep so the dts-parity test stays green. - Test cfg (``test/hw/test_adrv9371_zc706_hw.py``) updated too — it was overriding the profile defaults with the old 130/136 values. Fixture ``test/devices/fixtures/adrv9371_zc706_xsa_reference.dts`` regenerated from the new builder output. All 449 unit tests still pass.
1 parent 858670c commit b095aaf

6 files changed

Lines changed: 29 additions & 11 deletions

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adidt/eval/adrv937x_fmc.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,8 @@ def __init__(self, *, reference_frequency: int = 122_880_000) -> None:
4242
label="trx0_ad9371",
4343
node_name_base="ad9371-phy",
4444
compatible_strings=["adi,ad9371"],
45-
reset_gpio=130,
46-
sysref_req_gpio=136,
45+
reset_gpio=106,
46+
sysref_req_gpio=112,
4747
)
4848

4949
def _named(self, name: str) -> ClockOutput:

adidt/xsa/builders/adrv937x.py

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
JesdLinkModel,
1717
)
1818
from ...devices.clocks import AD9528_1
19-
from ...devices.clocks.ad952x import AD9528_1Channel
19+
from ...devices.clocks.ad952x import AD9528_1Channel, _GpioLine
2020
from ...devices.fpga_ip import build_jesd204_overlay_ctx
2121
from ...model.renderer import BoardModelRenderer
2222
from ..topology import XsaTopology
@@ -288,8 +288,14 @@ def build_model(
288288
spi_bus = str(board_cfg.get("spi_bus", "spi0"))
289289
clk_cs = int(board_cfg.get("clk_cs", 0))
290290
trx_cs = int(board_cfg.get("trx_cs", 1))
291-
trx_reset_gpio = int(board_cfg.get("trx_reset_gpio", 130))
292-
trx_sysref_req_gpio = int(board_cfg.get("trx_sysref_req_gpio", 136))
291+
# GPIO defaults match the Kuiper ``zc706-adrv9371`` reference DT
292+
# (EMIO pin numbering relative to Zynq GPIO controller base=54):
293+
# - AD9371 reset = 106 (``trx_reset_gpio``)
294+
# - AD9371 sysref = 112 (``trx_sysref_req_gpio``)
295+
# - AD9528 reset = 113 (``ad9528_reset_gpio``)
296+
trx_reset_gpio = int(board_cfg.get("trx_reset_gpio", 106))
297+
trx_sysref_req_gpio = int(board_cfg.get("trx_sysref_req_gpio", 112))
298+
ad9528_reset_gpio = int(board_cfg.get("ad9528_reset_gpio", 113))
293299
trx_spi_max_frequency = int(board_cfg.get("trx_spi_max_frequency", 25000000))
294300
ad9528_vcxo_freq = int(board_cfg.get("ad9528_vcxo_freq", 122880000))
295301

@@ -311,6 +317,13 @@ def build_model(
311317
spi_max_hz=10_000_000,
312318
vcxo_hz=ad9528_vcxo_freq,
313319
channels=_default_ad9528_channels(),
320+
gpio_lines=[
321+
_GpioLine(
322+
prop="reset-gpios",
323+
controller=gpio_label,
324+
index=ad9528_reset_gpio,
325+
),
326+
],
314327
)
315328
clock_component = ComponentModel(
316329
role="clock",

adidt/xsa/profiles.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
"trx_sysref_req_gpio",
3131
"trx_spi_max_frequency",
3232
"ad9528_vcxo_freq",
33+
"ad9528_reset_gpio",
3334
"rx_link_id",
3435
"rx_os_link_id",
3536
"tx_link_id",
@@ -154,6 +155,7 @@
154155
"trx_sysref_req_gpio",
155156
"trx_spi_max_frequency",
156157
"ad9528_vcxo_freq",
158+
"ad9528_reset_gpio",
157159
"rx_link_id",
158160
"rx_os_link_id",
159161
"tx_link_id",

adidt/xsa/profiles/adrv937x_zc706.json

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,9 @@
66
"spi_bus": "spi0",
77
"clk_cs": 0,
88
"trx_cs": 1,
9-
"trx_reset_gpio": 130,
10-
"trx_sysref_req_gpio": 136,
9+
"trx_reset_gpio": 106,
10+
"trx_sysref_req_gpio": 112,
11+
"ad9528_reset_gpio": 113,
1112
"trx_spi_max_frequency": 25000000,
1213
"ad9528_vcxo_freq": 122880000,
1314
"rx_link_id": 1,

test/devices/fixtures/adrv9371_zc706_xsa_reference.dts

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -209,6 +209,7 @@
209209
adi,osc-in-cmos-neg-inp-enable;
210210
adi,sysref-request-enable;
211211
reg = <0>;
212+
reset-gpios = <&gpio0 113 0>;
212213
spi-max-frequency = <10000000>;
213214
adi,vcxo-freq = <122880000>;
214215
clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2", "ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6", "ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10", "ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
@@ -253,8 +254,8 @@
253254
reg = <1>;
254255
clocks = <&clk0_ad9528 13>, <&clk0_ad9528 1>, <&clk0_ad9528 12>, <&clk0_ad9528 3>;
255256
clock-names = "dev_clk", "fmc_clk", "sysref_dev_clk", "sysref_fmc_clk";
256-
reset-gpios = <&gpio0 130 0>;
257-
sysref-req-gpios = <&gpio0 136 0>;
257+
reset-gpios = <&gpio0 106 0>;
258+
sysref-req-gpios = <&gpio0 112 0>;
258259
jesd204-link-ids = <1 0>;
259260
jesd204-inputs = <&axi_ad9371_rx_xcvr 0 1>, <&axi_ad9371_tx_xcvr 0 0>;
260261
compatible = "adi,ad9371";

test/hw/test_adrv9371_zc706_hw.py

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,8 +98,9 @@ def test_adrv9371_zc706_xsa_hw(board, built_kernel_image_zynq, tmp_path):
9898
"spi_bus": "spi0",
9999
"clk_cs": 0,
100100
"trx_cs": 1,
101-
"trx_reset_gpio": 130,
102-
"trx_sysref_req_gpio": 136,
101+
"trx_reset_gpio": 106,
102+
"trx_sysref_req_gpio": 112,
103+
"ad9528_reset_gpio": 113,
103104
"ad9528_vcxo_freq": DEFAULT_VCXO_HZ,
104105
"rx_link_id": 1,
105106
"tx_link_id": 0,

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