u-boot/arch/arm/dts/zynq-coraz7s.dts at bae7eb9574c789add4dbcdc9ef09857ad5a1bf4f · analogdevicesinc/u-boot · GitHub

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// SPDX-License-Identifier: GPL-2.0+
/*
 * Digilent Cora Z7 board DTS
 *
 *  Copyright (C) 2016 Digilent
 */
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
	model = "Zynq Cora Z7 Development Board";
	compatible = "digilent,zynq-coraz7", "xlnx,zynq-7000";

	aliases {
		ethernet0 = &gem0;
		serial0 = &uart0;
		mmc0 = &sdhci0;
	};

	cpus {
		/delete-node/ cpu1;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	};

	cpus {
		/delete-node/ cpu1;
	};

	chosen {
		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait";
		stdout-path = "serial0:115200n8";
	};

	usb_phy0: phy0@e0002000 {
		compatible = "ulpi-phy";
		#phy-cells = <0>;
		reg = <0xe0002000 0x1000>;
		view-port = <0x0170>;
		drv-vbus;
	};
};

&clkc {
	ps-clk-frequency = <50000000>;
};

&gem0 {
	status = "okay";
	phy-mode = "rgmii-id";
	phy-handle = <&ethernet_phy>;

	ethernet_phy: ethernet-phy@0 { /* rtl8211e-vl */
		reg = <1>;
		device_type = "ethernet-phy";
	};
};

&sdhci0 {
	u-boot,dm-pre-reloc;
	status = "okay";
};

&uart0 {
	u-boot,dm-pre-reloc;
	status = "okay";
};

&usb0 {
	status = "okay";
	dr_mode = "host";
	usb-phy = <&usb_phy0>;
};