Commit 04bbc16
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mimxrt/sdcard: Add cache coherency operations for DMA transfers.
Add explicit data cache management to ensure DMA transfers work correctly
on systems with data cache enabled (e.g., MIMXRT1170).
For reads: Clean and invalidate cache before transfer so DMA can update
RAM and CPU reads fresh data.
For writes: Clean cache to RAM before transfer so DMA reads correct data.
This follows the same pattern as ports/stm32/sdcard.c which uses
MP_HAL_CLEANINVALIDATE_DCACHE for reads and MP_HAL_CLEAN_DCACHE for writes.
Signed-off-by: Andrew Leech <[email protected]>1 parent 2f1b12e commit 04bbc16
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