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maxcapodi78pyansys-ci-botSamuelopez-ansys
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FEAT: Added DUT Image to the Compliance report (#5985)
Co-authored-by: pyansys-ci-bot <92810346+pyansys-ci-bot@users.noreply.github.com> Co-authored-by: Samuel Lopez <85613111+Samuelopez-ansys@users.noreply.github.com>
1 parent 52fb9c6 commit a8ec659

6 files changed

Lines changed: 292 additions & 177 deletions

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doc/changelog.d/5985.added.md

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Added DUT Image to the Compliance report

src/ansys/aedt/core/modeler/circuits/object_3d_circuit.py

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@@ -530,6 +530,8 @@ def parameters(self):
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proparray[tab] = []
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for tab, props in proparray.items():
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if not props:
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continue
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for j in props:
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propval = self._oeditor.GetPropertyValue(tab, self.composed_name, j)
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_parameters[j] = propval

src/ansys/aedt/core/visualization/post/compliance.py

Lines changed: 269 additions & 160 deletions
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src/ansys/aedt/core/visualization/post/post_circuit.py

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@@ -98,7 +98,7 @@ def export_model_picture(
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output_file = os.path.join(
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self._app.working_directory, generate_unique_name(self._app.design_name) + ".jpg"
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)
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if page >= self.oeditor.GetNumPages():
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if page > self.oeditor.GetNumPages():
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self.logger.error("Page number out of range")
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return ""
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self.oeditor.ExportImage(output_file, page, width, height)
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tests/system/solvers/test_01_pdf.py

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@@ -25,6 +25,7 @@
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import os
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from ansys.aedt.core import Circuit
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from ansys.aedt.core.generic.general_methods import is_windows
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from ansys.aedt.core.visualization.plot.pdf import AnsysReport
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from ansys.aedt.core.visualization.post.compliance import VirtualCompliance
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from ansys.aedt.core.visualization.post.compliance import VirtualComplianceGenerator
@@ -109,6 +110,7 @@ def test_virtual_compliance(self, local_scratch, aedtapp):
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compliance_folder = os.path.join(local_scratch.path, "vc")
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os.makedirs(compliance_folder, exist_ok=True)
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vc = VirtualComplianceGenerator("Test_full", "Diff_Via")
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vc.dut_image = os.path.join(local_path, "example_models", test_subfolder, "nets.jpg")
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for plot in aedtapp.post.plots[::]:
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try:
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plot.export_config(f"{compliance_folder}\\report_{plot.plot_name}.json")
@@ -121,23 +123,24 @@ def test_virtual_compliance(self, local_scratch, aedtapp):
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group_plots=True,
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project=aedtapp.project_file,
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)
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vc.add_erl_parameters(
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design_name=aedtapp.design_name,
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config_file=f"{compliance_folder}\\config.cfg",
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traces=["RX1", "RX3"],
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pins=[
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[
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"X1_A5_PCIe_Gen4_RX1_P",
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"X1_A6_PCIe_Gen4_RX1_N",
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"U1_AR25_PCIe_Gen4_RX1_P",
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"U1_AP25_PCIe_Gen4_RX1_N",
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if is_windows:
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vc.add_erl_parameters(
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design_name=aedtapp.design_name,
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config_file=f"{compliance_folder}\\config.cfg",
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traces=["RX1", "RX3"],
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pins=[
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[
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"X1_A5_PCIe_Gen4_RX1_P",
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"X1_A6_PCIe_Gen4_RX1_N",
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"U1_AR25_PCIe_Gen4_RX1_P",
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"U1_AP25_PCIe_Gen4_RX1_N",
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],
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[7, 8, 18, 17],
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],
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[7, 8, 18, 17],
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],
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pass_fail=True,
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pass_fail_criteria=3,
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name="ERL",
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)
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pass_fail=True,
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pass_fail_criteria=3,
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name="ERL",
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)
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vc.save_configuration(f"{compliance_folder}\\main.json")
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assert os.path.exists(os.path.join(compliance_folder, "main.json"))
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v = VirtualCompliance(aedtapp.desktop_class, template)

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