In fpga/parallella/headless_e16_z70[12]0/system_bd.tcl:
When upgrading Vivado, you must change the line with:
set scripts_vivado_version 2015.4
to match the Vivado version. Even though this file is re-generated in the
build, it is required by the build to create an initial block design.
Ugh!!!
In fpga/parallella/headless_e16_z70[12]0/system_bd.tcl:
When upgrading Vivado, you must change the line with:
set scripts_vivado_version 2015.4to match the Vivado version. Even though this file is re-generated in the
build, it is required by the build to create an initial block design.
Ugh!!!