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[wip] nimble/ll: Add usage of CS PHY
1 parent d3b280d commit 8bff1d8

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2 files changed

+70
-34
lines changed

2 files changed

+70
-34
lines changed

nimble/controller/src/ble_ll_cs_proc.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -965,6 +965,7 @@ void
965965
ble_ll_cs_proc_sync_lost(struct ble_ll_cs_sm *cssm)
966966
{
967967
ble_phy_disable();
968+
ble_phy_cs_sync_mode_set(0);
968969
ble_ll_state_set(BLE_LL_STATE_STANDBY);
969970

970971
ble_ll_cs_proc_schedule_next_tx_or_rx(cssm);

nimble/controller/src/ble_ll_cs_sync.c

Lines changed: 69 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -93,11 +93,24 @@ void
9393
ble_ll_cs_sync_tx_end_cb(void *arg)
9494
{
9595
struct ble_ll_cs_sm *cssm = g_ble_ll_cs_sm_current;
96+
uint32_t cputime;
97+
uint32_t rem_us;
98+
uint32_t rem_ns;
99+
uint32_t anchor_usecs;
96100

97101
assert(cssm != NULL);
98-
ble_ll_cs_proc_set_now_as_anchor_point(cssm);
102+
103+
ble_phy_get_txend_time(&cputime, &rem_us, &rem_ns);
104+
anchor_usecs = ble_ll_tmr_t2u(cputime) + rem_us;
105+
106+
cssm->anchor_usecs = anchor_usecs;
107+
if (cssm->step_mode != BLE_LL_CS_MODE0 &&
108+
cssm->active_config->role == BLE_LL_CS_ROLE_REFLECTOR) {
109+
cssm->step_result.time_of_departure = cssm->anchor_usecs;
110+
}
99111

100112
ble_phy_disable();
113+
ble_phy_cs_sync_mode_set(0);
101114
ble_ll_state_set(BLE_LL_STATE_STANDBY);
102115

103116
ble_ll_cs_proc_schedule_next_tx_or_rx(cssm);
@@ -120,35 +133,42 @@ int
120133
ble_ll_cs_sync_tx_start(struct ble_ll_cs_sm *cssm)
121134
{
122135
int rc;
136+
uint8_t cs_timer;
123137

124138
BLE_LL_ASSERT(ble_ll_state_get() == BLE_LL_STATE_STANDBY);
125139

140+
ble_phy_cs_sync_mode_set(1);
141+
126142
ble_ll_tx_power_set(g_ble_ll_tx_power);
127143

128-
/* TODO: Add to PHY a support for 72 RF channels for CS exchanges.
129-
* rc = ble_phy_cs_sync_configure();
130-
* if (rc) {
131-
* ble_ll_cs_proc_sync_lost(cssm);
132-
* return 1;
133-
* }
134-
*/
144+
if (cssm->step_mode == BLE_LL_CS_MODE0) {
145+
cs_timer = BLE_PHY_CS_TIMER_NONE;
146+
} else if (cssm->active_config->role == BLE_LL_CS_ROLE_INITIATOR) {
147+
cs_timer = BLE_PHY_CS_TIMER_START;
148+
cssm->step_result.time_of_departure = cssm->anchor_usecs;
149+
} else { /* BLE_LL_CS_ROLE_REFLECTOR */
150+
cs_timer = BLE_PHY_CS_TIMER_CAPTURE;
151+
}
135152

136-
rc = ble_phy_tx_set_start_time(sch->start_time + g_ble_ll_sched_offset_ticks,
137-
sch->remainder);
153+
rc = ble_phy_cs_sync_configure(cssm->channel, cssm->tx_aa, cs_timer);
138154
if (rc) {
139155
ble_ll_cs_proc_sync_lost(cssm);
140-
return BLE_LL_SCHED_STATE_DONE;
156+
return 1;
157+
}
158+
159+
rc = ble_phy_tx_set_start_time(cssm->anchor_cputime, cssm->anchor_rem_usecs);
160+
if (rc) {
161+
ble_ll_cs_proc_sync_lost(cssm);
162+
return 1;
141163
}
142164

143165
ble_phy_set_txend_cb(ble_ll_cs_sync_tx_end_cb, cssm);
144166

145-
/* TODO: Add to PHY a support for CS_SYNC transmission.
146-
* rc = ble_phy_tx_cs_sync(ble_ll_cs_sync_tx_make, cssm);
147-
* if (rc) {
148-
* ble_ll_cs_proc_sync_lost(cssm);
149-
* return 1;
150-
* }
151-
*/
167+
rc = ble_phy_tx_cs_sync(ble_ll_cs_sync_tx_make, cssm);
168+
if (rc) {
169+
ble_ll_cs_proc_sync_lost(cssm);
170+
return 1;
171+
}
152172

153173
ble_ll_state_set(BLE_LL_STATE_CS);
154174

@@ -160,18 +180,28 @@ ble_ll_cs_sync_rx_start(struct ble_ll_cs_sm *cssm)
160180
{
161181
int rc;
162182
uint32_t wfr_usecs;
183+
uint8_t cs_timer;
163184

164185
BLE_LL_ASSERT(ble_ll_state_get() == BLE_LL_STATE_STANDBY);
165186

166-
/* rc = ble_phy_cs_sync_configure();
167-
* if (rc) {
168-
* ble_ll_cs_proc_sync_lost(cssm);
169-
* return 1;
170-
* }
171-
*/
187+
ble_phy_cs_sync_mode_set(1);
188+
189+
if (cssm->step_mode == BLE_LL_CS_MODE0) {
190+
cs_timer = BLE_PHY_CS_TIMER_NONE;
191+
} else if (cssm->active_config->role == BLE_LL_CS_ROLE_INITIATOR) {
192+
cs_timer = BLE_PHY_CS_TIMER_CAPTURE;
193+
} else { /* BLE_LL_CS_ROLE_REFLECTOR */
194+
cs_timer = BLE_PHY_CS_TIMER_START;
195+
cssm->step_result.time_of_arrival = cssm->anchor_usecs;
196+
}
172197

173-
rc = ble_phy_rx_set_start_time(sch->start_time + g_ble_ll_sched_offset_ticks,
174-
sch->remainder);
198+
rc = ble_phy_cs_sync_configure(cssm->channel, cssm->rx_aa, cs_timer);
199+
if (rc) {
200+
ble_ll_cs_proc_sync_lost(cssm);
201+
return 1;
202+
}
203+
204+
rc = ble_phy_rx_set_start_time(cssm->anchor_cputime, cssm->anchor_rem_usecs);
175205

176206
/* Accept the risk of being late just for testing
177207
* with slower clocks without increasing the T_RD.
@@ -250,22 +280,27 @@ ble_ll_cs_sync_rx_isr_end(uint8_t *rxbuf, struct ble_mbuf_hdr *rxhdr)
250280
{
251281
struct os_mbuf *rxpdu;
252282
struct ble_ll_cs_sm *cssm = g_ble_ll_cs_sm_current;
283+
uint32_t cputime;
284+
uint32_t rem_us;
285+
uint32_t rem_ns;
286+
uint32_t anchor_usecs;
253287

254288
/* Packet type was verified in isr_start */
255289

256-
rxpdu = ble_ll_rxpdu_alloc(rxbuf[1] + BLE_LL_PDU_HDR_LEN);
257-
if (rxpdu) {
258-
ble_phy_rxpdu_copy(rxbuf, rxpdu);
290+
assert(cssm != NULL);
259291

260-
assert(cssm != NULL);
261-
ble_ll_cs_proc_set_now_as_anchor_point(cssm);
262-
ble_ll_cs_proc_schedule_next_tx_or_rx(cssm);
292+
ble_phy_get_rxend_time(&cputime, &rem_us, &rem_ns);
293+
anchor_usecs = ble_ll_tmr_t2u(cputime) + rem_us;
263294

264-
/* Send the packet to Link Layer context */
265-
ble_ll_rx_pdu_in(rxpdu);
295+
cssm->anchor_usecs = anchor_usecs;
296+
if (cssm->step_mode != BLE_LL_CS_MODE0 &&
297+
cssm->active_config->role == BLE_LL_CS_ROLE_INITIATOR) {
298+
cssm->step_result.time_of_arrival = cssm->anchor_usecs;
266299
}
300+
ble_ll_cs_proc_schedule_next_tx_or_rx(cssm);
267301

268302
ble_phy_disable();
303+
ble_phy_cs_sync_mode_set(0);
269304
ble_ll_state_set(BLE_LL_STATE_STANDBY);
270305

271306
return 1;

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