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eren-terziogluxiaoxiang781216
eren-terzioglu
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xiaoxiang781216
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arch/xtensa: Remove legacy I2S implementation for esp32[-|-s2|s3]
Remove legacy I2S implementation without breaking defconfigs for Xtensa based Espressif devices Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
1 parent dd7ac7e commit 8a835dd

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14 files changed

+95
-9332
lines changed

14 files changed

+95
-9332
lines changed

‎arch/xtensa/src/common/espressif/Kconfig‎

Lines changed: 60 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,6 @@ config ESPRESSIF_I2S
3535
config ESPRESSIF_I2S0
3636
bool "I2S 0"
3737
default n
38-
depends on !ESP32_I2S && !ESP32S2_I2S && !ESP32S3_I2S
3938
select ESPRESSIF_I2S
4039
select I2S
4140
select ESP32S3_DMA if ARCH_CHIP_ESP32S3
@@ -379,6 +378,7 @@ menu "I2S Configuration"
379378

380379
config ESPRESSIF_I2S_MAXINFLIGHT
381380
int "I2S queue size"
381+
default ESP32S3_I2S_MAXINFLIGHT if ESP32S3_I2S
382382
default 4
383383
---help---
384384
This is the total number of transfers, both RX and TX, that can be
@@ -390,18 +390,26 @@ if ESPRESSIF_I2S0
390390

391391
config ESPRESSIF_I2S0_RX
392392
bool "Enable I2S receiver"
393+
default ESP32_I2S0_RX if ESP32_I2S0
394+
default ESP32S2_I2S_RX if ESP32S2_I2S
395+
default ESP32S3_I2S0_RX if ESP32S3_I2S0
393396
default y
394397
---help---
395398
Enable I2S receiver (port 0)
396399

397400
config ESPRESSIF_I2S0_TX
398401
bool "Enable I2S transmitter"
402+
default ESP32_I2S0_TX if ESP32_I2S0
403+
default ESP32S2_I2S_TX if ESP32S2_I2S
404+
default ESP32S3_I2S0_TX if ESP32S3_I2S0
399405
default y
400406
---help---
401407
Enable I2S transmitter (port 0)
402408

403409
choice ESPRESSIF_I2S0_ROLE
404410
prompt "I2S0 role"
411+
default ESPRESSIF_I2S0_ROLE_MASTER if (ESP32_I2S0_ROLE_MASTER || ESP32S2_I2S_ROLE_MASTER || ESP32S3_I2S0_ROLE_MASTER)
412+
default ESPRESSIF_I2S0_ROLE_SLAVE if (ESP32_I2S0_ROLE_SLAVE || ESP32S2_I2S_ROLE_SLAVE || ESP32S3_I2S0_ROLE_SLAVE)
405413
default ESPRESSIF_I2S0_ROLE_MASTER
406414
---help---
407415
Selects the operation role of the I2S0.
@@ -416,6 +424,10 @@ endchoice # I2S0 role
416424

417425
choice ESPRESSIF_I2S0_DATA_BIT_WIDTH
418426
prompt "Bit width"
427+
default ESPRESSIF_I2S0_DATA_BIT_WIDTH_8BIT if (ESP32_I2S0_DATA_BIT_WIDTH_8BIT || ESP32S2_I2S_DATA_BIT_WIDTH_8BIT || ESP32S3_I2S0_DATA_BIT_WIDTH_8BIT)
428+
default ESPRESSIF_I2S0_DATA_BIT_WIDTH_16BIT if (ESP32_I2S0_DATA_BIT_WIDTH_16BIT || ESP32S2_I2S_DATA_BIT_WIDTH_16BIT || ESP32S3_I2S0_DATA_BIT_WIDTH_16BIT)
429+
default ESPRESSIF_I2S0_DATA_BIT_WIDTH_24BIT if (ESP32_I2S0_DATA_BIT_WIDTH_24BIT || ESP32S2_I2S_DATA_BIT_WIDTH_24BIT || ESP32S3_I2S0_DATA_BIT_WIDTH_24BIT)
430+
default ESPRESSIF_I2S0_DATA_BIT_WIDTH_32BIT if (ESP32_I2S0_DATA_BIT_WIDTH_32BIT || ESP32S2_I2S_DATA_BIT_WIDTH_32BIT || ESP32S3_I2S0_DATA_BIT_WIDTH_32BIT)
419431
default ESPRESSIF_I2S0_DATA_BIT_WIDTH_16BIT
420432
---help---
421433
Selects the valid data bits per sample.
@@ -438,6 +450,9 @@ endchoice # Bit width
438450

439451
config ESPRESSIF_I2S0_SAMPLE_RATE
440452
int "I2S0 sample rate"
453+
default ESP32_I2S0_SAMPLE_RATE if ESP32_I2S
454+
default ESP32S2_I2S_SAMPLE_RATE if ESP32S2_I2S
455+
default ESP32S3_I2S0_SAMPLE_RATE if ESP32S3_I2S
441456
default 44100
442457
range 8000 48000
443458
---help---
@@ -447,6 +462,9 @@ config ESPRESSIF_I2S0_SAMPLE_RATE
447462

448463
config ESPRESSIF_I2S0_BCLKPIN
449464
int "I2S0 BCLK pin"
465+
default ESP32_I2S0_BCLKPIN if ESP32_I2S
466+
default ESP32S2_I2S_BCLKPIN if ESP32S2_I2S
467+
default ESP32S3_I2S0_BCLKPIN if ESP32S3_I2S
450468
default 4 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
451469
default 35 if ARCH_CHIP_ESP32S2
452470
range 0 45 if (ARCH_CHIP_ESP32S2 && ESPRESSIF_I2S0_ROLE_MASTER)
@@ -457,6 +475,9 @@ config ESPRESSIF_I2S0_BCLKPIN
457475

458476
config ESPRESSIF_I2S0_WSPIN
459477
int "I2S0 WS pin"
478+
default ESP32_I2S0_WSPIN if ESP32_I2S
479+
default ESP32S2_I2S_WSPIN if ESP32S2_I2S
480+
default ESP32S3_I2S0_WSPIN if ESP32S3_I2S
460481
default 5 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
461482
default 34 if ARCH_CHIP_ESP32S2
462483
range 0 45 if (ARCH_CHIP_ESP32S2 && ESPRESSIF_I2S0_ROLE_MASTER)
@@ -468,15 +489,21 @@ config ESPRESSIF_I2S0_WSPIN
468489
config ESPRESSIF_I2S0_DINPIN
469490
int "I2S0 DIN pin"
470491
depends on ESPRESSIF_I2S0_RX
471-
default 19 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
492+
default ESP32_I2S0_DINPIN if ESP32_I2S0_RX
493+
default ESP32S2_I2S_DINPIN if ESP32S2_I2S_RX
494+
default ESP32S3_I2S0_DINPIN if ESP32S3_I2S0_RX
472495
default 37 if ARCH_CHIP_ESP32S2
496+
default 19 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
473497
range 0 46 if ARCH_CHIP_ESP32S2
474498
range 0 48 if ARCH_CHIP_ESP32S3
475499
range 0 39 if ARCH_CHIP_ESP32
476500

477501
config ESPRESSIF_I2S0_DOUTPIN
478502
int "I2S0 DOUT pin"
479503
depends on ESPRESSIF_I2S0_TX
504+
default ESP32_I2S0_DOUTPIN if ESP32_I2S0_TX
505+
default ESP32S2_I2S_DOUTPIN if ESP32S2_I2S_TX
506+
default ESP32S3_I2S0_DOUTPIN if ESP32S3_I2S0_TX
480507
default 18 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
481508
default 36 if ARCH_CHIP_ESP32S2
482509
range 0 46 if ARCH_CHIP_ESP32S2
@@ -486,13 +513,19 @@ config ESPRESSIF_I2S0_DOUTPIN
486513
config ESPRESSIF_I2S0_MCLK
487514
bool "Enable I2S Master Clock"
488515
depends on ESPRESSIF_I2S0_ROLE_MASTER
516+
default ESP32_I2S0_MCLK if ESP32_I2S0
517+
default ESP32S2_I2S_MCLK if ESP32S2_I2S
518+
default ESP32S3_I2S0_MCLK if ESP32S3_I2S0
489519
default n
490520
---help---
491521
Enable I2S master clock
492522

493523
config ESPRESSIF_I2S0_MCLKPIN
494524
int "I2S MCLK pin"
495525
depends on ESPRESSIF_I2S0_MCLK
526+
default ESP32_I2S0_MCLKPIN if ESP32_I2S0_MCLK
527+
default ESP32S2_I2S_MCLKPIN if ESP32S2_I2S_MCLK
528+
default ESP32S3_I2S0_MCLKPIN if ESP32S3_I2S0_MCLK
496529
default 0 if ARCH_CHIP_ESP32S3 || ARCH_CHIP_ESP32
497530
default 33 if ARCH_CHIP_ESP32S2
498531
range 0 45 if ARCH_CHIP_ESP32S2
@@ -505,18 +538,24 @@ if ESPRESSIF_I2S1
505538

506539
config ESPRESSIF_I2S1_RX
507540
bool "Enable I2S receiver"
541+
default ESP32_I2S1_RX if ESP32_I2S1
542+
default ESP32S3_I2S1_RX if ESP32S3_I2S1
508543
default y
509544
---help---
510545
Enable I2S receiver (port 1)
511546

512547
config ESPRESSIF_I2S1_TX
513548
bool "Enable I2S transmitter"
549+
default ESP32_I2S1_TX if ESP32_I2S1
550+
default ESP32S3_I2S1_TX if ESP32S3_I2S1
514551
default y
515552
---help---
516553
Enable I2S transmitter (port 1)
517554

518555
choice ESPRESSIF_I2S1_ROLE
519556
prompt "I2S1 role"
557+
default ESPRESSIF_I2S1_ROLE_MASTER if (ESP32_I2S1_ROLE_MASTER || ESP32S3_I2S1_ROLE_MASTER)
558+
default ESPRESSIF_I2S1_ROLE_SLAVE if (ESP32_I2S1_ROLE_SLAVE || ESP32S3_I2S1_ROLE_SLAVE)
520559
default ESPRESSIF_I2S1_ROLE_MASTER
521560
---help---
522561
Selects the operation role of the I2S0.
@@ -531,6 +570,10 @@ endchoice # I2S1 role
531570

532571
choice ESPRESSIF_I2S1_DATA_BIT_WIDTH
533572
prompt "Bit width"
573+
default ESPRESSIF_I2S1_DATA_BIT_WIDTH_8BIT if (ESP32_I2S1_DATA_BIT_WIDTH_8BIT || ESP32S3_I2S1_DATA_BIT_WIDTH_8BIT)
574+
default ESPRESSIF_I2S1_DATA_BIT_WIDTH_16BIT if (ESP32_I2S1_DATA_BIT_WIDTH_16BIT || ESP32S3_I2S1_DATA_BIT_WIDTH_16BIT)
575+
default ESPRESSIF_I2S1_DATA_BIT_WIDTH_24BIT if (ESP32_I2S1_DATA_BIT_WIDTH_24BIT || ESP32S3_I2S1_DATA_BIT_WIDTH_24BIT)
576+
default ESPRESSIF_I2S1_DATA_BIT_WIDTH_32BIT if (ESP32_I2S1_DATA_BIT_WIDTH_32BIT || ESP32S3_I2S1_DATA_BIT_WIDTH_32BIT)
534577
default ESPRESSIF_I2S1_DATA_BIT_WIDTH_16BIT
535578
---help---
536579
Selects the valid data bits per sample.
@@ -553,6 +596,8 @@ endchoice # Bit width
553596

554597
config ESPRESSIF_I2S1_SAMPLE_RATE
555598
int "I2S1 sample rate"
599+
default ESP32_I2S1_SAMPLE_RATE if ESP32_I2S
600+
default ESP32S3_I2S1_SAMPLE_RATE if ESP32S3_I2S
556601
default 44100
557602
range 8000 48000
558603
---help---
@@ -562,13 +607,17 @@ config ESPRESSIF_I2S1_SAMPLE_RATE
562607

563608
config ESPRESSIF_I2S1_BCLKPIN
564609
int "I2S1 BCLK pin"
610+
default ESP32_I2S1_BCLKPIN if ESP32_I2S
611+
default ESP32S3_I2S1_BCLKPIN if ESP32S3_I2S
565612
default 22
566613
range 0 33 if (ARCH_CHIP_ESP32 && ESPRESSIF_I2S0_ROLE_MASTER)
567614
range 0 39 if (ARCH_CHIP_ESP32 && ESPRESSIF_I2S0_ROLE_SLAVE)
568615
range 0 48 if ARCH_CHIP_ESP32S3
569616

570617
config ESPRESSIF_I2S1_WSPIN
571618
int "I2S1 WS pin"
619+
default ESP32_I2S1_WSPIN if ESP32_I2S
620+
default ESP32S3_I2S1_WSPIN if ESP32S3_I2S
572621
default 23
573622
range 0 33 if (ARCH_CHIP_ESP32 && ESPRESSIF_I2S0_ROLE_MASTER)
574623
range 0 39 if (ARCH_CHIP_ESP32 && ESPRESSIF_I2S0_ROLE_SLAVE)
@@ -577,27 +626,36 @@ config ESPRESSIF_I2S1_WSPIN
577626
config ESPRESSIF_I2S1_DINPIN
578627
int "I2S1 DIN pin"
579628
depends on ESPRESSIF_I2S1_RX
629+
default ESP32_I2S1_DINPIN if ESP32_I2S1_RX
630+
default ESP32S3_I2S1_DINPIN if ESP32S3_I2S1_RX
580631
default 26
632+
default ESP32_I2S1_DINPIN if ESP32_I2S1_RX
581633
range 0 39 if ARCH_CHIP_ESP32
582634
range 0 48 if ARCH_CHIP_ESP32S3
583635

584636
config ESPRESSIF_I2S1_DOUTPIN
585637
int "I2S1 DOUT pin"
586638
depends on ESPRESSIF_I2S1_TX
639+
default ESP32_I2S1_DOUTPIN if ESP32_I2S1_TX
640+
default ESP32S3_I2S1_DOUTPIN if ESP32S3_I2S1_TX
587641
default 25
588642
range 0 39 if ARCH_CHIP_ESP32
589643
range 0 48 if ARCH_CHIP_ESP32S3
590644

591645
config ESPRESSIF_I2S1_MCLK
592646
bool "Enable I2S Master Clock"
593647
depends on ESPRESSIF_I2S1_ROLE_MASTER
648+
default ESP32_I2S1_MCLK if ESP32_I2S1
649+
default ESP32S3_I2S1_MCLK if ESP32S3_I2S1
594650
default n
595651
---help---
596652
Enable I2S master clock
597653

598654
config ESPRESSIF_I2S1_MCLKPIN
599655
int "I2S1 MCLK pin"
600656
depends on ESPRESSIF_I2S1_MCLK
657+
default ESP32_I2S1_MCLKPIN if ESP32_I2S1_MCLK
658+
default ESP32S3_I2S1_MCLKPIN if ESP32S3_I2S1_MCLK
601659
default 1 if ARCH_CHIP_ESP32S3
602660
default 0 if ARCH_CHIP_ESP32
603661
range 0 48 if ARCH_CHIP_ESP32S3

‎arch/xtensa/src/common/espressif/esp_i2s.c‎

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,6 @@
5353
#include "esp32s2_irq.h"
5454
#else
5555
#include "esp32_gpio.h"
56-
#include "hardware/esp32_gpio_sigmap.h"
5756
#include "esp32_dma.h"
5857
#include "esp32_irq.h"
5958
#endif
@@ -137,23 +136,35 @@
137136
#define ESP_IRQ_TRIGGER_LEVEL ESP32_CPUINT_LEVEL
138137
#endif
139138

140-
#ifdef CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_8BIT
139+
#if defined(CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_8BIT) || \
140+
defined(CONFIG_ESP32_I2S0_DATA_BIT_WIDTH_8BIT) || \
141+
defined(CONFIG_ESP32S2_I2S_DATA_BIT_WIDTH_8BIT)
141142
# define ESPRESSIF_I2S0_DATA_BIT_WIDTH 8
142-
#elif CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_16BIT
143+
#elif defined(CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_16BIT) || \
144+
defined(CONFIG_ESP32_I2S0_DATA_BIT_WIDTH_16BIT) || \
145+
defined(CONFIG_ESP32S2_I2S_DATA_BIT_WIDTH_16BIT)
143146
# define ESPRESSIF_I2S0_DATA_BIT_WIDTH 16
144-
#elif CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_24BIT
147+
#elif defined(CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_24BIT) || \
148+
defined(CONFIG_ESP32_I2S0_DATA_BIT_WIDTH_24BIT) || \
149+
defined(CONFIG_ESP32S2_I2S_DATA_BIT_WIDTH_24BIT)
145150
# define ESPRESSIF_I2S0_DATA_BIT_WIDTH 24
146-
#elif CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_32BIT
151+
#elif defined(CONFIG_ESPRESSIF_I2S0_DATA_BIT_WIDTH_32BIT) || \
152+
defined(CONFIG_ESP32_I2S0_DATA_BIT_WIDTH_32BIT) || \
153+
defined(CONFIG_ESP32S2_I2S_DATA_BIT_WIDTH_32BIT)
147154
# define ESPRESSIF_I2S0_DATA_BIT_WIDTH 32
148155
#endif
149156

150-
#ifdef CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_8BIT
157+
#if defined(CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_8BIT) || \
158+
defined(CONFIG_ESP32_I2S1_DATA_BIT_WIDTH_8BIT)
151159
# define ESPRESSIF_I2S1_DATA_BIT_WIDTH 8
152-
#elif CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_16BIT
160+
#elif defined(CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_16BIT) || \
161+
defined(CONFIG_ESP32_I2S1_DATA_BIT_WIDTH_16BIT)
153162
# define ESPRESSIF_I2S1_DATA_BIT_WIDTH 16
154-
#elif CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_24BIT
163+
#elif defined(CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_24BIT) || \
164+
defined(CONFIG_ESP32_I2S1_DATA_BIT_WIDTH_24BIT)
155165
# define ESPRESSIF_I2S1_DATA_BIT_WIDTH 24
156-
#elif CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_32BIT
166+
#elif defined(CONFIG_ESPRESSIF_I2S1_DATA_BIT_WIDTH_32BIT) || \
167+
defined(CONFIG_ESP32_I2S1_DATA_BIT_WIDTH_32BIT)
157168
# define ESPRESSIF_I2S1_DATA_BIT_WIDTH 32
158169
#endif
159170

@@ -198,7 +209,7 @@
198209
#ifdef CONFIG_DEBUG_I2S_INFO
199210
# define CONFIG_ESPRESSIF_I2S_DUMPBUFFERS
200211
#else
201-
# undef CONFIG_ESPRESSIF_I2S_DUMPBUFFERS
212+
# undef CONFIG_ESPRESSIF_I2S_DUMPBUFFERS
202213
#endif
203214

204215
#define I2S_GPIO_UNUSED -1 /* For signals which are not used */

‎arch/xtensa/src/esp32/Kconfig‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -311,10 +311,11 @@ config ESP32_SDMMC
311311
No yet implemented
312312

313313
config ESP32_I2S
314-
bool "I2S (legacy implementation)"
314+
bool "I2S (legacy implementation: read help)"
315315
select I2S
316316
---help---
317-
See the Board Selection menu to configure the pins used by I2S.
317+
This is a deprecated Kconfig macro. Its kept for retrocompatibility only.
318+
Use "CONFIG_ESPRESSIF_I2S" instead.
318319

319320
if ESP32_I2S
320321

@@ -323,6 +324,7 @@ config ESP32_I2S0
323324
default n
324325
select ARCH_DMA
325326
select ESP32_GPIO_IRQ
327+
select ESPRESSIF_I2S0
326328

327329
if ESP32_I2S0
328330

@@ -452,6 +454,7 @@ config ESP32_I2S1
452454
default n
453455
select ARCH_DMA
454456
select ESP32_GPIO_IRQ
457+
select ESPRESSIF_I2S1
455458

456459
if ESP32_I2S1
457460

‎arch/xtensa/src/esp32/Make.defs‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -80,9 +80,6 @@ CHIP_CSRCS += esp32_i2c.c
8080
endif
8181
endif
8282

83-
ifeq ($(CONFIG_ESP32_I2S),y)
84-
CHIP_CSRCS += esp32_i2s.c
85-
endif
8683

8784
ifeq ($(CONFIG_ESP32_TWAI),y)
8885
CHIP_CSRCS += esp32_twai.c

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