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Automerge: [X86] combineMulToPMADDWD - match 256/512-bit SIGN_EXTEND nodes (#205606)
Now that the X86ISD::VPMADDWD handling is improving, we can remove some of the limits that we had to prevent regressions
2 parents 0b788a7 + 2c4c268 commit 0f9b968

3 files changed

Lines changed: 75 additions & 65 deletions

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‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50663,7 +50663,7 @@ static SDValue combineMulToPMADDWD(SDNode *N, const SDLoc &DL,
5066350663
if (Op.getOpcode() == ISD::SIGN_EXTEND && N->isOnlyUserOf(Op.getNode())) {
5066450664
SDValue Src = Op.getOperand(0);
5066550665
// Convert sext(vXi16) to zext(vXi16).
50666-
if (Src.getScalarValueSizeInBits() == 16 && VT.getSizeInBits() <= 128)
50666+
if (Src.getScalarValueSizeInBits() == 16)
5066750667
return DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Src);
5066850668
// Convert sext(vXi8) to zext(vXi16 sext(vXi8)) on pre-SSE41 targets
5066950669
// which will expand the extension.

‎llvm/test/CodeGen/X86/madd.ll‎

Lines changed: 38 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -3674,56 +3674,66 @@ define <5 x i32> @oddvector_mul(<16 x i16> %A, <16 x i16> %B) {
36743674
; SSE42-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
36753675
; SSE42-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
36763676
; SSE42-NEXT: pmaddwd %xmm0, %xmm1
3677-
; SSE42-NEXT: movd %xmm1, %ecx
3677+
; SSE42-NEXT: pextrd $1, %xmm1, %ecx
36783678
; SSE42-NEXT: movdqa %xmm4, (%rdi)
3679-
; SSE42-NEXT: pextrd $1, %xmm1, %edx
3679+
; SSE42-NEXT: movd %xmm1, %edx
36803680
; SSE42-NEXT: addl %ecx, %edx
36813681
; SSE42-NEXT: movl %edx, 16(%rdi)
36823682
; SSE42-NEXT: retq
36833683
;
36843684
; AVX1-LABEL: oddvector_mul:
36853685
; AVX1: # %bb.0:
3686-
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
3687-
; AVX1-NEXT: vpmovsxwd %xmm2, %xmm2
3686+
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
3687+
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
3688+
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm0[4,4,5,5,6,6,7,7]
3689+
; AVX1-NEXT: vpmaddwd %xmm2, %xmm3, %xmm2
36883690
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
3689-
; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
3690-
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]
3691-
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
3692-
; AVX1-NEXT: vpmaddwd %xmm5, %xmm4, %xmm4
3691+
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
3692+
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
3693+
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero
3694+
; AVX1-NEXT: vpmaddwd %xmm3, %xmm4, %xmm3
36933695
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
36943696
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
36953697
; AVX1-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0
3696-
; AVX1-NEXT: vphaddd %xmm0, %xmm4, %xmm1
3697-
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
3698-
; AVX1-NEXT: vpmaddwd %xmm3, %xmm2, %xmm2
3699-
; AVX1-NEXT: vphaddd %xmm2, %xmm0, %xmm0
3698+
; AVX1-NEXT: vphaddd %xmm3, %xmm0, %xmm0
3699+
; AVX1-NEXT: vphaddd %xmm0, %xmm2, %xmm1
37003700
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
37013701
; AVX1-NEXT: vshufpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[3],ymm1[3]
37023702
; AVX1-NEXT: retq
37033703
;
37043704
; AVX2-LABEL: oddvector_mul:
37053705
; AVX2: # %bb.0:
3706-
; AVX2-NEXT: vpmovsxwd %xmm0, %ymm2
3707-
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
3708-
; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
3709-
; AVX2-NEXT: vpmovsxwd %xmm1, %ymm3
3710-
; AVX2-NEXT: vpmulld %ymm3, %ymm2, %ymm2
3706+
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
3707+
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
3708+
; AVX2-NEXT: vpmaddwd %ymm2, %ymm3, %ymm2
37113709
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1
3712-
; AVX2-NEXT: vpmovsxwd %xmm1, %ymm1
3713-
; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
3710+
; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
3711+
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
3712+
; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
3713+
; AVX2-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0
37143714
; AVX2-NEXT: vphaddd %ymm0, %ymm2, %ymm0
37153715
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
37163716
; AVX2-NEXT: retq
37173717
;
3718-
; AVX512-LABEL: oddvector_mul:
3719-
; AVX512: # %bb.0:
3720-
; AVX512-NEXT: vpmovsxwd %ymm0, %zmm0
3721-
; AVX512-NEXT: vpmovsxwd %ymm1, %zmm1
3722-
; AVX512-NEXT: vpmulld %zmm1, %zmm0, %zmm0
3723-
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
3724-
; AVX512-NEXT: vphaddd %ymm1, %ymm0, %ymm0
3725-
; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
3726-
; AVX512-NEXT: retq
3718+
; AVX512F-LABEL: oddvector_mul:
3719+
; AVX512F: # %bb.0:
3720+
; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0
3721+
; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1
3722+
; AVX512F-NEXT: vpmulld %zmm1, %zmm0, %zmm0
3723+
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
3724+
; AVX512F-NEXT: vphaddd %ymm1, %ymm0, %ymm0
3725+
; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
3726+
; AVX512F-NEXT: retq
3727+
;
3728+
; AVX512BW-LABEL: oddvector_mul:
3729+
; AVX512BW: # %bb.0:
3730+
; AVX512BW-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero
3731+
; AVX512BW-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3732+
; AVX512BW-NEXT: vpmaddwd %zmm1, %zmm0, %zmm0
3733+
; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm1
3734+
; AVX512BW-NEXT: vphaddd %ymm1, %ymm0, %ymm0
3735+
; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
3736+
; AVX512BW-NEXT: retq
37273737
%a = sext <16 x i16> %A to <16 x i32>
37283738
%b = sext <16 x i16> %B to <16 x i32>
37293739
%m = mul nsw <16 x i32> %a, %b

‎llvm/test/CodeGen/X86/shrink_vmul.ll‎

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -1238,18 +1238,18 @@ define void @mul_16xi16_sext(ptr nocapture readonly %a, ptr nocapture readonly %
12381238
; X86-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
12391239
; X86-AVX1-NEXT: movl {{[0-9]+}}(%esp), %esi
12401240
; X86-AVX1-NEXT: movl c, %ecx
1241-
; X86-AVX1-NEXT: vpmovsxwd 24(%esi,%eax), %xmm0
1242-
; X86-AVX1-NEXT: vpmovsxwd 16(%esi,%eax), %xmm1
1243-
; X86-AVX1-NEXT: vpmovsxwd 8(%esi,%eax), %xmm2
1244-
; X86-AVX1-NEXT: vpmovsxwd (%esi,%eax), %xmm3
1245-
; X86-AVX1-NEXT: vpmovsxwd 24(%edx,%eax), %xmm4
1246-
; X86-AVX1-NEXT: vpmulld %xmm0, %xmm4, %xmm0
1247-
; X86-AVX1-NEXT: vpmovsxwd 16(%edx,%eax), %xmm4
1248-
; X86-AVX1-NEXT: vpmulld %xmm1, %xmm4, %xmm1
1249-
; X86-AVX1-NEXT: vpmovsxwd 8(%edx,%eax), %xmm4
1250-
; X86-AVX1-NEXT: vpmulld %xmm2, %xmm4, %xmm2
1251-
; X86-AVX1-NEXT: vpmovsxwd (%edx,%eax), %xmm4
1252-
; X86-AVX1-NEXT: vpmulld %xmm3, %xmm4, %xmm3
1241+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1242+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1243+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1244+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm3 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1245+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1246+
; X86-AVX1-NEXT: vpmaddwd %xmm0, %xmm4, %xmm0
1247+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1248+
; X86-AVX1-NEXT: vpmaddwd %xmm1, %xmm4, %xmm1
1249+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1250+
; X86-AVX1-NEXT: vpmaddwd %xmm2, %xmm4, %xmm2
1251+
; X86-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1252+
; X86-AVX1-NEXT: vpmaddwd %xmm3, %xmm4, %xmm3
12531253
; X86-AVX1-NEXT: vmovdqu %xmm0, 48(%ecx,%eax,4)
12541254
; X86-AVX1-NEXT: vmovdqu %xmm1, 32(%ecx,%eax,4)
12551255
; X86-AVX1-NEXT: vmovdqu %xmm2, 16(%ecx,%eax,4)
@@ -1264,12 +1264,12 @@ define void @mul_16xi16_sext(ptr nocapture readonly %a, ptr nocapture readonly %
12641264
; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
12651265
; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %edx
12661266
; X86-AVX2-NEXT: movl c, %esi
1267-
; X86-AVX2-NEXT: vpmovsxwd 16(%edx,%ecx), %ymm0
1268-
; X86-AVX2-NEXT: vpmovsxwd (%edx,%ecx), %ymm1
1269-
; X86-AVX2-NEXT: vpmovsxwd 16(%eax,%ecx), %ymm2
1270-
; X86-AVX2-NEXT: vpmulld %ymm0, %ymm2, %ymm0
1271-
; X86-AVX2-NEXT: vpmovsxwd (%eax,%ecx), %ymm2
1272-
; X86-AVX2-NEXT: vpmulld %ymm1, %ymm2, %ymm1
1267+
; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1268+
; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1269+
; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1270+
; X86-AVX2-NEXT: vpmaddwd %ymm0, %ymm2, %ymm0
1271+
; X86-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1272+
; X86-AVX2-NEXT: vpmaddwd %ymm1, %ymm2, %ymm1
12731273
; X86-AVX2-NEXT: vmovdqu %ymm0, 32(%esi,%ecx,4)
12741274
; X86-AVX2-NEXT: vmovdqu %ymm1, (%esi,%ecx,4)
12751275
; X86-AVX2-NEXT: popl %esi
@@ -1304,18 +1304,18 @@ define void @mul_16xi16_sext(ptr nocapture readonly %a, ptr nocapture readonly %
13041304
; X64-AVX1-LABEL: mul_16xi16_sext:
13051305
; X64-AVX1: # %bb.0: # %entry
13061306
; X64-AVX1-NEXT: movq c(%rip), %rax
1307-
; X64-AVX1-NEXT: vpmovsxwd 24(%rdi,%rdx), %xmm0
1308-
; X64-AVX1-NEXT: vpmovsxwd 16(%rdi,%rdx), %xmm1
1309-
; X64-AVX1-NEXT: vpmovsxwd 8(%rdi,%rdx), %xmm2
1310-
; X64-AVX1-NEXT: vpmovsxwd (%rdi,%rdx), %xmm3
1311-
; X64-AVX1-NEXT: vpmovsxwd 24(%rsi,%rdx), %xmm4
1312-
; X64-AVX1-NEXT: vpmulld %xmm0, %xmm4, %xmm0
1313-
; X64-AVX1-NEXT: vpmovsxwd 16(%rsi,%rdx), %xmm4
1314-
; X64-AVX1-NEXT: vpmulld %xmm1, %xmm4, %xmm1
1315-
; X64-AVX1-NEXT: vpmovsxwd 8(%rsi,%rdx), %xmm4
1316-
; X64-AVX1-NEXT: vpmulld %xmm2, %xmm4, %xmm2
1317-
; X64-AVX1-NEXT: vpmovsxwd (%rsi,%rdx), %xmm4
1318-
; X64-AVX1-NEXT: vpmulld %xmm3, %xmm4, %xmm3
1307+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1308+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1309+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1310+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm3 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1311+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1312+
; X64-AVX1-NEXT: vpmaddwd %xmm0, %xmm4, %xmm0
1313+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1314+
; X64-AVX1-NEXT: vpmaddwd %xmm1, %xmm4, %xmm1
1315+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1316+
; X64-AVX1-NEXT: vpmaddwd %xmm2, %xmm4, %xmm2
1317+
; X64-AVX1-NEXT: vpmovzxwd {{.*#+}} xmm4 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1318+
; X64-AVX1-NEXT: vpmaddwd %xmm3, %xmm4, %xmm3
13191319
; X64-AVX1-NEXT: vmovdqu %xmm0, 48(%rax,%rdx,4)
13201320
; X64-AVX1-NEXT: vmovdqu %xmm1, 32(%rax,%rdx,4)
13211321
; X64-AVX1-NEXT: vmovdqu %xmm2, 16(%rax,%rdx,4)
@@ -1325,12 +1325,12 @@ define void @mul_16xi16_sext(ptr nocapture readonly %a, ptr nocapture readonly %
13251325
; X64-AVX2-LABEL: mul_16xi16_sext:
13261326
; X64-AVX2: # %bb.0: # %entry
13271327
; X64-AVX2-NEXT: movq c(%rip), %rax
1328-
; X64-AVX2-NEXT: vpmovsxwd 16(%rdi,%rdx), %ymm0
1329-
; X64-AVX2-NEXT: vpmovsxwd (%rdi,%rdx), %ymm1
1330-
; X64-AVX2-NEXT: vpmovsxwd 16(%rsi,%rdx), %ymm2
1331-
; X64-AVX2-NEXT: vpmulld %ymm0, %ymm2, %ymm0
1332-
; X64-AVX2-NEXT: vpmovsxwd (%rsi,%rdx), %ymm2
1333-
; X64-AVX2-NEXT: vpmulld %ymm1, %ymm2, %ymm1
1328+
; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1329+
; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1330+
; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1331+
; X64-AVX2-NEXT: vpmaddwd %ymm0, %ymm2, %ymm0
1332+
; X64-AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
1333+
; X64-AVX2-NEXT: vpmaddwd %ymm1, %ymm2, %ymm1
13341334
; X64-AVX2-NEXT: vmovdqu %ymm0, 32(%rax,%rdx,4)
13351335
; X64-AVX2-NEXT: vmovdqu %ymm1, (%rax,%rdx,4)
13361336
; X64-AVX2-NEXT: vzeroupper

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