rockchip64-current: add opt-in helios64 CPU stability overlay

Author: iav

patch/kernel/archive/rockchip64-6.18/overlay/Makefile

@@ -37,6 +37,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 	rockchip-rk3399-dwc3-0-host.dtbo \
 	rockchip-rk3399-i2c7.dtbo \
 	rockchip-rk3399-i2c8.dtbo \
+	rockchip-rk3399-helios64-cpu-stability.dtbo \
 	rockchip-rk3399-opp-2ghz.dtbo \
 	rockchip-rk3399-pcie-gen2.dtbo \
 	rockchip-rk3399-spi-jedec-nor.dtbo \

patch/kernel/archive/rockchip64-6.18/overlay/README.rockchip-overlays

@@ -9,6 +9,7 @@ rockchip (Rockchip)
 ### Provided overlays:
 
 - i2c7, i2c8, pcie-gen2, spi-spidev, uart4, w1-gpio
+- rk3399-helios64-cpu-stability (Helios64 only)
 
 for RK3308:
 - b@1,3ghz, bs, bs-1.3ghz, otg-host, uart1, uart2, uart3, s0-ext-antenna
@@ -71,6 +72,19 @@ WARNING! Not officially supported by Rockchip!!!
 Adds the 1.5GHz opp for overclocking
 WARNING! Not officially supported by Rockchip!!!
 
+### rk3399-helios64-cpu-stability
+
+Opt-in workaround for reported instability of the Helios64 NAS (Kobol)
+under sustained CPU load. Raises the A72 big-cluster vcore by +75 mV on
+opp00..opp06 (408 MHz .. 1608 MHz): 0.900 / 0.900 / 0.900 / 0.950 /
+1.025 / 1.100 / 1.175 V respectively (mainline rk3399-op1-opp.dtsi:
+0.825 / 0.825 / 0.825 / 0.875 / 0.950 / 1.025 / 1.100 V). The 1.8 GHz
+top step is left at the mainline 1.20 V. Not enabled by default.
+
+Origin: empirical workaround from the Armbian forum (topics 30074 and
+58597, by prahal and ebin-dev); no upstream patch exists. Apply only if
+you observe random crashes or hangs on a Helios64.
+
 ### rk3399-opp-2ghz
 
 Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking

patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3399-helios64-cpu-stability.dtso

@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+/plugin/;
+
+/ {
+    compatible = "kobol,helios64";
+
+    fragment@0 {
+        target-path = "/opp-table-1";
+        __overlay__ {
+            /* opp-microvolt raised by +75 mV vs mainline (op1-opp.dtsi). */
+            /*  408 MHz: 0.825 V -> 0.900 V */
+            opp00 { opp-microvolt = < 900000  900000 1250000>; };
+            /*  600 MHz: 0.825 V -> 0.900 V */
+            opp01 { opp-microvolt = < 900000  900000 1250000>; };
+            /*  816 MHz: 0.825 V -> 0.900 V */
+            opp02 { opp-microvolt = < 900000  900000 1250000>; };
+            /* 1008 MHz: 0.875 V -> 0.950 V */
+            opp03 { opp-microvolt = < 950000  950000 1250000>; };
+            /* 1200 MHz: 0.950 V -> 1.025 V */
+            opp04 { opp-microvolt = <1025000 1025000 1250000>; };
+            /* 1416 MHz: 1.025 V -> 1.100 V */
+            opp05 { opp-microvolt = <1100000 1100000 1250000>; };
+            /* 1608 MHz: 1.100 V -> 1.175 V */
+            opp06 { opp-microvolt = <1175000 1175000 1250000>; };
+            /* 1800 MHz: 1.200 V — unchanged from mainline */
+        };
+    };
+};