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hqnicolasigorpecovnik
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Rockchip: youyeetoo yy3568: enable pci-e NVMe ssd
1 parent 40d65f2 commit 93e2cf6

4 files changed

Lines changed: 338 additions & 96 deletions

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patch/kernel/archive/rockchip64-6.18/dt/rk3568-yy3568.dts

100755100644
Lines changed: 43 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <dt-bindings/pwm/pwm.h>
1010
#include <dt-bindings/pinctrl/rockchip.h>
1111
#include <dt-bindings/soc/rockchip,vop2.h>
12+
#include <dt-bindings/clock/rk3568-cru.h>
1213
#include "rk3568.dtsi"
1314

1415
/ {
@@ -114,13 +115,37 @@
114115
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
115116
pinctrl-names = "default";
116117
pinctrl-0 = <&pcie_enable_h>;
118+
regulator-name = "vcc3v3_pi6c_05";
119+
regulator-min-microvolt = <3300000>;
120+
regulator-max-microvolt = <3300000>;
121+
vin-supply = <&vcc5v0_sys>;
122+
};
123+
124+
vcc3v3_pcie: vcc3v3-pcie-regulator {
125+
compatible = "regulator-fixed";
117126
regulator-name = "vcc3v3_pcie";
118127
regulator-min-microvolt = <3300000>;
119128
regulator-max-microvolt = <3300000>;
129+
enable-active-high;
130+
gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
131+
pinctrl-names = "default";
132+
pinctrl-0 = <&pcie30_pwr>;
133+
startup-delay-us = <5000>;
120134
vin-supply = <&vcc5v0_sys>;
121135
};
122136

123-
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
137+
pcie_oe_regulator: pcie-oe-regulator {
138+
compatible = "regulator-fixed";
139+
regulator-name = "pcie_oe";
140+
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
141+
pinctrl-names = "default";
142+
pinctrl-0 = <&pcie_oe>;
143+
//enable-active-high;
144+
regulator-always-on;
145+
regulator-boot-on;
146+
};
147+
148+
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
124149
compatible = "regulator-fixed";
125150
regulator-name = "pcie30_avdd0v9";
126151
regulator-always-on;
@@ -172,7 +197,7 @@
172197
};
173198

174199
&combphy1 {
175-
phy-supply = <&vcc3v3_pcie30x1>;
200+
phy-supply = <&pcie_oe_regulator>;
176201
status = "okay";
177202
};
178203

@@ -265,10 +290,11 @@
265290
&pcie3x2 {
266291
num-lanes = <1>;
267292
pinctrl-names = "default";
268-
pinctrl-0 = <&pcie30x2_reset_h>;
293+
pinctrl-0 = <&pcie30x2m1_pins>;
269294
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
270-
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
295+
vpcie3v3-supply = <&vcc3v3_pcie>;
271296
status = "okay";
297+
phys = <&pcie30phy>;
272298
};
273299

274300
&i2c0 {
@@ -299,6 +325,7 @@
299325
#clock-cells = <1>;
300326
pinctrl-names = "default";
301327
pinctrl-0 = <&pmic_int>;
328+
#sound-dai-cells = <0>;
302329
system-power-controller;
303330
wakeup-source;
304331

@@ -534,6 +561,14 @@
534561
pcie_enable_h: pcie-enable-h {
535562
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
536563
};
564+
565+
pcie30_pwr: pcie30-pwr {
566+
rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
567+
};
568+
569+
pcie_oe: pcie-oe {
570+
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
571+
};
537572
};
538573

539574
usb {
@@ -547,6 +582,10 @@
547582
};
548583
};
549584

585+
&i2s0_8ch {
586+
status = "okay";
587+
};
588+
550589
&i2s1_8ch {
551590
rockchip,trcm-sync-tx-only;
552591
status = "okay";

patch/kernel/archive/rockchip64-7.0/dt/rk3568-yy3568.dts

100755100644
Lines changed: 43 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <dt-bindings/pwm/pwm.h>
1010
#include <dt-bindings/pinctrl/rockchip.h>
1111
#include <dt-bindings/soc/rockchip,vop2.h>
12+
#include <dt-bindings/clock/rk3568-cru.h>
1213
#include "rk3568.dtsi"
1314

1415
/ {
@@ -114,13 +115,37 @@
114115
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
115116
pinctrl-names = "default";
116117
pinctrl-0 = <&pcie_enable_h>;
118+
regulator-name = "vcc3v3_pi6c_05";
119+
regulator-min-microvolt = <3300000>;
120+
regulator-max-microvolt = <3300000>;
121+
vin-supply = <&vcc5v0_sys>;
122+
};
123+
124+
vcc3v3_pcie: vcc3v3-pcie-regulator {
125+
compatible = "regulator-fixed";
117126
regulator-name = "vcc3v3_pcie";
118127
regulator-min-microvolt = <3300000>;
119128
regulator-max-microvolt = <3300000>;
129+
enable-active-high;
130+
gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
131+
pinctrl-names = "default";
132+
pinctrl-0 = <&pcie30_pwr>;
133+
startup-delay-us = <5000>;
120134
vin-supply = <&vcc5v0_sys>;
121135
};
122136

123-
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
137+
pcie_oe_regulator: pcie-oe-regulator {
138+
compatible = "regulator-fixed";
139+
regulator-name = "pcie_oe";
140+
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
141+
pinctrl-names = "default";
142+
pinctrl-0 = <&pcie_oe>;
143+
//enable-active-high;
144+
regulator-always-on;
145+
regulator-boot-on;
146+
};
147+
148+
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
124149
compatible = "regulator-fixed";
125150
regulator-name = "pcie30_avdd0v9";
126151
regulator-always-on;
@@ -172,7 +197,7 @@
172197
};
173198

174199
&combphy1 {
175-
phy-supply = <&vcc3v3_pcie30x1>;
200+
phy-supply = <&pcie_oe_regulator>;
176201
status = "okay";
177202
};
178203

@@ -265,10 +290,11 @@
265290
&pcie3x2 {
266291
num-lanes = <1>;
267292
pinctrl-names = "default";
268-
pinctrl-0 = <&pcie30x2_reset_h>;
293+
pinctrl-0 = <&pcie30x2m1_pins>;
269294
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
270-
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
295+
vpcie3v3-supply = <&vcc3v3_pcie>;
271296
status = "okay";
297+
phys = <&pcie30phy>;
272298
};
273299

274300
&i2c0 {
@@ -299,6 +325,7 @@
299325
#clock-cells = <1>;
300326
pinctrl-names = "default";
301327
pinctrl-0 = <&pmic_int>;
328+
#sound-dai-cells = <0>;
302329
system-power-controller;
303330
wakeup-source;
304331

@@ -534,6 +561,14 @@
534561
pcie_enable_h: pcie-enable-h {
535562
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
536563
};
564+
565+
pcie30_pwr: pcie30-pwr {
566+
rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
567+
};
568+
569+
pcie_oe: pcie-oe {
570+
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
571+
};
537572
};
538573

539574
usb {
@@ -547,6 +582,10 @@
547582
};
548583
};
549584

585+
&i2s0_8ch {
586+
status = "okay";
587+
};
588+
550589
&i2s1_8ch {
551590
rockchip,trcm-sync-tx-only;
552591
status = "okay";

patch/kernel/archive/rockchip64-7.1/dt/rk3568-yy3568.dts

100755100644
Lines changed: 43 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
#include <dt-bindings/pwm/pwm.h>
1010
#include <dt-bindings/pinctrl/rockchip.h>
1111
#include <dt-bindings/soc/rockchip,vop2.h>
12+
#include <dt-bindings/clock/rk3568-cru.h>
1213
#include "rk3568.dtsi"
1314

1415
/ {
@@ -114,13 +115,37 @@
114115
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
115116
pinctrl-names = "default";
116117
pinctrl-0 = <&pcie_enable_h>;
118+
regulator-name = "vcc3v3_pi6c_05";
119+
regulator-min-microvolt = <3300000>;
120+
regulator-max-microvolt = <3300000>;
121+
vin-supply = <&vcc5v0_sys>;
122+
};
123+
124+
vcc3v3_pcie: vcc3v3-pcie-regulator {
125+
compatible = "regulator-fixed";
117126
regulator-name = "vcc3v3_pcie";
118127
regulator-min-microvolt = <3300000>;
119128
regulator-max-microvolt = <3300000>;
129+
enable-active-high;
130+
gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
131+
pinctrl-names = "default";
132+
pinctrl-0 = <&pcie30_pwr>;
133+
startup-delay-us = <5000>;
120134
vin-supply = <&vcc5v0_sys>;
121135
};
122136

123-
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
137+
pcie_oe_regulator: pcie-oe-regulator {
138+
compatible = "regulator-fixed";
139+
regulator-name = "pcie_oe";
140+
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
141+
pinctrl-names = "default";
142+
pinctrl-0 = <&pcie_oe>;
143+
//enable-active-high;
144+
regulator-always-on;
145+
regulator-boot-on;
146+
};
147+
148+
pcie30_avdd0v9: regulator-pcie30-avdd0v9 {
124149
compatible = "regulator-fixed";
125150
regulator-name = "pcie30_avdd0v9";
126151
regulator-always-on;
@@ -172,7 +197,7 @@
172197
};
173198

174199
&combphy1 {
175-
phy-supply = <&vcc3v3_pcie30x1>;
200+
phy-supply = <&pcie_oe_regulator>;
176201
status = "okay";
177202
};
178203

@@ -265,10 +290,11 @@
265290
&pcie3x2 {
266291
num-lanes = <1>;
267292
pinctrl-names = "default";
268-
pinctrl-0 = <&pcie30x2_reset_h>;
293+
pinctrl-0 = <&pcie30x2m1_pins>;
269294
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
270-
vpcie3v3-supply = <&vcc3v3_pi6c_05>;
295+
vpcie3v3-supply = <&vcc3v3_pcie>;
271296
status = "okay";
297+
phys = <&pcie30phy>;
272298
};
273299

274300
&i2c0 {
@@ -299,6 +325,7 @@
299325
#clock-cells = <1>;
300326
pinctrl-names = "default";
301327
pinctrl-0 = <&pmic_int>;
328+
#sound-dai-cells = <0>;
302329
system-power-controller;
303330
wakeup-source;
304331

@@ -534,6 +561,14 @@
534561
pcie_enable_h: pcie-enable-h {
535562
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
536563
};
564+
565+
pcie30_pwr: pcie30-pwr {
566+
rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
567+
};
568+
569+
pcie_oe: pcie-oe {
570+
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
571+
};
537572
};
538573

539574
usb {
@@ -547,6 +582,10 @@
547582
};
548583
};
549584

585+
&i2s0_8ch {
586+
status = "okay";
587+
};
588+
550589
&i2s1_8ch {
551590
rockchip,trcm-sync-tx-only;
552591
status = "okay";

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