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| 1 | +CONFIG_ARM=y |
| 2 | +CONFIG_ARCH_ROCKCHIP=y |
| 3 | +CONFIG_SYS_MALLOC_F_LEN=0x80000 |
| 4 | +CONFIG_SF_DEFAULT_SPEED=20000000 |
| 5 | +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-bigtreetech-pi2" |
| 6 | +CONFIG_ROCKCHIP_RK3568=y |
| 7 | +CONFIG_SPL_SERIAL=y |
| 8 | +CONFIG_SYS_LOAD_ADDR=0xc00800 |
| 9 | +CONFIG_DEBUG_UART_BASE=0xFE660000 |
| 10 | +CONFIG_DEBUG_UART_CLOCK=24000000 |
| 11 | +CONFIG_SPL_LIBDISK_SUPPORT=y |
| 12 | +CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 13 | +CONFIG_SPL_SPI=y |
| 14 | +CONFIG_PCI=y |
| 15 | +CONFIG_DEBUG_UART=y |
| 16 | +CONFIG_FIT=y |
| 17 | +CONFIG_FIT_VERBOSE=y |
| 18 | +CONFIG_SPL_FIT_SIGNATURE=y |
| 19 | +CONFIG_SPL_LOAD_FIT=y |
| 20 | +CONFIG_LEGACY_IMAGE_FORMAT=y |
| 21 | +CONFIG_BOOTDELAY=0 |
| 22 | +# CONFIG_DISPLAY_CPUINFO is not set |
| 23 | +CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 24 | +CONFIG_SPL_MAX_SIZE=0x40000 |
| 25 | +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 26 | +CONFIG_SPL_MMC_WRITE=y |
| 27 | +CONFIG_SPL_DM_RESET=y |
| 28 | +CONFIG_SPL_SPI_LOAD=y |
| 29 | +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 |
| 30 | +CONFIG_SPL_ATF=y |
| 31 | +CONFIG_SYS_PROMPT="BTTPI2@uboot:~$ " |
| 32 | +CONFIG_CMD_BOOTZ=y |
| 33 | +# CONFIG_CMD_ELF is not set |
| 34 | +# CONFIG_CMD_IMI is not set |
| 35 | +# CONFIG_CMD_XIMG is not set |
| 36 | +# CONFIG_CMD_LZMADEC is not set |
| 37 | +# CONFIG_CMD_UNZIP is not set |
| 38 | +CONFIG_CMD_GPT=y |
| 39 | +# CONFIG_CMD_LOADB is not set |
| 40 | +# CONFIG_CMD_LOADS is not set |
| 41 | +CONFIG_CMD_MMC=y |
| 42 | +CONFIG_CMD_MTD=y |
| 43 | +CONFIG_CMD_PCI=y |
| 44 | +CONFIG_CMD_USB=y |
| 45 | +CONFIG_CMD_USB_MASS_STORAGE=y |
| 46 | +# CONFIG_CMD_ITEST is not set |
| 47 | +CONFIG_CMD_TFTPPUT=y |
| 48 | +# CONFIG_NET_TFTP_VARS is not set |
| 49 | +# CONFIG_SPL_DOS_PARTITION is not set |
| 50 | +# CONFIG_ISO_PARTITION is not set |
| 51 | +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 |
| 52 | +CONFIG_SPL_OF_CONTROL=y |
| 53 | +CONFIG_OF_LIVE=y |
| 54 | +CONFIG_OF_UPSTREAM=y |
| 55 | +CONFIG_OF_SPL_REMOVE_PROPS="" |
| 56 | +CONFIG_SPL_DM_SEQ_ALIAS=y |
| 57 | +CONFIG_SPL_REGMAP=y |
| 58 | +CONFIG_SPL_SYSCON=y |
| 59 | +CONFIG_SPL_CLK=y |
| 60 | +CONFIG_FASTBOOT_BUF_ADDR=0xc00800 |
| 61 | +CONFIG_FASTBOOT_BUF_SIZE=0x04000000 |
| 62 | +CONFIG_ROCKCHIP_GPIO=y |
| 63 | +CONFIG_SYS_I2C_ROCKCHIP=y |
| 64 | +CONFIG_LED=y |
| 65 | +CONFIG_LED_GPIO=y |
| 66 | +CONFIG_MISC=y |
| 67 | +CONFIG_MMC_DW=y |
| 68 | +CONFIG_MMC_DW_ROCKCHIP=y |
| 69 | +CONFIG_MMC_SDHCI=y |
| 70 | +CONFIG_MMC_SDHCI_SDMA=y |
| 71 | +CONFIG_MMC_SDHCI_ROCKCHIP=y |
| 72 | +CONFIG_SPI_FLASH_EON=y |
| 73 | +CONFIG_SPI_FLASH_GIGADEVICE=y |
| 74 | +CONFIG_SPI_FLASH_MACRONIX=y |
| 75 | +CONFIG_SPI_FLASH_WINBOND=y |
| 76 | +CONFIG_SPI_FLASH_XMC=y |
| 77 | +CONFIG_SPI_FLASH_MTD=y |
| 78 | +CONFIG_PHY_MOTORCOMM=y |
| 79 | +CONFIG_DM_ETH_PHY=y |
| 80 | +CONFIG_PHY_GIGE=y |
| 81 | +CONFIG_DWC_ETH_QOS=y |
| 82 | +CONFIG_NVME=y |
| 83 | +CONFIG_DM_PCI_COMPAT=y |
| 84 | +CONFIG_PCIE_DW_ROCKCHIP=y |
| 85 | +CONFIG_PHY_ROCKCHIP_INNO_USB2=y |
| 86 | +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y |
| 87 | +CONFIG_SPL_PINCTRL=y |
| 88 | +CONFIG_DM_PMIC=y |
| 89 | +CONFIG_PMIC_RK8XX=y |
| 90 | +CONFIG_SPL_PMIC_RK8XX=y |
| 91 | +CONFIG_REGULATOR_RK8XX=y |
| 92 | +CONFIG_SPL_RAM=y |
| 93 | +CONFIG_ROCKCHIP_SDRAM_COMMON=y |
| 94 | +CONFIG_BAUDRATE=1500000 |
| 95 | +CONFIG_DEBUG_UART_SHIFT=2 |
| 96 | +CONFIG_SYS_NS16550_MEM32=y |
| 97 | +CONFIG_ROCKCHIP_SFC=y |
| 98 | +CONFIG_SYSRESET=y |
| 99 | +CONFIG_USB=y |
| 100 | +CONFIG_USB_XHCI_HCD=y |
| 101 | +CONFIG_USB_XHCI_DWC3=y |
| 102 | +CONFIG_USB_XHCI_PCI=y |
| 103 | +CONFIG_USB_EHCI_HCD=y |
| 104 | +CONFIG_USB_EHCI_GENERIC=y |
| 105 | +CONFIG_USB_OHCI_HCD=y |
| 106 | +CONFIG_USB_OHCI_GENERIC=y |
| 107 | +CONFIG_USB_DWC3=y |
| 108 | +CONFIG_USB_DWC3_GENERIC=y |
| 109 | +CONFIG_USB_GADGET=y |
| 110 | +CONFIG_SHA512=y |
| 111 | +CONFIG_SPL_GZIP=y |
| 112 | +CONFIG_ERRNO_STR=y |
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