feat(bleach): change function signatures

Author: arromanoff

lib/lifter/lifter.cpp

@@ -214,6 +214,7 @@ auto *create_bleach_symtab_lookup_function_decl(Module &m) {
 }
 auto *generate_function_object(Module &m, MachineFunction &mf) {
   auto *ret_type = mf.getFunction().getFunctionType()->getReturnType();
+  ret_type = Type::getVoidTy(m.getContext());
   auto *func_type = FunctionType::get(
       ret_type, ArrayRef<Type *>{PointerType::getUnqual(m.getContext())},
       /* is var arg */ false);
@@ -693,7 +694,7 @@ static auto generate_return(const MachineInstr &minst,
                             const Function *func) -> Value * {
   // TODO: properly handle return operand
   // non-void case
-  if (minst.getNumOperands() >= 1) {
+  if (false && minst.getNumOperands() >= 1) {
     auto ret = minst.getOperand(0);
     assert(ret.isReg());
     auto *reg_val =
@@ -1144,6 +1145,7 @@ Module &bleach_module(Module &m, MachineModuleInfo &mmi,
   for (auto &&[oldf, func_info] : funcs)
     generate_function(*oldf, func_info, instrs, mmi, state, reg_stats,
                       assume_functions_nop);
+  m.print(errs(), nullptr);
   if (finfo) {
     for (auto *func :
          translated | views::filter([](auto *f) { return !f->empty(); }))

test/integration/indbr.s

@@ -28,8 +28,8 @@ main:
   addi a0, a0, -5
   ret
 
-# CHECK: define i64 @count_to_5
+# CHECK: define void @count_to_5
 # CHECK-NEXT: call void @bleach_symtab_add(i64 0, ptr @count_to_5)
 # CHECK: [[FUNCADDR:%[0-9]+]] = call ptr @bleach_symtab_lookup
-# CHECK: musttail call i64 [[FUNCADDR]]
+# CHECK: musttail call void [[FUNCADDR]]
 

test/tools/llvm-bleach/arith-sum/main.c

@@ -5,8 +5,6 @@
 // generated header
 #include <state.h>
 
-extern double arith_seq_sum(struct register_state *st);
-
 static struct register_state regs = {};
 
 double uitod(int64_t n) {

test/tools/llvm-bleach/fact/main.c

@@ -7,7 +7,8 @@ static struct register_state regs = {};
 static long long lifted_factorial(long long n) {
   // According to RISC-V calling convention X10 is the first argument
   regs.GPR[10] = n;
-  return fact(&regs);
+  fact(&regs);
+  return regs.GPR[10];
 }
 
 void test(long long n) {

test/tools/llvm-bleach/fibonacci/main.c

@@ -7,7 +7,8 @@ static struct register_state regs = {};
 static long long lifted_fibonacci(long long n) {
   // According to RISC-V calling convention X10 is the first argument
   regs.GPR[10] = n;
-  return fibonacci(&regs);
+  fibonacci(&regs);
+  return regs.GPR[10];
 }
 
 void test(long long n) {

test/tools/llvm-bleach/ir-logical-branches.test

@@ -1,9 +1,9 @@
 # RUN: %bin/llvm-bleach %S/inputs/logical-branches.mir \
 # RUN:   --instructions=%S/inputs/logical.yaml -noinline-instr | FileCheck %s
 
-# CHECK: define i64 @foo(ptr %0) {
+# CHECK: define void @foo(ptr %0) {
 # CHECK-NEXT:   %GPR = getelementptr %register_state, ptr %0, i32 0, i32 0
 # CHECK:   br label %[[BLOCK1:[0-9]+]]
 # CHECK: [[BLOCK1]]:
-# CHECK:   ret i64 %[[RET:[0-9]+]]
+# CHECK:   ret void
 # CHECK-NEXT: }

test/tools/llvm-bleach/ir-logical-cond-branches-no-blocks.test

@@ -1,11 +1,11 @@
 # RUN: %bin/llvm-bleach %S/inputs/logical-cond-branches-no-blocks.mir \
 # RUN:   --instructions=%S/inputs/logical.yaml -noinline-instr | FileCheck %s
 
-# CHECK: define i64 @foo(ptr %0) {
+# CHECK: define void @foo(ptr %0) {
 # CHECK-NEXT:   %GPR = getelementptr %register_state, ptr %0, i32 0, i32 0
 # CHECK:   br label %[[BLOCK1:[0-9]+]]
 # CHECK: [[BLOCK1]]:
 # CHECK:   br i1 %{{.*}}, label %[[BLOCK1]], label %[[BLOCK2:[0-9]+]]
 # CHECK: [[BLOCK2]]:
-# CHECK:   ret i64
+# CHECK:   ret void
 # CHECK: }

test/tools/llvm-bleach/ir-logical-cond-branches.test

@@ -1,11 +1,11 @@
 # RUN: %bin/llvm-bleach %S/inputs/logical-cond-branches.mir \
 # RUN:   --instructions=%S/inputs/logical.yaml -noinline-instr | FileCheck %s
 
-# CHECK: define i64 @foo(ptr %0) {
+# CHECK: define void @foo(ptr %0) {
 # CHECK-NEXT:   %GPR = getelementptr %register_state, ptr %0, i32 0, i32 0
 # CHECK:   br label %[[BLOCK1:[0-9]+]]
 # CHECK: [[BLOCK1]]:
 # CHECK:   br i1 %{{.*}}, label %[[BLOCK1]], label %[[BLOCK2:[0-9]+]]
 # CHECK: [[BLOCK2]]:
-# CHECK:   ret i64
+# CHECK:   ret void
 # CHECK: }

test/tools/llvm-bleach/ir-logical.test

@@ -1,7 +1,7 @@
 # RUN: %bin/llvm-bleach %S/inputs/logical.mir \
 # RUN:   --instructions=%S/inputs/logical.yaml -noinline-instr | FileCheck %s
 
-# CHECK: define i64 @foo(ptr %0) {
+# CHECK: define void @foo(ptr %0) {
 # CHECK-NEXT:   %GPR = getelementptr %register_state, ptr %0, i32 0, i32 0
 # CHECK:   [[X10ADDR:%[0-9]+]] = getelementptr inbounds [32 x i64], ptr %GPR, i32 0, i32 10
 # CHECK-NEXT:   [[X10:%[0-9]+]] = load i64, ptr [[X10ADDR]], align 8

test/tools/llvm-bleach/main.test

@@ -1,4 +1,4 @@
 # RUN: %bin/llvm-bleach %S/inputs/main-ret-zero.mir \
 # RUN:   --instructions=%S/inputs/logical.yaml | FileCheck %s
 
-# CHECK: define i32 @bleached_main(ptr %0)
+# CHECK: define void @bleached_main(ptr %0)