big veriisle squash

Author: avanhatt

Cargo.lock

@@ -135,6 +135,11 @@ members = [
   "cranelift",
   "cranelift/isle/fuzz",
   "cranelift/isle/islec",
+  "cranelift/isle/veri/aslp",
+  "cranelift/isle/veri/isaspec",
+  "cranelift/isle/veri/meta",
+  "cranelift/isle/veri/test-macros",
+  "cranelift/isle/veri/veri",
   "cranelift/serde",
   "crates/bench-api",
   "crates/c-api/artifact",
@@ -321,6 +326,7 @@ hyper = "1.0.1"
 http = "1.0.0"
 http-body = "1.0.0"
 http-body-util = "0.1.0"
+reqwest = "0.11"
 bytes = "1.4"
 futures = { version = "0.3.27", default-features = false }
 indexmap = { version = "2.0.0", default-features = false }

Cargo.toml

@@ -171,14 +171,14 @@ fn build_isle(
 
     let mut had_error = false;
     for compilation in &isle_compilations.items {
-        for file in &compilation.inputs {
+        for file in &compilation.tracked_inputs {
             println!("cargo:rerun-if-changed={}", file.display());
         }
 
         if let Err(e) = run_compilation(compilation) {
             had_error = true;
             eprintln!("Error building ISLE files:");
-            eprintln!("{e:?}");
+            eprintln!("{e}");
             #[cfg(not(feature = "isle-errors"))]
             {
                 eprintln!("To see a more detailed error report, run: ");
@@ -209,11 +209,11 @@ fn run_compilation(compilation: &IsleCompilation) -> Result<(), Errors> {
 
     let code = {
         let file_paths = compilation
-            .inputs
-            .iter()
-            .chain(compilation.untracked_inputs.iter());
+            .paths()
+            .map_err(|e| Errors::from_io(e, "list isle compilation file paths"))?;
 
         let mut options = isle::codegen::CodegenOptions::default();
+        options.rule_trace = compilation.rule_trace;
         // Because we include!() the generated ISLE source, we cannot
         // put the global pragmas (`#![allow(...)]`) in the ISLE
         // source itself; we have to put them in the source that

cranelift/codegen/build.rs

@@ -18,6 +18,8 @@ impl Error {
     }
 }
 
+impl std::error::Error for Error {}
+
 impl fmt::Display for Error {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
         write!(f, "{}", self.inner)

cranelift/codegen/meta/src/error.rs

@@ -220,14 +220,13 @@ fn gen_common_isle(
             continue;
         }
 
+        let has_ty_param = !inst.format.has_value_list && inst.value_results.len() >= 1;
+
         fmtln!(
             fmt,
             "(decl {} ({}{}) {})",
             inst.name,
-            match isle_target {
-                IsleTarget::Lower => "",
-                IsleTarget::Opt => "Type ",
-            },
+            if has_ty_param { "Type " } else { "" },
             inst.operands_in
                 .iter()
                 .map(|o| {
@@ -242,16 +241,14 @@ fn gen_common_isle(
                 .join(" "),
             ret_ty
         );
+        fmtln!(fmt, "(attr {} (tag clif_{}))", inst.name, inst.name);
         fmtln!(fmt, "(extractor");
         fmt.indent(|fmt| {
             fmtln!(
                 fmt,
                 "({} {}{})",
                 inst.name,
-                match isle_target {
-                    IsleTarget::Lower => "",
-                    IsleTarget::Opt => "ty ",
-                },
+                if has_ty_param { "ty " } else { "" },
                 inst.operands_in
                     .iter()
                     .map(|o| { o.name })
@@ -260,11 +257,8 @@ fn gen_common_isle(
             );
 
             let mut s = format!(
-                "(inst_data{} (InstructionData.{} (Opcode.{})",
-                match isle_target {
-                    IsleTarget::Lower => "",
-                    IsleTarget::Opt => " ty",
-                },
+                "(inst_data {} (InstructionData.{} (Opcode.{})",
+                if has_ty_param { "ty" } else { "_" },
                 inst.format.name,
                 inst.camel_name
             );

cranelift/codegen/meta/src/gen_isle.rs

@@ -1,3 +1,5 @@
+use std::io::Result;
+
 /// A list of compilations (transformations from ISLE source to
 /// generated Rust source) that exist in the repository.
 ///
@@ -11,11 +13,62 @@ pub struct IsleCompilations {
     pub items: Vec<IsleCompilation>,
 }
 
+impl IsleCompilations {
+    pub fn lookup(&self, name: &str) -> Option<&IsleCompilation> {
+        for compilation in &self.items {
+            if compilation.name == name {
+                return Some(compilation);
+            }
+        }
+        None
+    }
+}
+
 #[derive(Clone, Debug)]
 pub struct IsleCompilation {
+    pub name: String,
     pub output: std::path::PathBuf,
-    pub inputs: Vec<std::path::PathBuf>,
+    pub tracked_inputs: Vec<std::path::PathBuf>,
     pub untracked_inputs: Vec<std::path::PathBuf>,
+    pub rule_trace: bool,
+}
+
+impl IsleCompilation {
+    /// All inputs to the computation, tracked or untracked. May contain directories.
+    pub fn inputs(&self) -> Vec<std::path::PathBuf> {
+        self.tracked_inputs
+            .iter()
+            .chain(self.untracked_inputs.iter())
+            .cloned()
+            .collect()
+    }
+
+    /// All path inputs to the compilation. Directory inputs are expanded to the
+    /// list of all ISLE files in the directory.
+    pub fn paths(&self) -> Result<Vec<std::path::PathBuf>> {
+        let mut paths = Vec::new();
+        for input in self.inputs() {
+            paths.extend(Self::expand_paths(&input)?);
+        }
+        Ok(paths)
+    }
+
+    fn expand_paths(input: &std::path::PathBuf) -> Result<Vec<std::path::PathBuf>> {
+        if input.is_file() {
+            return Ok(vec![input.clone()]);
+        }
+
+        let mut paths = Vec::new();
+        for entry in std::fs::read_dir(input)? {
+            let path = entry?.path();
+            if let Some(ext) = path.extension() {
+                if ext == "isle" {
+                    paths.push(path);
+                }
+            }
+        }
+        Ok(paths)
+    }
 }
 
 /// Construct the list of compilations (transformations from ISLE
@@ -30,6 +83,11 @@ pub fn get_isle_compilations(
     let prelude_isle = codegen_crate_dir.join("src").join("prelude.isle");
     let prelude_opt_isle = codegen_crate_dir.join("src").join("prelude_opt.isle");
     let prelude_lower_isle = codegen_crate_dir.join("src").join("prelude_lower.isle");
+    let prelude_spec_isle = codegen_crate_dir.join("src").join("prelude_spec.isle");
+    let inst_specs_isle = codegen_crate_dir.join("src").join("inst_specs.isle");
+    let inst_tags_isle = codegen_crate_dir.join("src").join("inst_tags.isle");
+    let fpconst_isle = codegen_crate_dir.join("src").join("fpconst.isle");
+    let state_isle = codegen_crate_dir.join("src").join("state.isle");
 
     // Directory for mid-end optimizations.
     let src_opts = codegen_crate_dir.join("src").join("opts");
@@ -61,10 +119,14 @@ pub fn get_isle_compilations(
         items: vec![
             // The mid-end optimization rules.
             IsleCompilation {
+                name: "opt".to_string(),
                 output: gen_dir.join("isle_opt.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_opt_isle,
+                    prelude_spec_isle.clone(),
+                    inst_specs_isle.clone(),
+                    inst_tags_isle.clone(),
                     src_opts.join("arithmetic.isle"),
                     src_opts.join("bitops.isle"),
                     src_opts.join("cprop.isle"),
@@ -78,64 +140,90 @@ pub fn get_isle_compilations(
                     src_opts.join("vector.isle"),
                 ],
                 untracked_inputs: vec![clif_opt_isle],
+                rule_trace: false,
             },
             // The x86-64 instruction selector.
             IsleCompilation {
+                name: "x64".to_string(),
                 output: gen_dir.join("isle_x64.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_lower_isle.clone(),
+                    prelude_spec_isle.clone(),
+                    inst_specs_isle.clone(),
+                    inst_tags_isle.clone(),
                     src_isa_x64.join("inst.isle"),
                     src_isa_x64.join("lower.isle"),
                 ],
                 untracked_inputs: vec![clif_lower_isle.clone()],
+                rule_trace: false,
             },
             // The aarch64 instruction selector.
             IsleCompilation {
+                name: "aarch64".to_string(),
                 output: gen_dir.join("isle_aarch64.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_lower_isle.clone(),
+                    prelude_spec_isle.clone(),
+                    inst_specs_isle.clone(),
+                    inst_tags_isle.clone(),
+                    fpconst_isle.clone(),
+                    state_isle.clone(),
                     src_isa_aarch64.join("inst.isle"),
                     src_isa_aarch64.join("inst_neon.isle"),
+                    src_isa_aarch64.join("spec"),
                     src_isa_aarch64.join("lower.isle"),
                     src_isa_aarch64.join("lower_dynamic_neon.isle"),
                 ],
                 untracked_inputs: vec![clif_lower_isle.clone()],
+                rule_trace: true,
             },
             // The s390x instruction selector.
             IsleCompilation {
+                name: "s390x".to_string(),
                 output: gen_dir.join("isle_s390x.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_lower_isle.clone(),
+                    prelude_spec_isle.clone(),
+                    inst_specs_isle.clone(),
+                    inst_tags_isle.clone(),
                     src_isa_s390x.join("inst.isle"),
                     src_isa_s390x.join("lower.isle"),
                 ],
                 untracked_inputs: vec![clif_lower_isle.clone()],
+                rule_trace: false,
             },
             // The risc-v instruction selector.
             IsleCompilation {
+                name: "riscv64".to_string(),
                 output: gen_dir.join("isle_riscv64.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_lower_isle.clone(),
+                    prelude_spec_isle.clone(),
+                    inst_specs_isle.clone(),
+                    inst_tags_isle.clone(),
                     src_isa_risc_v.join("inst.isle"),
                     src_isa_risc_v.join("inst_vector.isle"),
                     src_isa_risc_v.join("lower.isle"),
                 ],
                 untracked_inputs: vec![clif_lower_isle.clone()],
+                rule_trace: false,
             },
             // The Pulley instruction selector.
             IsleCompilation {
+                name: "pulley".to_string(),
                 output: gen_dir.join("isle_pulley_shared.rs"),
-                inputs: vec![
+                tracked_inputs: vec![
                     prelude_isle.clone(),
                     prelude_lower_isle.clone(),
                     src_isa_pulley_shared.join("inst.isle"),
                     src_isa_pulley_shared.join("lower.isle"),
                 ],
                 untracked_inputs: vec![clif_lower_isle.clone()],
+                rule_trace: false,
             },
         ],
     }

cranelift/codegen/meta/src/isle.rs

@@ -0,0 +1,81 @@
+;; GENERATED BY `fpconst`. DO NOT EDIT!!!
+
+; Build one as a floating-point of the given width.
+(macro (fp_one w)
+    (conv_to w
+        (switch w
+            (32 #x000000003f800000)
+            (64 #x3ff0000000000000)
+       )
+    )
+)
+
+; Build negative one as a floating-point of the given width.
+(macro (fp_minus_one w)
+    (conv_to w
+        (switch w
+            (32 #x00000000bf800000)
+            (64 #xbff0000000000000)
+       )
+    )
+)
+
+; Build half as a floating-point of the given width.
+(macro (fp_half w)
+    (conv_to w
+        (switch w
+            (32 #x000000003f000000)
+            (64 #x3fe0000000000000)
+       )
+    )
+)
+
+; Build negative half as a floating-point of the given width.
+(macro (fp_minus_half w)
+    (conv_to w
+        (switch w
+            (32 #x00000000bf000000)
+            (64 #xbfe0000000000000)
+       )
+    )
+)
+
+; Build 32-bit integer minimum as a floating-point of the given width.
+(macro (fp_i32_min w)
+    (conv_to w
+        (switch w
+            (32 #x00000000cf000000)
+            (64 #xc1e0000000000000)
+       )
+    )
+)
+
+; Build negative 32-bit integer minimum as a floating-point of the given width.
+(macro (fp_minus_i32_min w)
+    (conv_to w
+        (switch w
+            (32 #x000000004f000000)
+            (64 #x41e0000000000000)
+       )
+    )
+)
+
+; Build 64-bit integer minimum as a floating-point of the given width.
+(macro (fp_i64_min w)
+    (conv_to w
+        (switch w
+            (32 #x00000000df000000)
+            (64 #xc3e0000000000000)
+       )
+    )
+)
+
+; Build negative 64-bit integer minimum as a floating-point of the given width.
+(macro (fp_minus_i64_min w)
+    (conv_to w
+        (switch w
+            (32 #x000000005f000000)
+            (64 #x43e0000000000000)
+       )
+    )
+)