Hierarchal Synthesis on Vivado

[syedmshamrozeali]

How can I set reference to the checkpoint of pre-synthesized submodule while running the top level synthesis in order to save run-time. Are there any example scripts which I can refer to?

[czfpga]

Hi,

If you want to use pre-synthesized CL DCP, You can use the --flow ImplCL --tag <EXISTING_BUILD_TAG> options to run the implementation using an existing post-synth DCP. Make sure you have the post-synth DCP in the /checkpoints folder and replace the <EXISTING_BUILD_TAG> with that DCP's build tag.

Usage: aws_build_dcp_from_cl.py [options]

Options:
  -h, --help            show this help message and exit
  -c CL, --cl=CL        CL module name
  -m MODE, --mode=MODE  Mode of shell. Supported value is: small_shell.
                        Default to <small_shell>
  -f FLOW, --flow=FLOW  Build flow. Supported values are: SynthCL, ImplCL,
                        BuildAll. Default to <BuildAll>.
  --aws_clk_gen         Set this flag to enable custom clock recipes (only
                        functions with aws_)
  --clock_recipe_a=CLOCK_RECIPE_A
                        Select Clock Recipe for Clock Group A (A0 | A1 | A2)
  --clock_recipe_b=CLOCK_RECIPE_B
                        Select Clock Recipe for Clock Group B (B0 | B1 | B2 |
                        B3 | B4 | B5)
  --clock_recipe_c=CLOCK_RECIPE_C
                        Select Clock Recipe for Clock Group C (C0 | C1 | C2 |
                        C3)
  --clock_recipe_hbm=CLOCK_RECIPE_HBM
                        Select Clock Recipe for Clock Group HBM (H0 | H1 | H2
                        | H3 | H4 | H5)
  -p DIRECT, --place=DIRECT
                        Placement directive, refer to Vivado manual for
                        supported values. Default to <SSI_SpreadLogic_high>.
  -o DIRECT, --phy_opt=DIRECT
                        Physical Optimization directive, refer to Vivado
                        manual for supported values. Default to
                        <AggressiveExplore>.
  -r DIRECT, --route=DIRECT
                        Routing directive, refer to Vivado manual for
                        supported values. Default to <Explore>.
  -t BUILD_TAG, --tag=BUILD_TAG
                        Build tag. Default to <mm_DD_yy-HHMMSS>.
                        NOTE: Certain build flows might require a existing
                        build tag.

If you want to use pre-synthesized submodule for only a portion of the CL, there is no existing example to support that flow.

[syedmshamrozeali]

If you want to use pre-synthesized submodule for only a portion of the CL, there is no existing example to support that flow.

Yes, I want to used pre-synthesized module. Can you just guide me how to do that?

[czfpga]

Please refer to the Out-of-Context-Design-Flow in AMD user guide. One option for consideration is to package the submodule as a custom IP so that the IP's OOC DCP can be reused. Hope that helps.