Context switching overhead for RVV (Vector) in static RISC-V Type-1 Hypervisors under Edge AI workloads #385
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Hey @alex-kolovsky, You may have noticed that Bao is a static-partitioning hypervisor, meaning that there is no CPU sharing and, consequently, no context switching. That said, we are indeed working on a version of Bao that supports CPU sharing. Our focus remains on determinism, so we do not rely on lazy state switching. At configuration time, it must be explicitly defined which VMs may access each coprocessor or architectural extension that carries substantial architectural state. Regarding RISC-V and the V extension specifically, the architecture provides controls that can be used to avoid unnecessary state save and restore operations. And, of course, several implementation and memory-layout techniques can be applied to reduce the overhead further. Could you tell us more about the project you are developing, its target use cases, and what you mean specifically by a hypervisor tailored for Edge AI workloads? |
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Hi! I'm currently designing a static Type-1 hypervisor for RISC-V with lazy vector context switching tailored for Edge AI workloads. I wanted to ask if you've encountered significant memory/latency overhead when switching between multiple neural inference models on a single core, and how you approach this constraint in your architecture. Would love to hear your thoughts if you have a moment!
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