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chenlang
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[Hardware][RISC-V] Add riscv64 support
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src/python_bindings/mod.rs

Lines changed: 12 additions & 0 deletions
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@@ -259,4 +259,16 @@ pub mod pyruntime {
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_ => None,
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}
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}
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#[cfg(all(target_os = "linux", target_arch = "riscv64"))]
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pub fn get_tstate_current_offset(version: &Version) -> Option<usize> {
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match version {
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Version {
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major: 3,
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minor: 11,
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..
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} => Some(576),
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_ => None,
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}
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}
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}

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