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Initial variable pwm implementation
Added missing bits to update PWM cycle length
1 parent b0ed7db commit 4cc65e4

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+60
-29
lines changed

1 file changed

+60
-29
lines changed

Bluejay.asm

Lines changed: 60 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -194,7 +194,7 @@ Flag_Dir_Change_Brake BIT Flags1.5 ; Set when braking before direction change
194194
Flag_High_Rpm BIT Flags1.6 ; Set when motor rpm is high (Comm_Period4x_H less than 2)
195195

196196
Flags2: DS 1 ; State flags. NOT reset upon motor_start
197-
; BIT Flags2.0
197+
Flag_Variable_Pwm_Bits BIT Flags2.0 ; Set when programmed variable pwm
198198
Flag_Pgm_Dir_Rev BIT Flags2.1 ; Set if the programmed direction is reversed
199199
Flag_Pgm_Bidir BIT Flags2.2 ; Set if the programmed control mode is bidirectional operation
200200
Flag_32ms_Elapsed BIT Flags2.3 ; Set when timer2 interrupt is triggered
@@ -976,6 +976,43 @@ t1_int_zero_rcp_checked:
976976
mov Temp6, Pwm_Limit_By_Rpm
977977

978978

979+
; Check variable pwm
980+
jnb Flag_Variable_Pwm_Bits, t1_int_variable_pwm_done
981+
982+
; If variable pwm, set pwm bits depending on PWM_CENTERED 1 [3-1] or 0 [2-0]
983+
; and 8 bit rc pulse Temp2
984+
; A < 40%
985+
clr C
986+
mov A, Temp2
987+
subb A, #100
988+
jnc t1_int_variable_pwm_gt_40percent
989+
990+
t1_int_variable_pwm_lt_40percent:
991+
; rc pulse < 40% -> choose 96khz
992+
mov PwmBitsCount, 2
993+
sjmp t1_int_variable_pwm_centered
994+
995+
t1_int_variable_pwm_gt_40percent:
996+
subb A, #50
997+
jnc t1_int_variable_pwm_gt_60percent
998+
999+
; rc pulse < 60% -> choose 48khz
1000+
mov PwmBitsCount, 1
1001+
sjmp t1_int_variable_pwm_centered
1002+
1003+
t1_int_variable_pwm_gt_60percent:
1004+
; rc pulse >= 60% -> choose 24khz
1005+
mov PwmBitsCount, 0
1006+
1007+
t1_int_variable_pwm_centered:
1008+
IF PWM_CENTERED == 0
1009+
; Increment PwmBits count
1010+
inc PwmBitsCount
1011+
ENDIF
1012+
1013+
t1_int_variable_pwm_done:
1014+
1015+
9791016
; Limit PWM and scale pwm resolution and invert (duty cycle is defined inversely)
9801017
; depending on pwm bits count
9811018
mov A, PwmBitsCount
@@ -1045,7 +1082,11 @@ t1_int_pwm_limit_scale_dithering_pwm10bit_limited:
10451082
t1_int_pwm_limit_scale_dithering_pwm10bit_scaled:
10461083
mov A, Temp4 ; 11-bit low byte
10471084
cpl A
1048-
anl A, #((1 SHL (3 - 2)) - 1) ; Get index into dithering pattern table
1085+
anl A, #((1 SHL (3 - 2)) - 1) ; Get index [0,1] into dithering pattern table
1086+
1087+
; Multiplying by 4, select pattern [0, 4] on unified dithering pattern table
1088+
rl A
1089+
rl A
10491090

10501091
add A, #Dithering_Patterns
10511092
mov Temp1, A ; Reuse DShot pwm pointer since it is not currently in use.
@@ -1107,7 +1148,10 @@ t1_int_pwm_limit_scale_dithering_pwm9bit_limited:
11071148

11081149
mov A, Temp4 ; 11-bit low byte
11091150
cpl A
1110-
anl A, #((1 SHL (3 - 1)) - 1) ; Get index into dithering pattern table
1151+
anl A, #((1 SHL (3 - 1)) - 1) ; Get index [0-3] into dithering pattern table
1152+
1153+
; Multiplying by 2, select pattern [0, 2, 4, 6] on unified dithering pattern table
1154+
rl A
11111155

11121156
add A, #Dithering_Patterns
11131157
mov Temp1, A ; Reuse DShot pwm pointer since it is not currently in use.
@@ -1210,6 +1254,11 @@ t1_int_pwm_braking_set:
12101254
ENDIF
12111255

12121256

1257+
; Update pwm cycle length (8-11 bits)
1258+
mov A, #80h
1259+
add A, PwmBitsCount
1260+
mov PCA0PWM, A
1261+
12131262
; Note: Interrupts are not explicitly disabled
12141263
; Assume higher priority interrupts (Int0, Timer0) to be disabled at this point
12151264
; Set power and damp pwm auto-reload registers
@@ -4092,31 +4141,7 @@ decode_pwm_dithering:
40924141
add A, #0FFh ; Carry set if A is not zero
40934142
mov Flag_Dithering, C ; Set dithering enabled
40944143

4095-
; Decode dithering pattern depending on PwmBitsCount
4096-
mov A, PwmBitsCount
4097-
4098-
decode_pwm_dithering_pwm10bit:
4099-
cjne A, #2, decode_pwm_dithering_pwm9bit
4100-
4101-
; Initialize pwm dithering bit patterns
4102-
mov Temp1, #Dithering_Patterns ; 1-bit dithering (10-bit to 11-bit)
4103-
mov @Temp1, #00h ; 00000000
4104-
imov Temp1, #55h ; 01010101
4105-
sjmp decode_pwm_dithering_done
4106-
4107-
decode_pwm_dithering_pwm9bit:
4108-
cjne A, #1, decode_pwm_dithering_pwm8bit
4109-
4110-
mov Temp1, #Dithering_Patterns ; 2-bit dithering (9-bit to 11-bit)
4111-
mov @Temp1, #00h ; 00000000
4112-
imov Temp1, #11h ; 00010001
4113-
imov Temp1, #55h ; 01010101
4114-
imov Temp1, #77h ; 01110111
4115-
sjmp decode_pwm_dithering_done
4116-
4117-
decode_pwm_dithering_pwm8bit:
4118-
cjne A, #0, decode_pwm_dithering_done
4119-
4144+
; Initialize unified dithering pattern table
41204145
mov Temp1, #Dithering_Patterns ; 3-bit dithering (8-bit to 11-bit)
41214146
mov @Temp1, #00h ; 00000000
41224147
imov Temp1, #01h ; 00000001
@@ -4127,7 +4152,7 @@ decode_pwm_dithering_pwm8bit:
41274152
imov Temp1, #77h ; 01110111
41284153
imov Temp1, #7fh ; 01111111
41294154

4130-
decode_pwm_dithering_done:
4155+
; All decoding done
41314156
ret
41324157

41334158
;**** **** **** **** **** **** **** **** **** **** **** **** ****
@@ -4147,6 +4172,12 @@ calculate_pwm_bits:
41474172
; Let Temp1 = Pgm_Pwm_Freq / 24
41484173
mov Temp1, #Pgm_Pwm_Freq
41494174

4175+
calculate_pwm_bits_variable_pwm_bits:
4176+
; If pwm is variable do not substract and set variable pwm flag
4177+
cjne @Temp1, #0, calculate_pwm_bits_pwm96bits
4178+
setb Flag_Variable_Pwm_Bits
4179+
sjmp calculate_pwm_bits_pwm_decoded
4180+
41504181
calculate_pwm_bits_pwm96bits:
41514182
; If pwm is 96 khz substract 2
41524183
cjne @Temp1, #96, calculate_pwm_bits_pwm48bits

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