lpsdr/pi_filter.sch at master · bitglue/lpsdr · GitHub

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v 20130925 2
C 40000 40000 0 0 0 title-B.sym
C 45900 46100 1 0 0 inductor-1.sym
{
T 46100 46600 5 10 0 0 0 0 1
device=INDUCTOR
T 46200 46400 5 10 1 1 0 6 1
refdes=L1
T 46100 46800 5 10 0 1 0 0 1
symversion=0.1
T 45900 46100 5 10 0 0 0 0 1
footprint=ACY200
}
C 45900 45100 1 90 0 capacitor-1.sym
{
T 45200 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 45700 44800 5 10 1 1 0 5 1
refdes=C4
T 45000 45300 5 10 0 1 90 0 1
symversion=0.1
T 45900 45100 5 10 0 0 0 0 1
footprint=1206
}
N 43800 46200 45900 46200 4
C 45400 45100 1 90 0 capacitor-1.sym
{
T 44700 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 45200 44800 5 10 1 1 0 5 1
refdes=C3
T 44500 45300 5 10 0 1 90 0 1
symversion=0.1
T 45400 45100 5 10 0 0 0 0 1
footprint=1206
}
N 45900 48300 45900 46200 4
N 46800 46200 46800 48300 4
N 52400 46200 54500 46200 4
N 43800 45000 54500 45000 4
C 46800 47000 1 180 0 capacitor-1.sym
{
T 46600 46300 5 10 0 0 180 6 1
device=CAPACITOR
T 46600 46100 5 10 0 1 180 6 1
symversion=0.1
T 46200 46900 5 10 1 1 0 6 1
refdes=C8
T 46800 47000 5 10 0 0 0 6 1
footprint=1206
}
C 46800 47500 1 180 0 capacitor-1.sym
{
T 46600 46800 5 10 0 0 180 6 1
device=CAPACITOR
T 46600 46600 5 10 0 1 180 6 1
symversion=0.1
T 46200 47400 5 10 1 1 0 6 1
refdes=C7
T 46800 47500 5 10 0 0 0 6 1
footprint=1206
}
C 43800 44800 1 0 1 header-4-1.sym
{
T 43800 46400 5 10 0 1 0 6 1
device=HEADER4
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refdes=J1
T 43800 44800 5 10 0 0 0 0 1
footprint=SIP4
}
C 54500 44800 1 0 0 header-4-1.sym
{
T 54500 46400 5 10 0 1 0 0 1
device=HEADER4
T 54900 46500 5 10 1 1 0 0 1
refdes=J2
T 54500 44800 5 10 0 0 0 0 1
footprint=SIP4
}
N 45700 46000 45700 46200 4
N 45200 46000 45200 46200 4
N 45200 45000 45200 45100 4
N 45700 45100 45700 45000 4
N 43800 45400 43900 45400 4
N 43900 45400 43900 45000 4
N 43800 45800 43900 45800 4
N 43900 45800 43900 46200 4
N 54500 45800 54400 45800 4
N 54400 45800 54400 46200 4
N 54500 45400 54400 45400 4
N 54400 45400 54400 45000 4
C 44400 45100 1 90 0 capacitor-1.sym
{
T 43700 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 44200 44800 5 10 1 1 0 5 1
refdes=C1
T 43500 45300 5 10 0 1 90 0 1
symversion=0.1
T 44400 45100 5 10 0 0 0 0 1
footprint=1206
}
C 44900 45100 1 90 0 capacitor-1.sym
{
T 44200 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 44700 44800 5 10 1 1 0 5 1
refdes=C2
T 44000 45300 5 10 0 1 90 0 1
symversion=0.1
T 44900 45100 5 10 0 0 0 0 1
footprint=1206
}
N 44700 46000 44700 46200 4
N 44200 46000 44200 46200 4
N 44200 45000 44200 45100 4
N 44700 45100 44700 45000 4
C 46800 48000 1 180 0 capacitor-1.sym
{
T 46600 47300 5 10 0 0 180 6 1
device=CAPACITOR
T 46600 47100 5 10 0 1 180 6 1
symversion=0.1
T 46200 47900 5 10 1 1 0 6 1
refdes=C6
T 46800 48000 5 10 0 0 0 6 1
footprint=1206
}
C 46800 48500 1 180 0 capacitor-1.sym
{
T 46600 47800 5 10 0 0 180 6 1
device=CAPACITOR
T 46600 47600 5 10 0 1 180 6 1
symversion=0.1
T 46200 48400 5 10 1 1 0 6 1
refdes=C5
T 46800 48500 5 10 0 0 0 6 1
footprint=1206
}
C 48700 46100 1 0 0 inductor-1.sym
{
T 48900 46600 5 10 0 0 0 0 1
device=INDUCTOR
T 48900 46800 5 10 0 1 0 0 1
symversion=0.1
T 48700 46100 5 10 0 0 0 0 1
footprint=ACY200
T 49000 46400 5 10 1 1 0 6 1
refdes=L2
}
C 48700 45100 1 90 0 capacitor-1.sym
{
T 48000 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 47800 45300 5 10 0 1 90 0 1
symversion=0.1
T 48700 45100 5 10 0 0 0 0 1
footprint=1206
T 48500 44800 5 10 1 1 0 5 1
refdes=C12
}
C 48200 45100 1 90 0 capacitor-1.sym
{
T 47500 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 47300 45300 5 10 0 1 90 0 1
symversion=0.1
T 48200 45100 5 10 0 0 0 0 1
footprint=1206
T 48000 44800 5 10 1 1 0 5 1
refdes=C11
}
N 48700 48300 48700 46200 4
N 49600 46200 49600 48300 4
C 49600 47000 1 180 0 capacitor-1.sym
{
T 49400 46300 5 10 0 0 180 6 1
device=CAPACITOR
T 49400 46100 5 10 0 1 180 6 1
symversion=0.1
T 49600 47000 5 10 0 0 0 6 1
footprint=1206
T 49000 46900 5 10 1 1 0 6 1
refdes=C16
}
C 49600 47500 1 180 0 capacitor-1.sym
{
T 49400 46800 5 10 0 0 180 6 1
device=CAPACITOR
T 49400 46600 5 10 0 1 180 6 1
symversion=0.1
T 49600 47500 5 10 0 0 0 6 1
footprint=1206
T 49000 47400 5 10 1 1 0 6 1
refdes=C15
}
N 48500 46000 48500 46200 4
N 48000 46000 48000 46200 4
N 48000 45000 48000 45100 4
N 48500 45100 48500 45000 4
C 47200 45100 1 90 0 capacitor-1.sym
{
T 46500 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 46300 45300 5 10 0 1 90 0 1
symversion=0.1
T 47200 45100 5 10 0 0 0 0 1
footprint=1206
T 47000 44800 5 10 1 1 0 5 1
refdes=C9
}
C 47700 45100 1 90 0 capacitor-1.sym
{
T 47000 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 46800 45300 5 10 0 1 90 0 1
symversion=0.1
T 47700 45100 5 10 0 0 0 0 1
footprint=1206
T 47500 44800 5 10 1 1 0 5 1
refdes=C10
}
N 47500 46000 47500 46200 4
N 47000 46000 47000 46200 4
N 47000 45000 47000 45100 4
N 47500 45100 47500 45000 4
C 49600 48000 1 180 0 capacitor-1.sym
{
T 49400 47300 5 10 0 0 180 6 1
device=CAPACITOR
T 49400 47100 5 10 0 1 180 6 1
symversion=0.1
T 49600 48000 5 10 0 0 0 6 1
footprint=1206
T 49000 47900 5 10 1 1 0 6 1
refdes=C14
}
C 49600 48500 1 180 0 capacitor-1.sym
{
T 49400 47800 5 10 0 0 180 6 1
device=CAPACITOR
T 49400 47600 5 10 0 1 180 6 1
symversion=0.1
T 49600 48500 5 10 0 0 0 6 1
footprint=1206
T 49000 48400 5 10 1 1 0 6 1
refdes=C13
}
N 46800 46200 48700 46200 4
C 51500 46100 1 0 0 inductor-1.sym
{
T 51700 46600 5 10 0 0 0 0 1
device=INDUCTOR
T 51700 46800 5 10 0 1 0 0 1
symversion=0.1
T 51500 46100 5 10 0 0 0 0 1
footprint=ACY200
T 51800 46400 5 10 1 1 0 6 1
refdes=L3
}
C 51500 45100 1 90 0 capacitor-1.sym
{
T 50800 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 50600 45300 5 10 0 1 90 0 1
symversion=0.1
T 51500 45100 5 10 0 0 0 0 1
footprint=1206
T 51300 44800 5 10 1 1 0 5 1
refdes=C20
}
C 51000 45100 1 90 0 capacitor-1.sym
{
T 50300 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 50100 45300 5 10 0 1 90 0 1
symversion=0.1
T 51000 45100 5 10 0 0 0 0 1
footprint=1206
T 50800 44800 5 10 1 1 0 5 1
refdes=C19
}
N 51500 48300 51500 46200 4
N 52400 46200 52400 48300 4
C 52400 47000 1 180 0 capacitor-1.sym
{
T 52200 46300 5 10 0 0 180 6 1
device=CAPACITOR
T 52200 46100 5 10 0 1 180 6 1
symversion=0.1
T 52400 47000 5 10 0 0 0 6 1
footprint=1206
T 51800 46900 5 10 1 1 0 6 1
refdes=C24
}
C 52400 47500 1 180 0 capacitor-1.sym
{
T 52200 46800 5 10 0 0 180 6 1
device=CAPACITOR
T 52200 46600 5 10 0 1 180 6 1
symversion=0.1
T 52400 47500 5 10 0 0 0 6 1
footprint=1206
T 51800 47400 5 10 1 1 0 6 1
refdes=C23
}
N 51300 46000 51300 46200 4
N 50800 46000 50800 46200 4
N 50800 45000 50800 45100 4
N 51300 45100 51300 45000 4
C 50500 45100 1 90 0 capacitor-1.sym
{
T 49800 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 49600 45300 5 10 0 1 90 0 1
symversion=0.1
T 50500 45100 5 10 0 0 0 0 1
footprint=1206
T 50300 44800 5 10 1 1 0 5 1
refdes=C18
}
N 50300 46000 50300 46200 4
N 49800 46000 49800 46200 4
N 49800 45000 49800 45100 4
N 50300 45100 50300 45000 4
C 52400 48000 1 180 0 capacitor-1.sym
{
T 52200 47300 5 10 0 0 180 6 1
device=CAPACITOR
T 52200 47100 5 10 0 1 180 6 1
symversion=0.1
T 52400 48000 5 10 0 0 0 6 1
footprint=1206
T 51800 47900 5 10 1 1 0 6 1
refdes=C22
}
C 52400 48500 1 180 0 capacitor-1.sym
{
T 52200 47800 5 10 0 0 180 6 1
device=CAPACITOR
T 52200 47600 5 10 0 1 180 6 1
symversion=0.1
T 52400 48500 5 10 0 0 0 6 1
footprint=1206
T 51800 48400 5 10 1 1 0 6 1
refdes=C21
}
C 50000 45100 1 90 0 capacitor-1.sym
{
T 49800 44800 5 10 1 1 0 5 1
refdes=C17
T 49300 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 49100 45300 5 10 0 1 90 0 1
symversion=0.1
T 50000 45100 5 10 0 0 0 0 1
footprint=1206
}
N 49600 46200 51500 46200 4
C 54300 45100 1 90 0 capacitor-1.sym
{
T 53600 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 53400 45300 5 10 0 1 90 0 1
symversion=0.1
T 54300 45100 5 10 0 0 0 0 1
footprint=1206
T 54100 44800 5 10 1 1 0 5 1
refdes=C28
}
C 53800 45100 1 90 0 capacitor-1.sym
{
T 53100 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 52900 45300 5 10 0 1 90 0 1
symversion=0.1
T 53800 45100 5 10 0 0 0 0 1
footprint=1206
T 53600 44800 5 10 1 1 0 5 1
refdes=C27
}
N 54100 46000 54100 46200 4
N 53600 46000 53600 46200 4
N 53600 45000 53600 45100 4
N 54100 45100 54100 45000 4
C 53300 45100 1 90 0 capacitor-1.sym
{
T 52600 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 52400 45300 5 10 0 1 90 0 1
symversion=0.1
T 53300 45100 5 10 0 0 0 0 1
footprint=1206
T 53100 44800 5 10 1 1 0 5 1
refdes=C26
}
N 53100 46000 53100 46200 4
N 52600 46000 52600 46200 4
N 52600 45000 52600 45100 4
N 53100 45100 53100 45000 4
C 52800 45100 1 90 0 capacitor-1.sym
{
T 52600 44800 5 10 1 1 0 5 1
refdes=C25
T 52100 45300 5 10 0 0 90 0 1
device=CAPACITOR
T 51900 45300 5 10 0 1 90 0 1
symversion=0.1
T 52800 45100 5 10 0 0 0 0 1
footprint=1206
}