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Implement fmin_pseudo and fmax_pseudo for scalars
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cranelift/codegen/src/isa/x64/lower.rs

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@@ -4412,6 +4412,10 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
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let ty = ty.unwrap();
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ctx.emit(Inst::gen_move(dst, rhs, ty));
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let sse_opcode = match (ty, op) {
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(types::F32, Opcode::FminPseudo) => SseOpcode::Minss,
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(types::F32, Opcode::FmaxPseudo) => SseOpcode::Maxss,
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(types::F64, Opcode::FminPseudo) => SseOpcode::Minsd,
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(types::F64, Opcode::FmaxPseudo) => SseOpcode::Maxsd,
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(types::F32X4, Opcode::FminPseudo) => SseOpcode::Minps,
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(types::F32X4, Opcode::FmaxPseudo) => SseOpcode::Maxps,
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(types::F64X2, Opcode::FminPseudo) => SseOpcode::Minpd,

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