33 *
44 * Copyright (C) 2017-2020 Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de
55 * Copyright (C) 2022-2023 1BitSquared <info@1bitsquared.com>
6- * Modified by Rachel Mant <git@dragonmux.network>
6+ * Copyright (C) 2025-2026 Eric Brombaugh <ebrombaugh1@cox.net> based on initial
7+ * work done by Rachel Mant and zyp.
78 *
89 * This program is free software: you can redistribute it and/or modify
910 * it under the terms of the GNU General Public License as published by
130131
131132typedef struct stm32h7rs_flash {
132133 target_flash_s target_flash ;
133- align_e psize ;
134134 uint32_t regbase ;
135135} stm32h7rs_flash_s ;
136136
137137typedef struct stm32h7rs_priv {
138138 uint32_t dbg_cr ;
139+ align_e psize ;
139140} stm32h7rs_priv_s ;
140141
141142static bool stm32h7rs_uid (target_s * target , int argc , const char * * argv );
@@ -178,7 +179,6 @@ static void stm32h7rs_add_flash(target_s *target, uint32_t addr, size_t length,
178179 target_flash -> writesize = 2048 ;
179180 target_flash -> erased = 0xffU ;
180181 flash -> regbase = FPEC1_BASE ;
181- flash -> psize = ALIGN_64BIT ;
182182 target_add_flash (target , target_flash );
183183}
184184
@@ -197,8 +197,11 @@ bool stm32h7rs_probe(target_s *target)
197197 return false;
198198 }
199199 target -> target_storage = priv ;
200+ /* Get the current value of the debug control register (and store it for later) */
200201 priv -> dbg_cr = target_mem32_read32 (target , DBGMCU_CR );
201-
202+ /* Set up the Flash write/erase parallelism to 64-bit default */
203+ priv -> psize = ALIGN_64BIT ;
204+
202205 target -> driver = "STM32H7R/S" ;
203206 target -> attach = stm32h7rs_attach ;
204207 target -> detach = stm32h7rs_detach ;
@@ -491,31 +494,13 @@ static bool stm32h7rs_crc(target_s *target, int argc, const char **argv)
491494static bool stm32h7rs_cmd_psize (target_s * target , int argc , const char * * argv )
492495{
493496 if (argc == 1 ) {
494- align_e psize = ALIGN_64BIT ;
495- /*
496- * XXX: What is this and why does it exist?
497- * A dry-run walk-through says it'll pull out the psize for the first Flash region added by stm32h7rs_probe()
498- * because all Flash regions added by stm32h7rs_add_flash match the if condition. This looks redundant and wrong.
499- */
500- for (target_flash_s * flash = target -> flash ; flash ; flash = flash -> next ) {
501- if (flash -> write == stm32h7rs_flash_write )
502- psize = ((stm32h7rs_flash_s * )flash )-> psize ;
503- }
497+ align_e psize = ((const stm32h7rs_priv_s * )target -> target_storage )-> psize ;;
504498 tc_printf (target , "Flash write parallelism: %s\n" , stm32_psize_to_string (psize ));
505499 } else {
506- align_e psize ;
500+ align_e psize = ALIGN_64BIT ;
507501 if (!stm32_psize_from_string (target , argv [1 ], & psize ))
508502 return false;
509-
510- /*
511- * XXX: What is this and why does it exist?
512- * A dry-run walk-through says it'll overwrite psize for every Flash region added by stm32h7rs_probe()
513- * because all Flash regions added by stm32h7rs_add_flash match the if condition. This looks redundant and wrong.
514- */
515- for (target_flash_s * flash = target -> flash ; flash ; flash = flash -> next ) {
516- if (flash -> write == stm32h7rs_flash_write )
517- ((stm32h7rs_flash_s * )flash )-> psize = psize ;
518- }
503+ ((stm32h7rs_priv_s * )target -> target_storage )-> psize = psize ;
519504 }
520505 return true;
521506}
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