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Commit 74a11ed

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hosted/ftdi: Simplify jtagtap_cycle via CLK_BYTES/CLK_BITS opcode
1 parent a47fbb7 commit 74a11ed

1 file changed

Lines changed: 25 additions & 13 deletions

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src/platforms/hosted/ftdi_jtag.c

Lines changed: 25 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -151,19 +151,31 @@ static void ftdi_jtag_cycle(const bool tms, const bool tdi, const size_t clock_c
151151
{
152152
DEBUG_PROBE("%s: %zu clock cycles with TMS %s and TDI %s\n", __func__, clock_cycles, tms ? "high" : "low",
153153
tdi ? "high" : "low");
154-
uint64_t tms_states = (UINT64_C(1) << clock_cycles) - 1ULL;
155-
if (!tms)
156-
tms_states = 0;
157-
uint8_t cmds[30U] = {0}; /* Up to ceil[64 // 7] = 10 commands, 3 byte each */
158-
size_t cmd_count = 0;
159-
for (size_t cycle = 0U; cycle < clock_cycles; cycle += 7U) {
160-
const uint8_t cmd[3U] = {
161-
MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG,
162-
MIN(7U, clock_cycles - cycle) - 1U,
163-
(tdi ? 0x80U : 0U) | (tms_states & 0x7fU),
154+
155+
/* Update state of TMS & TDI using 0x4b opcode, then trigger 8a+b cycles using 0x8f, 0x8e. */
156+
const uint8_t cmd[3] = {
157+
MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG,
158+
0,
159+
(tdi ? 0x80U : 0U) | (tms ? 0x01U : 0U),
160+
};
161+
ftdi_buffer_write_arr(cmd);
162+
163+
/* Length of 0..n will emit 8..8*(n+1) clocks */
164+
uint16_t clock_bytes = clock_cycles / 8U;
165+
if (clock_bytes > 0) {
166+
clock_bytes -= 1;
167+
const uint8_t cmd8[3U] = {
168+
CLK_BYTES,
169+
clock_bytes & 0xffU,
170+
clock_bytes >> 8U,
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};
165-
tms_states >>= 7U;
166-
memcpy(&cmds[sizeof(cmd) * cmd_count++], cmd, sizeof(cmd));
172+
ftdi_buffer_write_arr(cmd8);
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}
168-
ftdi_buffer_write(cmds, 3U * cmd_count);
174+
/* Length of 0..7 will emit 1..8 clocks */
175+
const uint8_t clock_bits = clock_cycles % 8U - 1U;
176+
const uint8_t cmd1[2U] = {
177+
CLK_BITS,
178+
clock_bits,
179+
};
180+
ftdi_buffer_write_arr(cmd1);
169181
}

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