@@ -639,22 +639,10 @@ static void riscv32_progbuf_mem_read(
639639 result &= riscv_command_wait_complete (hart );
640640 if (!result )
641641 return ;
642- #if 1
643- /* Copy the read value from GPR A1 to DATA0 */
644- const uint32_t abstract_command2 =
645- RV_DM_ABST_CMD_ACCESS_REG | RV_ABST_READ | RV_REG_XFER | RV_REG_ACCESS_32_BIT | RV_GPR_A1 ;
646- result = riscv_dm_write (hart -> dbg_module , RV_DM_ABST_COMMAND , abstract_command2 );
647- result &= riscv_command_wait_complete (hart );
648- if (!result )
649- return ;
650- /* Extract the read value from DATA0 */
651642 uint32_t value = 0 ;
652- if (!riscv_dm_read (hart -> dbg_module , RV_DM_DATA0 , & value ))
643+ result = riscv_csr_read (hart , RV_GPR_A1 , & value );
644+ if (!result )
653645 return ;
654- #else
655- uint32_t value = 0 ;
656- riscv_csr_read (hart , RV_GPR_A0 , & value );
657- #endif
658646 riscv32_unpack_data (data + offset , value , access_width );
659647 }
660648
@@ -711,30 +699,22 @@ static void riscv32_progbuf_mem_write(
711699
712700 const uint8_t * const data = (const uint8_t * )src ;
713701 for (size_t offset = 0 ; offset < len ; offset += access_length ) {
714- /* Copy the destination address from DATA0 to GPR A0 */
715- if (!riscv_dm_write (hart -> dbg_module , RV_DM_DATA0 , dest + offset ))
716- return ;
717- /* Copy the source address from DATA0 to GPR A0 */
718- const uint32_t abstract_command1 =
719- RV_DM_ABST_CMD_ACCESS_REG | RV_ABST_WRITE | RV_REG_XFER | RV_REG_ACCESS_32_BIT | RV_GPR_A0 ;
720- bool result = riscv_dm_write (hart -> dbg_module , RV_DM_ABST_COMMAND , abstract_command1 );
721- result &= riscv_command_wait_complete (hart );
722- if (!result )
702+ /* Prepare the destination address in GPR A0 */
703+ const uint32_t dest_a0 = dest + offset ;
704+ if (!riscv_csr_write (hart , RV_GPR_A0 , & dest_a0 ))
723705 return ;
724- //riscv_csr_write(hart, RV_GPR_A0, dest + offset);
725706
726707 /* Pack the data to write into GPR A1 */
727708 uint32_t value = riscv32_pack_data (data + offset , access_width );
728709 if (!riscv_dm_write (hart -> dbg_module , RV_DM_DATA0 , value ))
729710 return ;
730711 /* Copy the write value from DATA0 to GPR A1 and launch the progbuf postexec */
731- result = riscv_dm_write (hart -> dbg_module , RV_DM_ABST_COMMAND ,
712+ bool result = riscv_dm_write (hart -> dbg_module , RV_DM_ABST_COMMAND ,
732713 RV_DM_ABST_CMD_ACCESS_REG | RV_ABST_WRITE | RV_REG_XFER | RV_ABST_POSTEXEC | RV_REG_ACCESS_32_BIT |
733714 RV_GPR_A1 );
734715 result &= riscv_command_wait_complete (hart );
735716 if (!result )
736717 return ;
737- //riscv_csr_write(hart, RV_GPR_A1, value);
738718 }
739719
740720 riscv_csr_write (hart , RV_GPR_A0 , & a0_save );
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