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Commit be4224b

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esp32c3: Split out the target preparation (switching off the WDTs) from discovery so we can halt them early enough for discovery to be more reliable
1 parent fc3d88c commit be4224b

4 files changed

Lines changed: 33 additions & 3 deletions

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src/target/esp32c3.c

Lines changed: 21 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@
3737
#include "riscv_debug.h"
3838
#include "spi.h"
3939
#include "sfdp.h"
40+
#include "jep106.h"
4041

4142
#define ESP32_C3_ARCH_ID 0x80000001U
4243
#define ESP32_C3_IMPL_ID 0x00000001U
@@ -149,21 +150,38 @@ static bool esp32c3_exit_flash_mode(target_s *target);
149150
static bool esp32c3_spi_flash_erase(target_flash_s *flash, target_addr_t addr, size_t length);
150151
static bool esp32c3_spi_flash_write(target_flash_s *flash, target_addr_t dest, const void *src, size_t length);
151152

152-
bool esp32c3_probe(target_s *const target)
153+
/* Make an ESP32-C3 ready for probe operations having identified one */
154+
bool esp32c3_target_prepare(target_s *const target)
153155
{
154156
const riscv_hart_s *const hart = riscv_hart_struct(target);
155157
/* Seems that the best we can do is check the marchid and mimplid register values */
156-
if (hart->archid != ESP32_C3_ARCH_ID || hart->implid != ESP32_C3_IMPL_ID)
158+
if (target->designer_code != JEP106_MANUFACTURER_ESPRESSIF || hart->archid != ESP32_C3_ARCH_ID ||
159+
hart->implid != ESP32_C3_IMPL_ID)
157160
return false;
158161

162+
/* Allocate the private structure here so we can store the WDT states */
159163
esp32c3_priv_s *const priv = calloc(1, sizeof(esp32c3_priv_s));
160164
if (!priv) { /* calloc failed: heap exhaustion */
161165
DEBUG_ERROR("calloc: failed in %s\n", __func__);
162166
return false;
163167
}
164168
target->target_storage = priv;
165-
target->driver = "ESP32-C3";
169+
/* Prepare the target for memory IO */
170+
target->mem_read = riscv32_mem_read;
171+
target->mem_write = riscv32_mem_write;
172+
/* Now disable the WDTs so the stop causing problems ready for discovering trigger slots, etc */
166173
esp32c3_disable_wdts(target);
174+
return true;
175+
}
176+
177+
bool esp32c3_probe(target_s *const target)
178+
{
179+
const riscv_hart_s *const hart = riscv_hart_struct(target);
180+
/* Seems that the best we can do is check the marchid and mimplid register values */
181+
if (hart->archid != ESP32_C3_ARCH_ID || hart->implid != ESP32_C3_IMPL_ID)
182+
return false;
183+
184+
target->driver = "ESP32-C3";
167185

168186
/* We have to provide our own halt/resume functions to take care of the WDTs as they cause Problems */
169187
target->halt_request = esp32c3_halt_request;

src/target/riscv_debug.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -385,6 +385,12 @@ static bool riscv_hart_init(riscv_hart_s *const hart)
385385
target->designer_code = hart->vendorid ? hart->vendorid : hart->dbg_module->dmi_bus->designer_code;
386386
target->cpuid = hart->archid;
387387

388+
/*
389+
* Now we've identified the target, and before we can do things like trigger discovery
390+
* we need to first run any target-specific setup (eg, halting the WDTs on the ESP32-C3)
391+
* so the next steps won't get screwed up by them.
392+
*/
393+
esp32c3_target_prepare(target);
388394
/* Now we're in a safe environment, leasurely read out the triggers, etc. */
389395
riscv_hart_discover_triggers(hart);
390396

src/target/target_probe.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,3 +129,8 @@ TARGET_PROBE_WEAK_NOP(zynq7_probe)
129129
TARGET_PROBE_WEAK_NOP(esp32c3_probe)
130130

131131
LPC55_DP_PREPARE_WEAK_NOP(lpc55_dp_prepare)
132+
/*
133+
* This isn't actually a probe routine, but it shares its signature with them,
134+
* so uses the same no-op stub because we can get away with that.
135+
*/
136+
TARGET_PROBE_WEAK_NOP(esp32c3_target_prepare)

src/target/target_probe.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -97,5 +97,6 @@ bool zynq7_probe(target_s *target);
9797
bool esp32c3_probe(target_s *target);
9898

9999
void lpc55_dp_prepare(adiv5_debug_port_s *dp);
100+
bool esp32c3_target_prepare(target_s *target);
100101

101102
#endif /* TARGET_TARGET_PROBE_H */

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