riscv32, jtag: Detect Nucleisys DTM of GD32VW553

* Proper JEP-106 value of 0xa36 belonging to Nuclei Systems Technology
* 307 is related to Nuclei N307 processor core

Author: ALTracer

src/target/jep106.h

@@ -72,7 +72,8 @@
  * This JEP code is used on RISC-V by GigaDevice, because
  * "Note: The Bumblebee core used for this MCU is jointly developed by Nuclei System Technology and Andes Technology."
  */
-#define JEP106_MANUFACTURER_ANDES 0x61eU /* Andes Technology Corporation */
+#define JEP106_MANUFACTURER_ANDES  0x61eU /* Andes Technology Corporation */
+#define JEP106_MANUFACTURER_NUCLEI 0xa36U /* Nuclei System Technology */
 
 /*
  * Used by WCH (WinChipHead) aka Nanjing Qinheng Microelectronics

src/target/jtag_devs.c

@@ -414,7 +414,15 @@ const jtag_dev_descr_s dev_descr[] = {
 #endif
 		.handler = riscv_jtag_dtm_handler,
 	},
+	{
+		.idcode = 0x00307a6dU,
+		.idmask = 0x0fffffffU,
+#if ENABLE_DEBUG == 1
+		.descr = "Nuclei Systems DTM",
 #endif
+		.handler = riscv_jtag_dtm_handler,
+	},
+#endif // CONFIG_RISCV
 #if defined(CONFIG_CORTEXAR) && defined(CONFIG_TI_ICEPICK)
 	{
 		.idcode = 0x0b90002fU,

src/target/riscv32.c

@@ -92,6 +92,9 @@ bool riscv32_probe(target_s *const target)
 	case JEP106_MANUFACTURER_ANDES:
 		PROBE(gd32vf1_probe);
 		break;
+	case JEP106_MANUFACTURER_NUCLEI:
+		PROBE(gd32vw5_probe);
+		break;
 	case JEP106_MANUFACTURER_RASPBERRY:
 		PROBE(rp2350_probe);
 		break;

src/target/stm32f1.c

@@ -393,6 +393,21 @@ static void gd32vf1_detach(target_s *const target)
 	/* Now defer to the normal Cortex-M detach routine to complete the detach */
 	riscv_detach(target);
 }
+
+/* Identify RISC-V GD32VW5 chips */
+bool gd32vw5_probe(target_s *const target)
+{
+	const uint16_t device_id = target_mem32_read32(target, GD32E5_DBGMCU_BASE) & 0xfffU;
+	const uint32_t signature = target_mem32_read32(target, GD32Fx_FLASHSIZE);
+	const uint16_t flash_size = signature & 0xffffU;
+	const uint16_t ram_size = signature >> 16U;
+	DEBUG_WARN("Stub for detection of GD32VW553. DBG_ID=0x%x, RAM=%u, flash=%u\n", device_id, ram_size, flash_size);
+	target->driver = "GD32VW5";
+	target->part_id = device_id;
+	target_add_ram32(target, STM32F1_SRAM_BASE, ram_size * 1024U);
+	target_add_ram32(target, STM32F1_FLASH_BANK1_BASE, flash_size * 1024U);
+	return true;
+}
 #endif
 #endif
 

src/target/target_probe.c

@@ -114,6 +114,7 @@ TARGET_PROBE_WEAK_NOP(efm32_probe)
 TARGET_PROBE_WEAK_NOP(gd32f1_probe)
 TARGET_PROBE_WEAK_NOP(gd32f4_probe)
 TARGET_PROBE_WEAK_NOP(gd32vf1_probe)
+TARGET_PROBE_WEAK_NOP(gd32vw5_probe)
 TARGET_PROBE_WEAK_NOP(hc32l110_probe)
 TARGET_PROBE_WEAK_NOP(imxrt_probe)
 TARGET_PROBE_WEAK_NOP(ke04_probe)

src/target/target_probe.h

@@ -65,6 +65,7 @@ bool ch32vx_probe(target_s *target);
 bool gd32f1_probe(target_s *target);
 bool gd32f4_probe(target_s *target);
 bool gd32vf1_probe(target_s *target);
+bool gd32vw5_probe(target_s *target);
 bool hc32l110_probe(target_s *target);
 bool imxrt_probe(target_s *target);
 bool ke04_probe(target_s *target);