Document that `stack_addr` needs pointer size, not target size

[jyn514]

Given the following CLIF:

function u0:0() -> i32 system_v {
    ss0 = explicit_slot 4

ebb0:
    v0 = stack_addr.i32 ss0
    v1 = load.i32 v0
    return v1
}

Cranelift will mistakenly think the stack_addr.i32 is illegal: VerifierError { location: inst0, message: "v0 is a real GPR value defined by a ghost instruction" }

[bjorn3]

What target are you using? It should work on x86(_64).

Edit: missed that you used stack_addr.i32. You must use the native pointer size as stack_addr type var, not the type of the value you want to read.

[jyn514]

Is there a reason load needs to be told the size explicitly instead of using the size of the target ISA?

[bjorn3]

During the building of the clif ir, the type is already required to be known, however at that point the target isa is not yet known.

[vitiral]

I wanted to fix this but I'm pretty confused. The only direct docs for this seem to be here:

cranelift-codegen/meta/src/shared/instructions.rs

    ig.push(
        Inst::new(
            "stack_addr",
            r#"
        Get the address of a stack slot.

        Compute the absolute address of a byte in a stack slot. The offset must
        refer to a byte inside the stack slot:
        `0 <= Offset < sizeof(SS)`.
        "#,
        )
        .operands_in(vec![SS, Offset])
        .operands_out(vec![addr]),
    );

This currently documents an "Offset", not either the "native pointer size" nor the "type of the value".

stack_addr is also not mentioned in the IR reference except in passing

Where should this be documented?