basic_ram_test.vvp

#! /usr/local/bin/vvp
:ivl_version "11.0 (devel)" "(s20150603-590-g6887c31)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "system";
:vpi_module "vhdl_sys";
:vpi_module "vhdl_textio";
:vpi_module "v2005_math";
:vpi_module "va_math";
S_0xd0cdd0 .scope module, "file_to_ram" "file_to_ram" 2 1;
 .timescale 0 0;
v0xd414d0_0 .var/i "address", 31 0;
v0xd415d0_0 .var/s "captured_data", 31 0;
v0xd416b0_0 .var/s "captured_data0", 31 0;
v0xd41770_0 .var/s "captured_data1", 31 0;
v0xd41850_0 .var/s "captured_data2", 31 0;
v0xd41930_0 .var/s "captured_data3", 31 0;
v0xd41a10_0 .var "clk", 0 0;
v0xd41ab0_0 .var "cs", 0 0;
v0xd41b80_0 .var/i "data_file", 31 0;
v0xd41cb0_0 .var "data_input", 31 0;
v0xd41da0_0 .net "data_output", 31 0, L_0xd526b0;  1 drivers
v0xd41e70_0 .var "finished", 0 0;
v0xd41f10_0 .var "mdr", 31 0;
o0x7f828a7281f8 .functor BUFZ 1, C4<z>; HiZ drive
v0xd41ff0_0 .net "mem_done", 0 0, o0x7f828a7281f8;  0 drivers
v0xd420c0_0 .var "oe", 0 0;
v0xd42190_0 .var/i "scan_file", 31 0;
v0xd42230_0 .var "we", 0 0;
E_0xd1dbe0 .event negedge, v0xd40b60_0;
L_0xd52840 .part v0xd414d0_0, 0, 10;
S_0xce4a90 .scope module, "ram" "basic_ram" 2 33, 3 7 0, S_0xd0cdd0;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "clk";
    .port_info 1 /INPUT 10 "address";
    .port_info 2 /OUTPUT 32 "data_output";
    .port_info 3 /INPUT 32 "data_input";
    .port_info 4 /OUTPUT 1 "mem_done";
    .port_info 5 /INPUT 1 "cs";
    .port_info 6 /INPUT 1 "we";
    .port_info 7 /INPUT 1 "oe";
P_0xce4c20 .param/l "ADDR_WIDTH" 0 3 19, +C4<00000000000000000000000000001010>;
P_0xce4c60 .param/l "DATA_WIDTH" 0 3 18, +C4<00000000000000000000000000100000>;
P_0xce4ca0 .param/l "RAM_DEPTH" 0 3 20, +C4<000000000000000000000000000000010000000000>;
L_0xd423e0 .functor AND 1, v0xd41ab0_0, v0xd420c0_0, C4<1>, C4<1>;
L_0xd42590 .functor AND 1, L_0xd423e0, L_0xd424a0, C4<1>, C4<1>;
v0xce4d40_0 .net *"_s0", 0 0, L_0xd423e0;  1 drivers
v0xd407c0_0 .net *"_s3", 0 0, L_0xd424a0;  1 drivers
v0xd40880_0 .net *"_s4", 0 0, L_0xd42590;  1 drivers
L_0x7f828a6df018 .functor BUFT 1, C4<000000000000000000000000zzzzzzzz>, C4<0>, C4<0>, C4<0>;
v0xd40950_0 .net *"_s6", 31 0, L_0x7f828a6df018;  1 drivers
v0xd40a30_0 .net "address", 9 0, L_0xd52840;  1 drivers
v0xd40b60_0 .net "clk", 0 0, v0xd41a10_0;  1 drivers
v0xd40c20_0 .net "cs", 0 0, v0xd41ab0_0;  1 drivers
v0xd40ce0_0 .net "data_input", 31 0, v0xd41cb0_0;  1 drivers
v0xd40dc0_0 .var "data_out", 31 0;
v0xd40f30_0 .net "data_output", 31 0, L_0xd526b0;  alias, 1 drivers
v0xd41010 .array "mem", 1023 0, 31 0;
v0xd410d0_0 .net "mem_done", 0 0, o0x7f828a7281f8;  alias, 0 drivers
v0xd41190_0 .net "oe", 0 0, v0xd420c0_0;  1 drivers
v0xd41250_0 .var "oe_r", 0 0;
v0xd41310_0 .net "we", 0 0, v0xd42230_0;  1 drivers
E_0xd1b820 .event posedge, v0xd40b60_0;
L_0xd424a0 .reduce/nor v0xd42230_0;
L_0xd526b0 .functor MUXZ 32, L_0x7f828a6df018, v0xd40dc0_0, L_0xd42590, C4<>;
S_0xd23a70 .scope begin, "MEM_READ" "MEM_READ" 3 57, 3 57 0, S_0xce4a90;
 .timescale 0 0;
S_0xd23c50 .scope begin, "MEM_WRITE" "MEM_WRITE" 3 48, 3 48 0, S_0xce4a90;
 .timescale 0 0;
    .scope S_0xce4a90;
T_0 ;
    %wait E_0xd1b820;
    %fork t_1, S_0xd23c50;
    %jmp t_0;
    .scope S_0xd23c50;
t_1 ;
    %load/vec4 v0xd40c20_0;
    %load/vec4 v0xd41310_0;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_0.0, 8;
    %load/vec4 v0xd40ce0_0;
    %load/vec4 v0xd40a30_0;
    %pad/u 12;
    %ix/vec4 4;
    %store/vec4a v0xd41010, 4, 0;
T_0.0 ;
    %end;
    .scope S_0xce4a90;
t_0 %join;
    %jmp T_0;
    .thread T_0;
    .scope S_0xce4a90;
T_1 ;
    %wait E_0xd1b820;
    %fork t_3, S_0xd23a70;
    %jmp t_2;
    .scope S_0xd23a70;
t_3 ;
    %load/vec4 v0xd40c20_0;
    %load/vec4 v0xd41310_0;
    %nor/r;
    %and;
    %load/vec4 v0xd41190_0;
    %and;
    %flag_set/vec4 8;
    %jmp/0xz  T_1.0, 8;
    %load/vec4 v0xd40a30_0;
    %pad/u 12;
    %ix/vec4 4;
    %load/vec4a v0xd41010, 4;
    %store/vec4 v0xd40dc0_0, 0, 32;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xd41250_0, 0, 1;
    %jmp T_1.1;
T_1.0 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xd41250_0, 0, 1;
T_1.1 ;
    %end;
    .scope S_0xce4a90;
t_2 %join;
    %jmp T_1;
    .thread T_1;
    .scope S_0xd0cdd0;
T_2 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xd41a10_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xd41ab0_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xd41e70_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xd414d0_0, 0, 32;
    %end;
    .thread T_2;
    .scope S_0xd0cdd0;
T_3 ;
    %delay 5, 0;
    %load/vec4 v0xd41a10_0;
    %nor/r;
    %store/vec4 v0xd41a10_0, 0, 1;
    %jmp T_3;
    .thread T_3;
    .scope S_0xd0cdd0;
T_4 ;
    %vpi_func 2 25 "$fopen" 32, "example_asm.obj", "r" {0 0 0};
    %store/vec4 v0xd41b80_0, 0, 32;
    %vpi_call 2 26 "$display", "file opened %d", v0xd41b80_0 {0 0 0};
    %load/vec4 v0xd41b80_0;
    %cmpi/e 0, 0, 32;
    %jmp/0xz  T_4.0, 4;
    %vpi_call 2 28 "$display", "data_file handle was NULL" {0 0 0};
    %vpi_call 2 29 "$finish" {0 0 0};
T_4.0 ;
    %end;
    .thread T_4;
    .scope S_0xd0cdd0;
T_5 ;
    %wait E_0xd1dbe0;
    %vpi_func 2 43 "$fscanf" 32, v0xd41b80_0, "%c", v0xd416b0_0 {0 0 0};
    %store/vec4 v0xd42190_0, 0, 32;
    %vpi_func 2 44 "$fscanf" 32, v0xd41b80_0, "%c", v0xd41770_0 {0 0 0};
    %store/vec4 v0xd42190_0, 0, 32;
    %vpi_func 2 45 "$fscanf" 32, v0xd41b80_0, "%c", v0xd41850_0 {0 0 0};
    %store/vec4 v0xd42190_0, 0, 32;
    %vpi_func 2 46 "$fscanf" 32, v0xd41b80_0, "%c", v0xd41930_0 {0 0 0};
    %store/vec4 v0xd42190_0, 0, 32;
    %load/vec4 v0xd416b0_0;
    %ix/load 4, 24, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %load/vec4 v0xd41770_0;
    %ix/load 4, 16, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %or;
    %load/vec4 v0xd41850_0;
    %ix/load 4, 8, 0;
    %flag_set/imm 4, 0;
    %shiftl 4;
    %or;
    %load/vec4 v0xd41930_0;
    %or;
    %store/vec4 v0xd415d0_0, 0, 32;
    %vpi_func 2 51 "$feof" 32, v0xd41b80_0 {0 0 0};
    %nor/r;
    %flag_set/vec4 8;
    %jmp/0xz  T_5.0, 8;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xd42230_0, 0, 1;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xd420c0_0, 0, 1;
    %load/vec4 v0xd415d0_0;
    %store/vec4 v0xd41cb0_0, 0, 32;
    %delay 100, 0;
    %load/vec4 v0xd414d0_0;
    %addi 1, 0, 32;
    %store/vec4 v0xd414d0_0, 0, 32;
    %jmp T_5.1;
T_5.0 ;
    %pushi/vec4 0, 0, 1;
    %store/vec4 v0xd42230_0, 0, 1;
    %pushi/vec4 1, 0, 1;
    %store/vec4 v0xd420c0_0, 0, 1;
    %pushi/vec4 0, 0, 32;
    %store/vec4 v0xd414d0_0, 0, 32;
    %delay 100, 0;
    %load/vec4 v0xd41da0_0;
    %store/vec4 v0xd41f10_0, 0, 32;
    %vpi_call 2 65 "$display", "mdr for the last address is %x\012", v0xd41f10_0 {0 0 0};
    %pushi/vec4 1, 0, 32;
    %store/vec4 v0xd414d0_0, 0, 32;
    %delay 100, 0;
    %load/vec4 v0xd41da0_0;
    %store/vec4 v0xd41f10_0, 0, 32;
    %vpi_call 2 69 "$display", "mdr for the last address is %x\012", v0xd41f10_0 {0 0 0};
    %pushi/vec4 2, 0, 32;
    %store/vec4 v0xd414d0_0, 0, 32;
    %delay 100, 0;
    %load/vec4 v0xd41da0_0;
    %store/vec4 v0xd41f10_0, 0, 32;
    %vpi_call 2 73 "$display", "mdr for the last address is %x\012", v0xd41f10_0 {0 0 0};
    %vpi_call 2 74 "$finish" {0 0 0};
T_5.1 ;
    %jmp T_5;
    .thread T_5;
# The file index is used to find the file name in the following table.
:file_names 4;
    "N/A";
    "<interactive>";
    "file_to_ram.v";
    "basic_ram.v";