From 253dfac9e73e9da7140194d026571f263fadc5c8 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 19 Jun 2024 17:17:58 -0400 Subject: [PATCH 01/66] add case statement support for ComponentBuilders --- calyx-py/calyx/builder.py | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index 2e9e2e435f..44e1a6e20a 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -208,6 +208,28 @@ def control(self, builder: Union[ast.Control, ControlBuilder]): else: self.component.controls = builder + #NOTE: Could also be a GroupBuilder + Controllable = Union[ast.Control, str, ast.Group, list, set, ast.Empty, None] + + def case( + self, signal: ExprBuilder, cases: Dict[int, Controllable], signed=False + ) -> None: + """Add the required cells, wiring, and `if` statements to enable `case` + like semantics in the component. Does not support `default` cases. + Branches are implemented via mutually exclusive `if` statements in the + component's `control` block.""" + width = self.infer_width(signal) + ifs = [] + for branch, controllable in cases.items(): + std_eq = self.eq(width, f"case_eq_{branch}", signed) + + with self.continuous: + std_eq.left = signal + std_eq.right = const(width, branch) + ifs.append(if_(std_eq["out"], controllable)) + + self.control += par(*ifs) + def port_width(self, port: ExprBuilder) -> int: """Get the width of an expression, which may be a port of this component.""" name = ExprBuilder.unwrap(port).item.id.name From 64edeb26712ea7913d4ca39e53c51640f184f467 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 19 Jun 2024 17:21:47 -0400 Subject: [PATCH 02/66] add runt tests --- calyx-py/test/case.expect | 28 ++++++++++++++++++++++++++++ calyx-py/test/case.py | 27 +++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) create mode 100644 calyx-py/test/case.expect create mode 100644 calyx-py/test/case.py diff --git a/calyx-py/test/case.expect b/calyx-py/test/case.expect new file mode 100644 index 0000000000..571dafc946 --- /dev/null +++ b/calyx-py/test/case.expect @@ -0,0 +1,28 @@ +import "primitives/core.futil"; +import "primitives/binary_operators.futil"; +component my_comp(in_1: 8) -> (out_1: 16) { + cells { + comp_reg = std_reg(1); + case_eq_1 = std_eq(8); + case_eq_2 = std_eq(8); + } + wires { + group my_group { + + } + case_eq_1.left = in_1; + case_eq_1.right = 8'd1; + case_eq_2.left = in_1; + case_eq_2.right = 8'd2; + } + control { + par { + if case_eq_1.out { + my_group; + } + if case_eq_2.out { + invoke comp_reg(in=1'd1)(); + } + } + } +} diff --git a/calyx-py/test/case.py b/calyx-py/test/case.py new file mode 100644 index 0000000000..965b94ceab --- /dev/null +++ b/calyx-py/test/case.py @@ -0,0 +1,27 @@ +from calyx.builder import Builder, invoke + +#Creates a component the has a case statement. +def add_case(prog): + # Inputs/Outputs + my_comp = prog.component("my_comp") + comp_reg = my_comp.reg(1, "comp_reg") + in_1 = my_comp.input("in_1", 8) + out_1 = my_comp.output("out_1", 16) + + with my_comp.group("my_group") as my_group: + # Some assignments + my_comp.out_1 = 24 + + my_invoke = invoke(comp_reg, in_in=1) + my_comp.case(in_1, {1: my_group, 2: my_invoke}) + + +def build(): + prog = Builder() + add_case(prog) + return prog.program + + +if __name__ == "__main__": + build().emit() + From 07984900212db00699c87c023cb83ee631a38f25 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 20 Jun 2024 13:49:39 -0400 Subject: [PATCH 03/66] make channels for the subordinate controller --- yxi/axi-calyx/axi-controller-generator.py | 317 ++++++++++++++++++++++ yxi/axi-calyx/dynamic-axi-generator.py | 5 +- 2 files changed, 319 insertions(+), 3 deletions(-) create mode 100644 yxi/axi-calyx/axi-controller-generator.py diff --git a/yxi/axi-calyx/axi-controller-generator.py b/yxi/axi-calyx/axi-controller-generator.py new file mode 100644 index 0000000000..718b9e5d4c --- /dev/null +++ b/yxi/axi-calyx/axi-controller-generator.py @@ -0,0 +1,317 @@ +from calyx.builder import ( + Builder, + add_comp_ports, + invoke, + par, + while_, + if_ +) +from typing import Literal +from math import log2 +import json +import sys + +# In general, ports to the wrapper are uppercase, internal registers are lower case. + +# Since yxi is still young, keys and formatting change often. +width_key = "data_width" +size_key = "total_size" +name_key = "name" +#This returns an array based on dimensions of memory +address_width_key = "idx_sizes" +type_key = "memory_type" + + +# Adds an AXI-lite subordinate controller for XRT-managed kernels +# https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Control-Requirements-for-XRT-Managed-Kernels +# 0x0 to 0x0F are reserved (inclusive). Kernel arguments start at 0x10, and are 64-bits each. + + +#NOTE (nate): Playing around with different ways to generate these channels +# In general there is some shared ports/logic, but also enough to warrant separate +# functions. Haven't yet landed on something that feels "best". The dynamic and static +# memory axi controllers channel generation is largely isolated for each channel. +# This merges port creation, but not sure this is "worth it". + +def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R"]): + """Adds an AXI-lite subordinate-to-manager address channel. + + Returns a component builder in case there are additional + cells/wires/groups that need to be added to the component. + """ + + # Following Arm's notation of denoting `xVALID` and `xREADY` signals + # `x` stands for the prefix of the channel, i.e. `AW` or `AR` + lc_x = prefix.lower() + x = prefix + s_to_m_channel = prog.component(f"s_{lc_x}_channel") + channel_inputs = [ + ("ARESETn", 1), + ] + channel_outputs = [ + ] + + if x in ["AW", "AR"]: + channel_inputs.append((f"{x}VALID", 1)) + channel_inputs.append((f"{x}ADDR", 16)) + channel_inputs.append((f"{x}PROT", 3)) + channel_outputs.append((f"{x}READY", 1)) + elif x == "W": + channel_inputs.append((f"WVALID", 1)) + channel_inputs.append((f"WDATA", 32)) + channel_inputs.append((f"WSTRB", 2)) + channel_outputs.append((f"WREADY", 1)) + elif x in ["B", "R"]: + channel_inputs.append((f"{x}READY", 1)) + channel_outputs.append((f"{x}VALID", 1)) + channel_outputs.append((f"{x}RESP", 2)) + if x == "R": + channel_outputs.append((f"RDATA", 32)) + + add_comp_ports(s_to_m_channel, channel_inputs, channel_outputs) + + return s_to_m_channel + + + +def add_arread_channel(prog): + _add_s_to_m_address_channel(prog, "AR") + +def add_awwrite_channel(prog): + _add_s_to_m_address_channel(prog, "AW") + +def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): + + assert prefix in ["AW", "AR"], "Prefix must be either AW or AR." + + + # Following Arm's notation of denoting `xVALID` and `xREADY` signals + # `x` stands for the prefix of the channel, i.e. `AW` or `AR` + lc_x = prefix.lower() + x = prefix + s_to_m_address_channel = create_axi_lite_channel_ports(prog, x) + x_ready = s_to_m_address_channel.reg(1, f"{lc_x}_ready") + x_addr = s_to_m_address_channel.reg(16, f"{lc_x[1]}_addr", is_ref = True) + + with s_to_m_address_channel.continuous: + s_to_m_address_channel.this()[f"{x}READY"] = x_ready.out + x_addr.in_ = s_to_m_address_channel.this()[f"{x}ADDR"] + + with s_to_m_address_channel.group("block_transfer") as block_transfer: + xVALID = s_to_m_address_channel.this()[f"{x}VALID"] + xADDR = s_to_m_address_channel.this()[f"{x}ADDR"] + + # ar_ready.in = 1 does not work because it leaves ARREADY high for 2 cycles. + # The way it is below leaves it high for only 1 cycle. See #1828 + # https://github.com/calyxir/calyx/issues/1828 + x_ready.in_ = ~(x_ready.out & xVALID) @ 1 + x_ready.in_ = (x_ready.out & xVALID) @ 0 + x_ready.write_en = 1 + + #store addr + x_addr.in_ = xADDR + x_addr.write_en = (x_ready.out & xVALID) @ 1 + x_addr.write_en = ~(x_ready.out & xVALID) @ 0 + + block_transfer.done = x_addr.done + + s_to_m_address_channel.control += [block_transfer] + +def add_read_channel(prog): + read_channel = create_axi_lite_channel_ports(prog, "R") + + rdata = read_channel.reg(32, "rdata", is_ref = True) + rvalid = read_channel.reg(1, "rvalid") + r_handshake_occurred = read_channel.reg(1, "r_handshake_ocurred") + + RREADY = read_channel.this()["RREADY"] + + with read_channel.continuous: + read_channel.this()["RVALID"] = rvalid.out + + with read_channel.group("service_read_request") as service_read_request: + + #Complicated guard ensures RVALID is high for a single cycle, and only once per invocation + rvalid.in_ = (~(rvalid.out & RREADY) & ~r_handshake_occurred.out) @ 1 + rvalid.in_ = ((rvalid.out & RREADY) | r_handshake_occurred.out) @ 0 + rvalid.write_en = 1 + + #Goes and stays high after first handshake + r_handshake_occurred.in_ = (rvalid.out & RREADY) @ 1 + r_handshake_occurred.in_ = ~(rvalid.out & RREADY) @ 0 + r_handshake_occurred.write_en = (~r_handshake_occurred.out) @ 1 + + read_channel.this()["RDATA"] = rdata.out + #0b00 signals OKAY. In the future, could drive RRESP from a ref reg found in the `read_controller` + # For faulty memory addresses could return 0b11 to signal a decode error. + read_channel.this()["RRESP"] = 0b00 + + #TODO: Make sure this works? This is changed from the manager controllers which uses a "bt_reg" (block_transfer) + service_read_request.done = r_handshake_occurred.out + + read_channel.control += [ + invoke(r_handshake_occurred, in_in = 0), + service_read_request, + ] + +def add_write_channel(prog): + write_channel = create_axi_lite_channel_ports(prog, "W") + + wdata = write_channel.reg(32, "wdata", is_ref = True) + wready = write_channel.reg(1, "wready") + + with write_channel.continuous: + write_channel.this()["WREADY"] = wready.out + + #We can get away with not having a "bt_reg/handshake_occurred" register because there will only ever be one handshake per transaction in AXI lite + with write_channel.group("service_write_request") as service_write_request: + wVALID = write_channel.this()["WVALID"] + wDATA = write_channel.this()["WDATA"] + + wready.in_ = (~(wready.out & wVALID)) @ 1 + wready.in_ = ((wready.out & wVALID)) @ 0 + wready.write_en = 1 + + wdata.in_ = wDATA + wdata.write_en = (wready.out & wVALID) @ 1 + wdata.write_en = ~(wready.out & wVALID) @ 0 + + service_write_request.done = wdata.done + + write_channel.control += [service_write_request] + + +def add_bresp_channel(prog): + bresp_channel = create_axi_lite_channel_ports(prog, "B") + + bvalid = bresp_channel.reg(1, "bvalid") + #In some other places this is called `bt_reg` + b_handshake_occurred = bresp_channel.reg(1, "b_handshake_occurred") + + with bresp_channel.continuous: + bresp_channel.this()["BVALID"] = bvalid.out + bresp_channel.this()["BRESP"] = 0b00 # Assume OKAY. Could make this dynamic in the future by passing in a ref cell. + + with bresp_channel.group("block_transfer") as block_transfer: + BREADY = bresp_channel.this()["BREADY"] + bvalid.in_ = (~(bvalid.out & BREADY)) @ 1 + bvalid.in_ = ((bvalid.out & BREADY)) @ 0 + bvalid.write_en = 1 + + + b_handshake_occurred.in_ = (bvalid.out & BREADY) @ 1 + b_handshake_occurred.in_ = ~(bvalid.out & BREADY) @ 0 + b_handshake_occurred.write_en = 1 + block_transfer.done = b_handshake_occurred.out + + + bresp_channel.control += [invoke(b_handshake_occurred, in_in = 0), block_transfer] + + + +#Ports must be named `s_axi_control_*` and is case sensitive. +def add_control_subordinate(prog, mems): + control_subordinate = prog.component("control_subordinate") + control_subordinate_inputs = [ + ("ARESETn", 1), + ("AWVALID", 1), + ("AWADDR", 16) #XRT imposes a 16-bit address space for the control subordinate + # ("AWPROT", 3), #We don't do anything with this + ("WVALID", 1), + ("WDATA", 32) #Want to use 32 bits because the registers in XRT are asusemd to be this size + ("WSTRB", 32/8), #We don't use this but it is required by some versions of the spec. We should tie high on subordinate. + ("BREADY", 1), + + ("ARVALID", 1), + ("ARADDR", 16), + # ("ARPROT", 3), #We don't do anything with this + ("RVALID", 1), + + + + ] + + control_subordinate_outputs = [ + ("AWREADY", 1), + ("WREADY", 1) + ("BVALID", 1) + ("BRESP", 2), #No error detection, for now we just set to 0b00 = OKAY. + + ("ARREADY", 1), + ("RDATA", 32), + ("RRESP", 2) #No error detection, for now we just set to 0b00 = OKAY. + ] + + + + +######################################### +######################################### +######################################### +######################################### + + +# Helper functions +def width_in_bytes(width: int): + assert width % 8 == 0, "Width must be a multiple of 8." + return width // 8 + + +def width_xsize(width: int): + log = log2(width_in_bytes(width)) + assert log.is_integer(), "Width must be a power of 2." + return int(log) + + +def clog2(x): + """Ceiling log2""" + if x <= 0: + raise ValueError("x must be positive") + return (x - 1).bit_length() + + +def clog2_or_1(x): + """Ceiling log2 or 1 if clog2(x) == 0""" + return max(1, clog2(x)) + + +def build(): + prog = Builder() + check_mems_welformed(mems) + add_arread_channel(prog) + add_awwrite_channel(prog) + add_read_channel(prog) + add_write_channel(prog) + add_bresp_channel(prog) + return prog.program + + +def check_mems_welformed(mems): + """Checks if memories from yxi are well formed. Returns true if they are, false otherwise.""" + for mem in mems: + assert ( + mem[width_key] % 8 == 0 + ), "Width must be a multiple of 8 to alow byte addressing to host" + assert log2( + mem[width_key] + ).is_integer(), "Width must be a power of 2 to be correctly described by xSIZE" + assert mem[size_key] > 0, "Memory size must be greater than 0" + assert mem[type_key] == "Dynamic", "Only dynamic memories are currently supported for dynamic axi" + + +if __name__ == "__main__": + yxi_filename = "input.yxi" # default + if len(sys.argv) > 2: + raise Exception("The controller generator takes 1 yxi file name as argument") + else: + try: + yxi_filename = sys.argv[1] + if not yxi_filename.endswith(".yxi"): + raise Exception("controller generator requires an yxi file") + except: + pass # no arg passed + with open(yxi_filename, "r", encoding="utf-8") as yxifile: + yxifile = open(yxi_filename) + yxi = json.load(yxifile) + mems = yxi["memories"] + build().emit() \ No newline at end of file diff --git a/yxi/axi-calyx/dynamic-axi-generator.py b/yxi/axi-calyx/dynamic-axi-generator.py index 05816da70e..575e8a02f5 100644 --- a/yxi/axi-calyx/dynamic-axi-generator.py +++ b/yxi/axi-calyx/dynamic-axi-generator.py @@ -226,7 +226,7 @@ def add_read_channel(prog, mem): # Could arguably get rid of this while loop for the dynamic verison, but this # matches nicely with non dynamic version and conforms to spec, - # and will be easier to exten to variable length dynamic transfers in the future + # and will be easier to extend to variable length dynamic transfers in the future while_body = [ # invoke_bt_reg, block_transfer, @@ -275,14 +275,13 @@ def add_write_channel(prog, mem): with write_channel.group("service_write_transfer") as service_write_transfer: WREADY = write_channel.this()["WREADY"] - # Assert then deassert. Can maybe getgit right of w_handshake_occurred in guard + # Assert then deassert. Can maybe get rid of w_handshake_occurred in guard wvalid.in_ = (~(wvalid.out & WREADY) & ~w_handshake_occurred.out) @ 1 wvalid.in_ = ((wvalid.out & WREADY) | w_handshake_occurred.out) @ 0 wvalid.write_en = 1 # Set high when wvalid is high even once # This is just wavlid.in_ guard from above - # TODO: confirm this is correct? w_handshake_occurred.in_ = (wvalid.out & WREADY) @ 1 w_handshake_occurred.in_ = ~(wvalid.out & WREADY) @ 0 w_handshake_occurred.write_en = (~w_handshake_occurred.out) @ 1 From dbb5bd42ed816355f335d276f1f9386add0a5f81 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 20 Jun 2024 15:27:54 -0400 Subject: [PATCH 04/66] WIP: read controller. All channels exist --- yxi/axi-calyx/axi-controller-generator.py | 41 +++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/yxi/axi-calyx/axi-controller-generator.py b/yxi/axi-calyx/axi-controller-generator.py index 718b9e5d4c..36652cbd40 100644 --- a/yxi/axi-calyx/axi-controller-generator.py +++ b/yxi/axi-calyx/axi-controller-generator.py @@ -208,6 +208,47 @@ def add_bresp_channel(prog): bresp_channel.control += [invoke(b_handshake_occurred, in_in = 0), block_transfer] +def add_read_controller(prog, mems): + read_controller = prog.component("read_controller") + read_controller_inputs = [ + ("ARESETn", 1), + ("ARVALID", 1), + ("ARADDR", 16), + ("ARPROT", 3), + ("RREADY", 1) + ("ap_done", 1) #signal from XRT, passed in from the entire controller + ] + + read_controller_outputs = [ + ("ARREADY", 1), + ("RVALID", 1), + ("RRESP", 2), + ("RDATA", 32), + ] + + read_controller.add_ports(read_controller_inputs, read_controller_outputs) + + #Cells + ar_channel = read_controller.cell(f"ar_channel", prog.get_component(f"s_ar_channel")) + r_channel = read_controller.cell(f"r_channel", prog.get_component(f"s_r_channel")) + + #XRT registers. We currently ignore everything except control and kernel argument registers + + control = read_controller.reg(32, "control_reg", is_ref = True) + #Global Interrupt Enable + gie = read_controller.reg(32, "gie", is_ref = True) + #IP Interrupt Enable + iie = read_controller.reg(32, "iie", is_ref = True) + #IP Interrupt Status + iis = read_controller.reg(32, "iis", is_ref = True) + #These hold the base address of the memory mappings on the host + #Kernel Arguments + for mem in mems: + read_controller.reg(64, f"{mem['name']}_base_addr", is_ref = True) + + read_controller.control + + + #Ports must be named `s_axi_control_*` and is case sensitive. def add_control_subordinate(prog, mems): From 94e19ece12c6bd52aeb79ed42a5ebad1a7d12f87 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 20 Jun 2024 15:32:32 -0400 Subject: [PATCH 05/66] change case to return a par block instead of automatically adding to control of a component --- calyx-py/calyx/builder.py | 2 +- calyx-py/test/case.py | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index 44e1a6e20a..dd58b3e8a7 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -228,7 +228,7 @@ def case( std_eq.right = const(width, branch) ifs.append(if_(std_eq["out"], controllable)) - self.control += par(*ifs) + return par(*ifs) def port_width(self, port: ExprBuilder) -> int: """Get the width of an expression, which may be a port of this component.""" diff --git a/calyx-py/test/case.py b/calyx-py/test/case.py index 965b94ceab..34d313e74e 100644 --- a/calyx-py/test/case.py +++ b/calyx-py/test/case.py @@ -13,7 +13,8 @@ def add_case(prog): my_comp.out_1 = 24 my_invoke = invoke(comp_reg, in_in=1) - my_comp.case(in_1, {1: my_group, 2: my_invoke}) + in_1_comps = my_comp.case(in_1, {1: my_group, 2: my_invoke}) + my_comp.control += in_1_comps def build(): From 3d0b0227d50e4f8dcda275bcfbbf333a403d4e1c Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 20 Jun 2024 17:37:39 -0400 Subject: [PATCH 06/66] WIP AXI subordinate controller TODO: Hook up the slices in the highest level module for ap_done, ap_start. Also thinnk about go done signals/how these connect to rest of wrapper --- yxi/axi-calyx/axi-controller-generator.py | 306 ++++++++++++++++------ 1 file changed, 229 insertions(+), 77 deletions(-) diff --git a/yxi/axi-calyx/axi-controller-generator.py b/yxi/axi-calyx/axi-controller-generator.py index 36652cbd40..b74ec0fd36 100644 --- a/yxi/axi-calyx/axi-controller-generator.py +++ b/yxi/axi-calyx/axi-controller-generator.py @@ -1,11 +1,4 @@ -from calyx.builder import ( - Builder, - add_comp_ports, - invoke, - par, - while_, - if_ -) +from calyx.builder import Builder, add_comp_ports, invoke, par, while_, if_ from typing import Literal from math import log2 import json @@ -17,7 +10,7 @@ width_key = "data_width" size_key = "total_size" name_key = "name" -#This returns an array based on dimensions of memory +# This returns an array based on dimensions of memory address_width_key = "idx_sizes" type_key = "memory_type" @@ -27,12 +20,13 @@ # 0x0 to 0x0F are reserved (inclusive). Kernel arguments start at 0x10, and are 64-bits each. -#NOTE (nate): Playing around with different ways to generate these channels +# NOTE (nate): Playing around with different ways to generate these channels # In general there is some shared ports/logic, but also enough to warrant separate # functions. Haven't yet landed on something that feels "best". The dynamic and static # memory axi controllers channel generation is largely isolated for each channel. # This merges port creation, but not sure this is "worth it". + def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R"]): """Adds an AXI-lite subordinate-to-manager address channel. @@ -48,8 +42,7 @@ def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R channel_inputs = [ ("ARESETn", 1), ] - channel_outputs = [ - ] + channel_outputs = [] if x in ["AW", "AR"]: channel_inputs.append((f"{x}VALID", 1)) @@ -67,31 +60,30 @@ def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R channel_outputs.append((f"{x}RESP", 2)) if x == "R": channel_outputs.append((f"RDATA", 32)) - + add_comp_ports(s_to_m_channel, channel_inputs, channel_outputs) return s_to_m_channel - def add_arread_channel(prog): _add_s_to_m_address_channel(prog, "AR") + def add_awwrite_channel(prog): _add_s_to_m_address_channel(prog, "AW") -def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): +def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): assert prefix in ["AW", "AR"], "Prefix must be either AW or AR." - # Following Arm's notation of denoting `xVALID` and `xREADY` signals # `x` stands for the prefix of the channel, i.e. `AW` or `AR` lc_x = prefix.lower() x = prefix s_to_m_address_channel = create_axi_lite_channel_ports(prog, x) x_ready = s_to_m_address_channel.reg(1, f"{lc_x}_ready") - x_addr = s_to_m_address_channel.reg(16, f"{lc_x[1]}_addr", is_ref = True) + x_addr = s_to_m_address_channel.reg(16, f"{lc_x[1]}_addr", is_ref=True) with s_to_m_address_channel.continuous: s_to_m_address_channel.this()[f"{x}READY"] = x_ready.out @@ -108,19 +100,20 @@ def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): x_ready.in_ = (x_ready.out & xVALID) @ 0 x_ready.write_en = 1 - #store addr + # store addr x_addr.in_ = xADDR x_addr.write_en = (x_ready.out & xVALID) @ 1 x_addr.write_en = ~(x_ready.out & xVALID) @ 0 - + block_transfer.done = x_addr.done s_to_m_address_channel.control += [block_transfer] - + + def add_read_channel(prog): read_channel = create_axi_lite_channel_ports(prog, "R") - - rdata = read_channel.reg(32, "rdata", is_ref = True) + + rdata = read_channel.reg(32, "rdata", is_ref=True) rvalid = read_channel.reg(1, "rvalid") r_handshake_occurred = read_channel.reg(1, "r_handshake_ocurred") @@ -128,42 +121,42 @@ def add_read_channel(prog): with read_channel.continuous: read_channel.this()["RVALID"] = rvalid.out - + with read_channel.group("service_read_request") as service_read_request: - - #Complicated guard ensures RVALID is high for a single cycle, and only once per invocation + # Complicated guard ensures RVALID is high for a single cycle, and only once per invocation rvalid.in_ = (~(rvalid.out & RREADY) & ~r_handshake_occurred.out) @ 1 rvalid.in_ = ((rvalid.out & RREADY) | r_handshake_occurred.out) @ 0 rvalid.write_en = 1 - #Goes and stays high after first handshake + # Goes and stays high after first handshake r_handshake_occurred.in_ = (rvalid.out & RREADY) @ 1 r_handshake_occurred.in_ = ~(rvalid.out & RREADY) @ 0 r_handshake_occurred.write_en = (~r_handshake_occurred.out) @ 1 read_channel.this()["RDATA"] = rdata.out - #0b00 signals OKAY. In the future, could drive RRESP from a ref reg found in the `read_controller` + # 0b00 signals OKAY. In the future, could drive RRESP from a ref reg found in the `read_controller` # For faulty memory addresses could return 0b11 to signal a decode error. read_channel.this()["RRESP"] = 0b00 - #TODO: Make sure this works? This is changed from the manager controllers which uses a "bt_reg" (block_transfer) + # TODO: Make sure this works? This is changed from the manager controllers which uses a "bt_reg" (block_transfer) service_read_request.done = r_handshake_occurred.out read_channel.control += [ - invoke(r_handshake_occurred, in_in = 0), + invoke(r_handshake_occurred, in_in=0), service_read_request, ] + def add_write_channel(prog): write_channel = create_axi_lite_channel_ports(prog, "W") - wdata = write_channel.reg(32, "wdata", is_ref = True) + wdata = write_channel.reg(32, "wdata", is_ref=True) wready = write_channel.reg(1, "wready") with write_channel.continuous: write_channel.this()["WREADY"] = wready.out - #We can get away with not having a "bt_reg/handshake_occurred" register because there will only ever be one handshake per transaction in AXI lite + # We can get away with not having a "bt_reg/handshake_occurred" register because there will only ever be one handshake per transaction in AXI lite with write_channel.group("service_write_request") as service_write_request: wVALID = write_channel.this()["WVALID"] wDATA = write_channel.this()["WDATA"] @@ -183,14 +176,16 @@ def add_write_channel(prog): def add_bresp_channel(prog): bresp_channel = create_axi_lite_channel_ports(prog, "B") - + bvalid = bresp_channel.reg(1, "bvalid") - #In some other places this is called `bt_reg` + # In some other places this is called `bt_reg` b_handshake_occurred = bresp_channel.reg(1, "b_handshake_occurred") with bresp_channel.continuous: bresp_channel.this()["BVALID"] = bvalid.out - bresp_channel.this()["BRESP"] = 0b00 # Assume OKAY. Could make this dynamic in the future by passing in a ref cell. + bresp_channel.this()[ + "BRESP" + ] = 0b00 # Assume OKAY. Could make this dynamic in the future by passing in a ref cell. with bresp_channel.group("block_transfer") as block_transfer: BREADY = bresp_channel.this()["BREADY"] @@ -198,25 +193,28 @@ def add_bresp_channel(prog): bvalid.in_ = ((bvalid.out & BREADY)) @ 0 bvalid.write_en = 1 - b_handshake_occurred.in_ = (bvalid.out & BREADY) @ 1 b_handshake_occurred.in_ = ~(bvalid.out & BREADY) @ 0 b_handshake_occurred.write_en = 1 block_transfer.done = b_handshake_occurred.out - - bresp_channel.control += [invoke(b_handshake_occurred, in_in = 0), block_transfer] + bresp_channel.control += [invoke(b_handshake_occurred, in_in=0), block_transfer] def add_read_controller(prog, mems): + + add_arread_channel(prog) + add_read_channel(prog) + add_bresp_channel(prog) + read_controller = prog.component("read_controller") read_controller_inputs = [ ("ARESETn", 1), ("ARVALID", 1), ("ARADDR", 16), ("ARPROT", 3), - ("RREADY", 1) - ("ap_done", 1) #signal from XRT, passed in from the entire controller + ("RREADY", 1), + ("ap_done", 1), # signal from XRT, passed in from the entire controller ] read_controller_outputs = [ @@ -226,63 +224,217 @@ def add_read_controller(prog, mems): ("RDATA", 32), ] - read_controller.add_ports(read_controller_inputs, read_controller_outputs) + add_comp_ports(read_controller, read_controller_inputs, read_controller_outputs) - #Cells - ar_channel = read_controller.cell(f"ar_channel", prog.get_component(f"s_ar_channel")) + # Cells + ar_channel = read_controller.cell( + f"ar_channel", prog.get_component(f"s_ar_channel") + ) r_channel = read_controller.cell(f"r_channel", prog.get_component(f"s_r_channel")) - #XRT registers. We currently ignore everything except control and kernel argument registers - - control = read_controller.reg(32, "control_reg", is_ref = True) - #Global Interrupt Enable - gie = read_controller.reg(32, "gie", is_ref = True) - #IP Interrupt Enable - iie = read_controller.reg(32, "iie", is_ref = True) - #IP Interrupt Status - iis = read_controller.reg(32, "iis", is_ref = True) - #These hold the base address of the memory mappings on the host - #Kernel Arguments - for mem in mems: - read_controller.reg(64, f"{mem['name']}_base_addr", is_ref = True) + # Registers + raddr = read_controller.reg(16, "raddr") + + generate_control_registers(read_controller, mems) + + # Helps construct our case control blocks below. + # This method returns an invocation of the r_channel that + # sends out the contents of `reg` on RDATA + def invoke_read_channel(reg): + return invoke( + r_channel, + ref_rdata=reg, + in_ARESETn=read_controller.this()["ARESETn"], + in_RREADY=read_controller.this()["RREADY"], + out_RVALID=read_controller.this()["RVALID"], + out_RRESP=read_controller.this()["RRESP"], + out_RDATA=read_controller.this()["RDATA"], + ) + + # Addresses are specified by XRT + # https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Control-Requirements-for-XRT-Managed-Kernels + case_dict = get_xrt_case_dict(invoke_read_channel, read_controller, mems) + addr_case = read_controller.case(raddr.out, case_dict) + read_controller.control += [ + invoke( + ar_channel, + ref_r_addr = raddr, + in_ARESETn=read_controller.this()["ARESETn"], + in_ARVALID=read_controller.this()["ARVALID"], + in_ARADDR=read_controller.this()["ARADDR"], + in_ARPROT=read_controller.this()["ARPROT"], + out_ARREADY=read_controller.this()["ARREADY"], + ), + addr_case, + ] - read_controller.control + +def add_write_controller(prog, mems): + add_awwrite_channel(prog) + add_write_channel(prog) + add_bresp_channel(prog) + + write_controller = prog.component("write_controller") + write_controller_inputs = [ + ("ARESETn", 1), + ("AWVALID", 1), + ("AWADDR", 16), + ("AWPROT", 3), + ("WVALID", 1), + ("WDATA", 32), + ("WSTRB", 4), + ("BREADY", 1), + ] + + write_controller_outputs = [ + ("AWREADY", 1), + ("WREADY", 1), + ("BVALID", 1), + ("BRRESP", 2), + ] + + add_comp_ports(write_controller, write_controller_inputs, write_controller_outputs) + + # Cells + aw_channel = write_controller.cell( + f"aw_channel", prog.get_component(f"s_aw_channel") + ) + w_channel = write_controller.cell(f"w_channel", prog.get_component(f"s_w_channel")) + b_channel = write_controller.cell(f"b_channel", prog.get_component(f"s_b_channel")) + + # Registers + w_addr = write_controller.reg(16, "w_addr") + generate_control_registers(write_controller, mems) + + # Invocation thats writes what is on WDATA to `reg` + def invoke_write_channel(reg): + return invoke( + w_channel, + ref_wdata=reg, + in_ARESETn=write_controller.this()["ARESETn"], + in_WVALID=write_controller.this()["WVALID"], + in_WDATA=write_controller.this()["WDATA"], + in_WSTRB=write_controller.this()["WSTRB"], + out_WREADY=write_controller.this()["WREADY"], + ) + + case_dict = get_xrt_case_dict(invoke_write_channel, write_controller, mems) + addr_case = write_controller.case(w_addr.out, case_dict) + write_controller.control += [ + invoke( + aw_channel, + ref_aw_addr=w_addr, + in_ARESETn=write_controller.this()["ARESETn"], + in_AWVALID=write_controller.this()["AWVALID"], + in_AWADDR=write_controller.this()["AWADDR"], + in_AWPROT=write_controller.this()["AWPROT"], + out_AWREADY=write_controller.this()["AWREADY"], + ), + addr_case, + invoke( + b_channel, + in_BREADY=write_controller.this()["BREADY"], + out_BVALID=write_controller.this()["BVALID"], + out_BRESP=write_controller.this()["BRRESP"], + ), + ] + + + +def get_xrt_case_dict(invoke_function, controller, mems): + case_dict = { + 0x0: invoke_function(controller.get_cell("control")), + # We only need these if our kernel support interrupts + # 0x4: invoke_function(controller.get_cell("gie")), + # 0x8: invoke_function(controller.get_cell("iie")), + # 0xC: invoke_function(controller.get_cell("iis")), + } + args_addr = 0x10 + for mem in mems: + case_dict[args_addr] = invoke_function( + controller.get_cell(f"{mem['name']}_base_addr") + ) + args_addr += 8 # 64 bit addr per kernel argument is 8 bytes + return case_dict + +# Add XRT specified control registers and appropriate base_address registers for each memory +# to `component` +def generate_control_registers(component, mems): + # XRT registers. We currently ignore everything except control and kernel argument registers + component.reg(32, "control", is_ref=True) + + #We only need these if we want to support interrupts + # # Global Interrupt Enable + # component.reg(32, "gie", is_ref=True) + # # IP Interrupt Enable + # component.reg(32, "iie", is_ref=True) + # # IP Interrupt Status + # component.reg(32, "iis", is_ref=True) + + # These hold the base address of the memory mappings on the host + # Kernel Arguments + for mem in mems: + component.reg(64, f"{mem['name']}_base_addr", is_ref=True) -#Ports must be named `s_axi_control_*` and is case sensitive. +# Ports must be named `s_axi_control_*` and is case sensitive. def add_control_subordinate(prog, mems): + + add_read_controller(prog, mems) + add_write_controller(prog, mems) control_subordinate = prog.component("control_subordinate") control_subordinate_inputs = [ ("ARESETn", 1), ("AWVALID", 1), - ("AWADDR", 16) #XRT imposes a 16-bit address space for the control subordinate + ( + "AWADDR", + 16, + ), # XRT imposes a 16-bit address space for the control subordinate # ("AWPROT", 3), #We don't do anything with this ("WVALID", 1), - ("WDATA", 32) #Want to use 32 bits because the registers in XRT are asusemd to be this size - ("WSTRB", 32/8), #We don't use this but it is required by some versions of the spec. We should tie high on subordinate. - ("BREADY", 1), - + ( + "WDATA", + 32, + ), # Want to use 32 bits because the registers in XRT are asusemd to be this size + ( + "WSTRB", + 32 / 8, + )( # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. + "BREADY", 1 + ), ("ARVALID", 1), ("ARADDR", 16), # ("ARPROT", 3), #We don't do anything with this ("RVALID", 1), - - - ] control_subordinate_outputs = [ ("AWREADY", 1), - ("WREADY", 1) - ("BVALID", 1) - ("BRESP", 2), #No error detection, for now we just set to 0b00 = OKAY. - + ("WREADY", 1), + ("BVALID", 1), + ("BRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. ("ARREADY", 1), ("RDATA", 32), - ("RRESP", 2) #No error detection, for now we just set to 0b00 = OKAY. + ("RRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. ] + add_comp_ports(control_subordinate, control_subordinate_inputs, control_subordinate_outputs) + + # Cells + control = control_subordinate.reg(32, "control") + #TODO: It could be nice to add to builder a way to access bits directly. + # Currently: need to hook up these wires manually + ap_start = control_subordinate.bit_slice("ap_start", 32, 0,0) + ap_done = control_subordinate.bit_slice("ap_done", 32, 1,1) + + read_controller = control_subordinate.cell( + f"read_controller", prog.get_component("read_controller") + ) + write_controller = control_subordinate.cell( + f"write_controller", prog.get_component("write_controller") + ) + + @@ -318,12 +470,10 @@ def clog2_or_1(x): def build(): prog = Builder() + #TODO: All of these should be called heirarchically from add_control_subordinate check_mems_welformed(mems) - add_arread_channel(prog) - add_awwrite_channel(prog) - add_read_channel(prog) - add_write_channel(prog) - add_bresp_channel(prog) + add_read_controller(prog, mems) + add_write_controller(prog, mems) return prog.program @@ -337,7 +487,9 @@ def check_mems_welformed(mems): mem[width_key] ).is_integer(), "Width must be a power of 2 to be correctly described by xSIZE" assert mem[size_key] > 0, "Memory size must be greater than 0" - assert mem[type_key] == "Dynamic", "Only dynamic memories are currently supported for dynamic axi" + assert ( + mem[type_key] == "Dynamic" + ), "Only dynamic memories are currently supported for dynamic axi" if __name__ == "__main__": @@ -355,4 +507,4 @@ def check_mems_welformed(mems): yxifile = open(yxi_filename) yxi = json.load(yxifile) mems = yxi["memories"] - build().emit() \ No newline at end of file + build().emit() From 5f658337f34c962b876ee990cb45186ab73919c6 Mon Sep 17 00:00:00 2001 From: Anshuman Mohan <10830208+anshumanmohan@users.noreply.github.com> Date: Fri, 21 Jun 2024 09:11:15 -0400 Subject: [PATCH 07/66] Queues: use case statements in FIFO control (#2171) * Prepare fifo for case idiom * Attempt with . Failing due to empty control * Delete calyx-py/test/correctness/queues/fifo.futil --- calyx-py/test/correctness/queues/fifo.py | 44 ++++++++++++++++-------- 1 file changed, 30 insertions(+), 14 deletions(-) diff --git a/calyx-py/test/correctness/queues/fifo.py b/calyx-py/test/correctness/queues/fifo.py index 61d54660b8..3d17d91471 100644 --- a/calyx-py/test/correctness/queues/fifo.py +++ b/calyx-py/test/correctness/queues/fifo.py @@ -39,18 +39,31 @@ def insert_fifo(prog, name, queue_len_factor=QUEUE_LEN_FACTOR): len = fifo.reg(32) # The active length of the FIFO. raise_err = fifo.reg_store(err, 1, "raise_err") # err := 1 - # The user called pop/peek. + # The user called pop. # If the queue is empty, we should raise an error. # Otherwise, we should proceed with the core logic - pop_peek_logic = cb.if_with( + pop_logic = cb.if_with( fifo.eq_use(len.out, 0), raise_err, [ - # `pop` or `peek` has been called, and the queue is not empty. - fifo.mem_load_d1(mem, read.out, ans, "read_payload_from_mem"), + # `pop` has been called, and the queue is not empty. + # Write the answer to the answer register, increment `read`, and decrement `len`. + fifo.mem_load_d1(mem, read.out, ans, "read_payload_from_mem_pop"), + fifo.incr(read), + fifo.decr(len), + ], + ) + + # The user called peek. + # If the queue is empty, we should raise an error. + # Otherwise, we should proceed with the core logic + peek_logic = cb.if_with( + fifo.eq_use(len.out, 0), + raise_err, + [ + # `peek` has been called, and the queue is not empty. # Write the answer to the answer register. - # If the user called pop, increment `read` and decrement `len`. - cb.if_with(fifo.eq_use(cmd, 0), [fifo.incr(read), fifo.decr(len)]), + fifo.mem_load_d1(mem, read.out, ans, "read_payload_from_mem_peek"), ], ) @@ -69,14 +82,17 @@ def insert_fifo(prog, name, queue_len_factor=QUEUE_LEN_FACTOR): ) fifo.control += cb.par( - # Was it a (pop/peek), or a push? We can do those two cases in parallel. - # The logic is shared for pops and peeks, with just a few differences. - # Did the user call pop/peek? - cb.if_with(fifo.lt_use(cmd, 2), pop_peek_logic), - # Did the user call push? - cb.if_with(fifo.eq_use(cmd, 2), push_logic), - # Did the user call an invalid command? - cb.if_with(fifo.eq_use(cmd, 3), raise_err), + # Was it a pop, peek, push, or an invalid command? + # We can do those four cases in parallel. + fifo.case( + cmd, + { + 0: pop_logic, + 1: peek_logic, + 2: push_logic, + 3: raise_err, + }, + ), ) return fifo From ea71a0acf14ff621280188bb456d57e3023574b7 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 09:45:54 -0400 Subject: [PATCH 08/66] improve naming of equalities and add name functions to some classes in builder --- calyx-py/calyx/builder.py | 3 ++- calyx-py/calyx/py_ast.py | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index dd58b3e8a7..71cc76dd74 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -218,10 +218,11 @@ def case( like semantics in the component. Does not support `default` cases. Branches are implemented via mutually exclusive `if` statements in the component's `control` block.""" + print(signal.expr) width = self.infer_width(signal) ifs = [] for branch, controllable in cases.items(): - std_eq = self.eq(width, f"case_eq_{branch}", signed) + std_eq = self.eq(width, f"{signal.name()}_eq_{branch}", signed) with self.continuous: std_eq.left = signal diff --git a/calyx-py/calyx/py_ast.py b/calyx-py/calyx/py_ast.py index f4cc6f9e6b..53a1962a6c 100644 --- a/calyx-py/calyx/py_ast.py +++ b/calyx-py/calyx/py_ast.py @@ -212,6 +212,9 @@ class ThisPort(Port): def doc(self) -> str: return self.id.doc() + def name(self) -> str: + return self.id.name + @dataclass class HolePort(Port): @@ -362,6 +365,9 @@ class Atom(GuardExpr): def doc(self) -> str: return self.item.doc() + def name(self) -> str: + return self.item.name() + @dataclass class Not(GuardExpr): From 1ba2147c38572ef1b7c92917f1c5b5168c3ef917 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 09:46:14 -0400 Subject: [PATCH 09/66] runt tests --- calyx-py/test/case.expect | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/calyx-py/test/case.expect b/calyx-py/test/case.expect index 571dafc946..957738a66e 100644 --- a/calyx-py/test/case.expect +++ b/calyx-py/test/case.expect @@ -1,26 +1,27 @@ +Atom(item=ThisPort(id=CompVar(name='in_1'))) import "primitives/core.futil"; import "primitives/binary_operators.futil"; component my_comp(in_1: 8) -> (out_1: 16) { cells { comp_reg = std_reg(1); - case_eq_1 = std_eq(8); - case_eq_2 = std_eq(8); + in_1_eq_1 = std_eq(8); + in_1_eq_2 = std_eq(8); } wires { group my_group { } - case_eq_1.left = in_1; - case_eq_1.right = 8'd1; - case_eq_2.left = in_1; - case_eq_2.right = 8'd2; + in_1_eq_1.left = in_1; + in_1_eq_1.right = 8'd1; + in_1_eq_2.left = in_1; + in_1_eq_2.right = 8'd2; } control { par { - if case_eq_1.out { + if in_1_eq_1.out { my_group; } - if case_eq_2.out { + if in_1_eq_2.out { invoke comp_reg(in=1'd1)(); } } From 98f3842a2f68c570e68e4d77b05fc9e203b1cb28 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 09:47:31 -0400 Subject: [PATCH 10/66] apply black --- calyx-py/calyx/builder.py | 2 +- calyx-py/calyx/pifo_tree_oracle.py | 1 - calyx-py/calyx/py_ast.py | 2 ++ 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index 71cc76dd74..5835d56b7b 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -208,7 +208,7 @@ def control(self, builder: Union[ast.Control, ControlBuilder]): else: self.component.controls = builder - #NOTE: Could also be a GroupBuilder + # NOTE: Could also be a GroupBuilder Controllable = Union[ast.Control, str, ast.Group, list, set, ast.Empty, None] def case( diff --git a/calyx-py/calyx/pifo_tree_oracle.py b/calyx-py/calyx/pifo_tree_oracle.py index 1921d7b397..e6f3f2d0b1 100644 --- a/calyx-py/calyx/pifo_tree_oracle.py +++ b/calyx-py/calyx/pifo_tree_oracle.py @@ -6,7 +6,6 @@ if __name__ == "__main__": - max_cmds, len = int(sys.argv[1]), int(sys.argv[2]) keepgoing = "--keepgoing" in sys.argv commands, values = queue_util.parse_json() diff --git a/calyx-py/calyx/py_ast.py b/calyx-py/calyx/py_ast.py index 53a1962a6c..fc4cac09b7 100644 --- a/calyx-py/calyx/py_ast.py +++ b/calyx-py/calyx/py_ast.py @@ -176,11 +176,13 @@ class CompAttribute(Attribute): def doc(self) -> str: return f'"{self.name}"={self.value}' + @dataclass class PortAttribute(Attribute): name: str value: Optional[int] = None + @dataclass class PortAttribute(Attribute): name: str From 82acb173ff26ba50d3f85dce3ab7486ec5c1c966 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 11:14:27 -0400 Subject: [PATCH 11/66] remove extra print --- calyx-py/calyx/builder.py | 1 - 1 file changed, 1 deletion(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index a029ddf72b..9d57b48393 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -218,7 +218,6 @@ def case( like semantics in the component. Does not support `default` cases. Branches are implemented via mutually exclusive `if` statements in the component's `control` block.""" - print(signal.expr) width = self.infer_width(signal) ifs = [] for branch, controllable in cases.items(): From 6c2ced13c825b2f5bf614b9a8b54e354e1402215 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 11:14:49 -0400 Subject: [PATCH 12/66] runt tests --- calyx-py/test/case.expect | 1 - 1 file changed, 1 deletion(-) diff --git a/calyx-py/test/case.expect b/calyx-py/test/case.expect index 957738a66e..d201c6428f 100644 --- a/calyx-py/test/case.expect +++ b/calyx-py/test/case.expect @@ -1,4 +1,3 @@ -Atom(item=ThisPort(id=CompVar(name='in_1'))) import "primitives/core.futil"; import "primitives/binary_operators.futil"; component my_comp(in_1: 8) -> (out_1: 16) { From c968a9e133770e15230c00bb47ec6e32589fb319 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 12:07:02 -0400 Subject: [PATCH 13/66] print out signals when possible for case statement signals --- calyx-py/calyx/builder.py | 2 +- calyx-py/calyx/py_ast.py | 16 +++++++++++++--- 2 files changed, 14 insertions(+), 4 deletions(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index 9d57b48393..bb28a7511a 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -221,7 +221,7 @@ def case( width = self.infer_width(signal) ifs = [] for branch, controllable in cases.items(): - std_eq = self.eq(width, f"{signal.name()}_eq_{branch}", signed) + std_eq = self.eq(width, f"{signal.name}_eq_{branch}", signed) with self.continuous: std_eq.left = signal diff --git a/calyx-py/calyx/py_ast.py b/calyx-py/calyx/py_ast.py index fc4cac09b7..6f0d661d29 100644 --- a/calyx-py/calyx/py_ast.py +++ b/calyx-py/calyx/py_ast.py @@ -206,6 +206,9 @@ class CompPort(Port): def doc(self) -> str: return f"{self.id.doc()}.{self.name}" + def get_name(self) -> str: + return f"{self.id.doc()}_{self.name}" + @dataclass class ThisPort(Port): @@ -214,8 +217,8 @@ class ThisPort(Port): def doc(self) -> str: return self.id.doc() - def name(self) -> str: - return self.id.name + def get_name(self) -> str: + return self.id.get_name() @dataclass @@ -226,6 +229,9 @@ class HolePort(Port): def doc(self) -> str: return f"{self.id.doc()}[{self.name}]" + def get_name(self) -> str: + return self.name + @dataclass class ConstantPort(Port): @@ -249,6 +255,9 @@ def port(self, port: str) -> CompPort: def add_suffix(self, suffix: str) -> CompVar: return CompVar(f"{self.name}{suffix}") + def get_name(self) -> str: + return self.name + @dataclass class PortDef(Emittable): @@ -367,8 +376,9 @@ class Atom(GuardExpr): def doc(self) -> str: return self.item.doc() + @property def name(self) -> str: - return self.item.name() + return f"{self.item.get_name()}" @dataclass From 0ec3e3350f03b19da52233feb8afb3f3620f503d Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 16:24:00 -0400 Subject: [PATCH 14/66] might have working axi-controller. TODO: hoko up with overall wrapper --- yxi/axi-calyx/axi-controller-generator.py | 139 ++++++++++++++++------ 1 file changed, 100 insertions(+), 39 deletions(-) diff --git a/yxi/axi-calyx/axi-controller-generator.py b/yxi/axi-calyx/axi-controller-generator.py index b74ec0fd36..07f8e2930a 100644 --- a/yxi/axi-calyx/axi-controller-generator.py +++ b/yxi/axi-calyx/axi-controller-generator.py @@ -1,4 +1,4 @@ -from calyx.builder import Builder, add_comp_ports, invoke, par, while_, if_ +from calyx.builder import Builder, add_comp_ports, invoke, const, par, while_with, if_ from typing import Literal from math import log2 import json @@ -202,10 +202,8 @@ def add_bresp_channel(prog): def add_read_controller(prog, mems): - add_arread_channel(prog) add_read_channel(prog) - add_bresp_channel(prog) read_controller = prog.component("read_controller") read_controller_inputs = [ @@ -235,7 +233,7 @@ def add_read_controller(prog, mems): # Registers raddr = read_controller.reg(16, "raddr") - generate_control_registers(read_controller, mems) + generate_control_registers(read_controller, mems, as_refs=True) # Helps construct our case control blocks below. # This method returns an invocation of the r_channel that @@ -258,7 +256,7 @@ def invoke_read_channel(reg): read_controller.control += [ invoke( ar_channel, - ref_r_addr = raddr, + ref_r_addr=raddr, in_ARESETn=read_controller.this()["ARESETn"], in_ARVALID=read_controller.this()["ARVALID"], in_ARADDR=read_controller.this()["ARADDR"], @@ -304,7 +302,7 @@ def add_write_controller(prog, mems): # Registers w_addr = write_controller.reg(16, "w_addr") - generate_control_registers(write_controller, mems) + generate_control_registers(write_controller, mems, as_refs=True) # Invocation thats writes what is on WDATA to `reg` def invoke_write_channel(reg): @@ -338,7 +336,6 @@ def invoke_write_channel(reg): out_BRESP=write_controller.this()["BRRESP"], ), ] - def get_xrt_case_dict(invoke_function, controller, mems): @@ -357,51 +354,46 @@ def get_xrt_case_dict(invoke_function, controller, mems): args_addr += 8 # 64 bit addr per kernel argument is 8 bytes return case_dict + # Add XRT specified control registers and appropriate base_address registers for each memory # to `component` -def generate_control_registers(component, mems): +# Returns list of control registers for easy access to iterate through +def generate_control_registers(component, mems, as_refs : bool): # XRT registers. We currently ignore everything except control and kernel argument registers - component.reg(32, "control", is_ref=True) - - #We only need these if we want to support interrupts + control_regs = [component.reg(32, "control", as_refs)] + + # We only need these if we want to support interrupts # # Global Interrupt Enable - # component.reg(32, "gie", is_ref=True) + # component.reg(32, "gie", as_refs) # # IP Interrupt Enable - # component.reg(32, "iie", is_ref=True) + # component.reg(32, "iie", as_refs) # # IP Interrupt Status - # component.reg(32, "iis", is_ref=True) + # component.reg(32, "iis", as_refs) # These hold the base address of the memory mappings on the host # Kernel Arguments for mem in mems: - component.reg(64, f"{mem['name']}_base_addr", is_ref=True) + control_regs.append(component.reg(64, f"{mem['name']}_base_addr", as_refs)) + return control_regs # Ports must be named `s_axi_control_*` and is case sensitive. def add_control_subordinate(prog, mems): - add_read_controller(prog, mems) add_write_controller(prog, mems) control_subordinate = prog.component("control_subordinate") control_subordinate_inputs = [ ("ARESETn", 1), ("AWVALID", 1), - ( - "AWADDR", - 16, - ), # XRT imposes a 16-bit address space for the control subordinate + # XRT imposes a 16-bit address space for the control subordinate + ("AWADDR", 16), # ("AWPROT", 3), #We don't do anything with this ("WVALID", 1), - ( - "WDATA", - 32, - ), # Want to use 32 bits because the registers in XRT are asusemd to be this size - ( - "WSTRB", - 32 / 8, - )( # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. - "BREADY", 1 - ), + # Want to use 32 bits because the registers in XRT are asusemd to be this size + ("WDATA", 32), + # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. + ("WSTRB", 32 / 8), + ("BREADY", 1), ("ARVALID", 1), ("ARADDR", 16), # ("ARPROT", 3), #We don't do anything with this @@ -416,17 +408,23 @@ def add_control_subordinate(prog, mems): ("ARREADY", 1), ("RDATA", 32), ("RRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. + ("ap_start", 1), + ("ap_done", 1), ] - add_comp_ports(control_subordinate, control_subordinate_inputs, control_subordinate_outputs) + add_comp_ports( + control_subordinate, control_subordinate_inputs, control_subordinate_outputs + ) # Cells - control = control_subordinate.reg(32, "control") - #TODO: It could be nice to add to builder a way to access bits directly. + # Registers for control + control_regs = generate_control_registers(control_subordinate, mems, as_refs=False) + # TODO: It could be nice to add to builder a way to access bits directly. # Currently: need to hook up these wires manually - ap_start = control_subordinate.bit_slice("ap_start", 32, 0,0) - ap_done = control_subordinate.bit_slice("ap_done", 32, 1,1) - + ap_start = control_subordinate.bit_slice("ap_start", 32, 0, 0, 1) + ap_done = control_subordinate.bit_slice("ap_done", 32, 1, 1, 1) + + read_controller = control_subordinate.cell( f"read_controller", prog.get_component("read_controller") ) @@ -434,8 +432,73 @@ def add_control_subordinate(prog, mems): f"write_controller", prog.get_component("write_controller") ) + # Wires + xrt_control_reg = control_subordinate.get_cell("control") + + with control_subordinate.continuous: + # NOTE (nate): There must be a better away of hooking up a components ports to + # a cell's ports within the component. Unfortunately I don't think the builders existing + # `build_connections` does exactly what we want here. + this = control_subordinate.this() + + # Connections from sub-controllers to control subordinate. + # Inputs + write_controller["ARESETn"] = this["ARESETn"] + write_controller["AWVALID"] = this["AWVALID"] + write_controller["AWADDR"] = this["AWADDR"] + write_controller["AWPROT"] = const(3, 0b110) #Tie to priveleged, nonsecure, data access request + write_controller["WVALID"] = this["WVALID"] + write_controller["WDATA"] = this["WDATA"] + write_controller["WSTRB"] = this["WSTRB"] + write_controller["BREADY"] = this["BREADY"] + + read_controller["ARESETn"] = this["ARESETn"] + read_controller["ARVALID"] = this["ARVALID"] + read_controller["ARADDR"] = this["ARADDR"] + read_controller["ARPROT"] = const(3, 0b110) #Tie to priveleged, nonsecure, data access request. + read_controller["RREADY"] = this["RREADY"] + + # Outputs + this["AWREADY"] = write_controller["AWREADY"] + this["WREADY"] = write_controller["WREADY"] + this["BVALID"] = write_controller["BVALID"] + this["BRESP"] = write_controller["BRRESP"] + this["ARREADY"] = read_controller["ARREADY"] + this["RDATA"] = read_controller["RDATA"] + this["RRESP"] = read_controller["RRESP"] + + + # XRT Wiring stuff + ap_start.in_ = xrt_control_reg.out + ap_done.in_ = xrt_control_reg.out + control_subordinate.this() + + with control_subordinate.group("init_control_regs") as init_control_regs: + for reg in control_regs: + reg.in_ = 0 + + init_control_regs.done = xrt_control_reg.done + + sub_controller_kwargs = {} + for reg in control_regs: + sub_controller_kwargs[f"ref_{reg.name}"] = reg + # Control + read_controller_invoke = invoke( + read_controller, + **sub_controller_kwargs + ) + write_controller_invoke = invoke( + write_controller, + **sub_controller_kwargs + ) + + n_ap_done = control_subordinate.not_use(ap_done.out, "n_ap_done") + control_subordinate.control += [ + init_control_regs, + while_with(n_ap_done, par(read_controller_invoke, write_controller_invoke)), + ] ######################################### @@ -470,10 +533,8 @@ def clog2_or_1(x): def build(): prog = Builder() - #TODO: All of these should be called heirarchically from add_control_subordinate check_mems_welformed(mems) - add_read_controller(prog, mems) - add_write_controller(prog, mems) + add_control_subordinate(prog, mems) return prog.program From 9b2740af83bc39c6fb4e23048219f1c7c775a993 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 16:24:16 -0400 Subject: [PATCH 15/66] remove unused function from port attribute PR --- calyx-py/calyx/builder.py | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/calyx-py/calyx/builder.py b/calyx-py/calyx/builder.py index bb28a7511a..5789c7d2a5 100644 --- a/calyx-py/calyx/builder.py +++ b/calyx-py/calyx/builder.py @@ -132,18 +132,6 @@ def output( """ return self._port_with_attributes(name, size, False, attribute_literals) - def output_with_attributes( - self, - name: str, - size: int, - attribute_literals: List[Union[str, Tuple[str, int]]], - ) -> ExprBuilder: - """Declare an output port on the component with attributes. - - Returns an expression builder for the port. - """ - return self._port_with_attributes(name, size, False, attribute_literals) - def attribute(self, name: str, value: int) -> None: """Declare an attribute on the component.""" self.component.attributes.append(ast.CompAttribute(name, value)) From 99f215a0a77331002640e725a7cc6368ad05b072 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Fri, 21 Jun 2024 17:06:02 -0400 Subject: [PATCH 16/66] Controller is largely done TODO: Hook up ap_start from controller in wrapper to the main_compute module --- ...nerator.py => axi_controller_generator.py} | 2 + ...-generator.py => dynamic_axi_generator.py} | 71 ++++++++++++++----- 2 files changed, 56 insertions(+), 17 deletions(-) rename yxi/axi-calyx/{axi-controller-generator.py => axi_controller_generator.py} (99%) rename yxi/axi-calyx/{dynamic-axi-generator.py => dynamic_axi_generator.py} (94%) diff --git a/yxi/axi-calyx/axi-controller-generator.py b/yxi/axi-calyx/axi_controller_generator.py similarity index 99% rename from yxi/axi-calyx/axi-controller-generator.py rename to yxi/axi-calyx/axi_controller_generator.py index 07f8e2930a..33ff0bb9d1 100644 --- a/yxi/axi-calyx/axi-controller-generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -466,6 +466,8 @@ def add_control_subordinate(prog, mems): this["ARREADY"] = read_controller["ARREADY"] this["RDATA"] = read_controller["RDATA"] this["RRESP"] = read_controller["RRESP"] + this["ap_start"] = ap_start.out + this["ap_done"] = ap_done.out # XRT Wiring stuff diff --git a/yxi/axi-calyx/dynamic-axi-generator.py b/yxi/axi-calyx/dynamic_axi_generator.py similarity index 94% rename from yxi/axi-calyx/dynamic-axi-generator.py rename to yxi/axi-calyx/dynamic_axi_generator.py index 575e8a02f5..1bb288a2f5 100644 --- a/yxi/axi-calyx/dynamic-axi-generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -6,6 +6,7 @@ while_, if_ ) +from axi_controller_generator import add_control_subordinate from typing import Literal from math import log2, ceil import json @@ -347,6 +348,9 @@ def add_bresp_channel(prog, mem): bresp_channel.control += [invoke(bt_reg, in_in=0), block_transfer] def add_read_controller(prog, mem): + add_arread_channel(prog, mem) + add_read_channel(prog, mem) + data_width = mem[width_key] name = mem[name_key] @@ -416,6 +420,9 @@ def add_read_controller(prog, mem): ] def add_write_controller(prog, mem): + add_awwrite_channel(prog, mem) + add_write_channel(prog, mem) + add_bresp_channel(prog, mem) data_width = mem[width_key] name = mem[name_key] @@ -594,15 +601,18 @@ def add_axi_dyn_mem(prog, mem): # NOTE: Unlike the channel functions, this can expect multiple mems -def add_main_comp(prog, mems): +def add_wrapper_comp(prog, mems): + + add_control_subordinate(prog,mems) + for mem in mems: + add_address_translator(prog, mem) + add_read_controller(prog, mem) + add_write_controller(prog, mem) + add_axi_dyn_mem(prog, mem) + wrapper_comp = prog.component("wrapper") wrapper_comp.attribute("toplevel", 1) # Get handles to be used later - # read_channel = prog.get_component("m_read_channel") - # write_channel = prog.get_component("m_write_channel") - # ar_channel = prog.get_component("m_ar_channel") - # aw_channel = prog.get_component("m_aw_channel") - # bresp_channel = prog.get_component("m_bresp_channel") ref_mem_kwargs = {} @@ -611,6 +621,43 @@ def add_main_comp(prog, mems): "main_compute", "main", check_undeclared=False ) + # Generate XRT Control Ports for AXI Lite Control Subordinate, + # must be prefixed with `s_axi_control` + # This is copied from `axi_controller_generator.py` + prefix = "s_axi_control_" + wrapper_inputs = [ + (f"{prefix}AWVALID", 1), + # XRT imposes a 16-bit address space for the control subordinate + (f"{prefix}AWADDR", 16), + # ("AWPROT", 3), #We don't do anything with this + (f"{prefix}WVALID", 1), + # Want to use 32 bits because the registers in XRT are asusemd to be this size + (f"{prefix}WDATA", 32), + # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. + (f"{prefix}WSTRB", 32 / 8), + (f"{prefix}BREADY", 1), + (f"{prefix}ARVALID", 1), + (f"{prefix}ARADDR", 16), + # ("ARPROT", 3), #We don't do anything with this + (f"{prefix}RVALID", 1), + ] + + wrapper_outputs = [ + (f"{prefix}AWREADY", 1), + (f"{prefix}WREADY", 1), + (f"{prefix}BVALID", 1), + (f"{prefix}BRESP", 2), + (f"{prefix}ARREADY", 1), + (f"{prefix}RDATA", 32), + (f"{prefix}RRESP", 2), + ("ap_start", 1), + ("ap_done", 1), + ] + + add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) + + wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) + # Generate manager controllers for each memory for mem in mems: mem_name = mem[name_key] # Inputs/Outputs @@ -746,17 +793,7 @@ def clog2_or_1(x): def build(): prog = Builder() check_mems_welformed(mems) - for mem in mems: - add_arread_channel(prog, mem) - add_awwrite_channel(prog, mem) - add_read_channel(prog, mem) - add_write_channel(prog, mem) - add_bresp_channel(prog, mem) - add_address_translator(prog, mem) - add_read_controller(prog, mem) - add_write_controller(prog, mem) - add_axi_dyn_mem(prog, mem) #TODO: need one for each mem - add_main_comp(prog, mems) + add_wrapper_comp(prog, mems) return prog.program From 590bdef20aa246248b6202254b8aa4a7465320cb Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Mon, 24 Jun 2024 15:37:03 -0400 Subject: [PATCH 17/66] work on controller and hook up to dynamic axi --- yxi/axi-calyx/axi_controller_generator.py | 39 ++++++++++++++--------- yxi/axi-calyx/dynamic_axi_generator.py | 39 +++++++++++++++++++---- 2 files changed, 57 insertions(+), 21 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 33ff0bb9d1..c19d957066 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -205,7 +205,7 @@ def add_read_controller(prog, mems): add_arread_channel(prog) add_read_channel(prog) - read_controller = prog.component("read_controller") + read_controller = prog.component("s_control_read_controller") read_controller_inputs = [ ("ARESETn", 1), ("ARVALID", 1), @@ -272,7 +272,7 @@ def add_write_controller(prog, mems): add_write_channel(prog) add_bresp_channel(prog) - write_controller = prog.component("write_controller") + write_controller = prog.component("s_control_write_controller") write_controller_inputs = [ ("ARESETn", 1), ("AWVALID", 1), @@ -392,12 +392,13 @@ def add_control_subordinate(prog, mems): # Want to use 32 bits because the registers in XRT are asusemd to be this size ("WDATA", 32), # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. - ("WSTRB", 32 / 8), + ("WSTRB", int(32 / 8)), ("BREADY", 1), ("ARVALID", 1), ("ARADDR", 16), # ("ARPROT", 3), #We don't do anything with this ("RVALID", 1), + ("ap_done_in", 1), ] control_subordinate_outputs = [ @@ -409,7 +410,7 @@ def add_control_subordinate(prog, mems): ("RDATA", 32), ("RRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. ("ap_start", 1), - ("ap_done", 1), + ("ap_done_out", 1), ] add_comp_ports( @@ -421,15 +422,16 @@ def add_control_subordinate(prog, mems): control_regs = generate_control_registers(control_subordinate, mems, as_refs=False) # TODO: It could be nice to add to builder a way to access bits directly. # Currently: need to hook up these wires manually - ap_start = control_subordinate.bit_slice("ap_start", 32, 0, 0, 1) - ap_done = control_subordinate.bit_slice("ap_done", 32, 1, 1, 1) + ap_start_slice = control_subordinate.bit_slice("ap_start_slice", 32, 0, 0, 1) + ap_done_slice = control_subordinate.bit_slice("ap_done_slice", 32, 1, 1, 1) + ap_done_or = control_subordinate.or_(32, "ap_done_or") read_controller = control_subordinate.cell( - f"read_controller", prog.get_component("read_controller") + f"s_control_read_controller", prog.get_component("s_control_read_controller") ) write_controller = control_subordinate.cell( - f"write_controller", prog.get_component("write_controller") + f"s_control_write_controller", prog.get_component("s_control_write_controller") ) # Wires @@ -456,7 +458,6 @@ def add_control_subordinate(prog, mems): read_controller["ARVALID"] = this["ARVALID"] read_controller["ARADDR"] = this["ARADDR"] read_controller["ARPROT"] = const(3, 0b110) #Tie to priveleged, nonsecure, data access request. - read_controller["RREADY"] = this["RREADY"] # Outputs this["AWREADY"] = write_controller["AWREADY"] @@ -466,13 +467,13 @@ def add_control_subordinate(prog, mems): this["ARREADY"] = read_controller["ARREADY"] this["RDATA"] = read_controller["RDATA"] this["RRESP"] = read_controller["RRESP"] - this["ap_start"] = ap_start.out - this["ap_done"] = ap_done.out + this["ap_start"] = ap_start_slice.out + this["ap_done_out"] = ap_done_slice.out # XRT Wiring stuff - ap_start.in_ = xrt_control_reg.out - ap_done.in_ = xrt_control_reg.out + ap_start_slice.in_ = xrt_control_reg.out + ap_done_slice.in_ = xrt_control_reg.out control_subordinate.this() with control_subordinate.group("init_control_regs") as init_control_regs: @@ -481,6 +482,14 @@ def add_control_subordinate(prog, mems): init_control_regs.done = xrt_control_reg.done + with control_subordinate.group("check_ap_done") as check_ap_done: + ap_done_or.left = xrt_control_reg.out + ap_done_or.right = ap_done_slice.out @ const(32, 0b10) + ap_done_or.right = ~ap_done_slice.out @ const(32, 0) + xrt_control_reg.in_ = ap_done_or.out + xrt_control_reg.write_en = 1 + check_ap_done.done = xrt_control_reg.done + sub_controller_kwargs = {} for reg in control_regs: sub_controller_kwargs[f"ref_{reg.name}"] = reg @@ -495,11 +504,11 @@ def add_control_subordinate(prog, mems): **sub_controller_kwargs ) - n_ap_done = control_subordinate.not_use(ap_done.out, "n_ap_done") + n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) control_subordinate.control += [ init_control_regs, - while_with(n_ap_done, par(read_controller_invoke, write_controller_invoke)), + while_with(n_ap_done, [par(read_controller_invoke, write_controller_invoke), check_ap_done]), ] diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index 1bb288a2f5..cd011ee347 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -634,7 +634,7 @@ def add_wrapper_comp(prog, mems): # Want to use 32 bits because the registers in XRT are asusemd to be this size (f"{prefix}WDATA", 32), # We don't use this but it is required by some versions of the spec. We should tie high on subordinate. - (f"{prefix}WSTRB", 32 / 8), + (f"{prefix}WSTRB", int(32 / 8)), (f"{prefix}BREADY", 1), (f"{prefix}ARVALID", 1), (f"{prefix}ARADDR", 16), @@ -655,8 +655,28 @@ def add_wrapper_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) + + control_subordinate = wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) + ap_start_block_reg = wrapper_comp.reg(1, f"ap_start_block_reg") + ap_done_reg = wrapper_comp.reg(1, f"ap_done_reg") + + #NOTE: This breaks encapsulation of modules a bit, + # but allows us to block on ap_start in the control block without + # adding new control flow constructs. + + # Ideally, it'd be nice to have this functionality included as part of + # the control flow of the wrapper or perhaps the main_compute invocation? + with wrapper_comp.group(f"block_ap_start") as block_ap_start: + ap_start_block_reg.in_ = 1 + ap_start_block_reg.write_en = control_subordinate.ap_start + block_ap_start.done = ap_start_block_reg.done + + with wrapper_comp.group(f"assert_ap_done") as assert_ap_done: + control_subordinate.ap_done_in = ap_done_reg.out + ap_done_reg.in_ = 1 + ap_done_reg.write_en = 1 + assert_ap_done.done = ap_done_reg.done - wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) # Generate manager controllers for each memory for mem in mems: mem_name = mem[name_key] @@ -708,7 +728,6 @@ def add_wrapper_comp(prog, mems): # TODO: Don't think these need to be marked external, but we # we need to raise them at some point form original calyx program axi_mem = wrapper_comp.cell(f"axi_dyn_mem_{mem_name}", prog.get_component(f"axi_dyn_mem_{mem_name}")) - # Wires with wrapper_comp.continuous: @@ -750,20 +769,28 @@ def add_wrapper_comp(prog, mems): wrapper_comp.this()[f"{mem_name}_WLAST"] = axi_mem.WLAST wrapper_comp.this()[f"{mem_name}_WDATA"] = axi_mem.WDATA wrapper_comp.this()[f"{mem_name}_BREADY"] = axi_mem.BREADY + # Creates ` = internal_mem_` as refs in invocation of `main_compute` ref_mem_kwargs[f"ref_{mem_name}"] = axi_mem + # Control + # Compute invoke # Assumes refs should be of form ` = internal_mem_` main_compute_invoke = invoke( - wrapper_comp.get_cell("main_compute"), **ref_mem_kwargs + main_compute, **ref_mem_kwargs ) + control_subordinate_invoke = invoke(control_subordinate) + + # Compiler should reschedule these 2 seqs to be in parallel right? - wrapper_comp.control += main_compute_invoke - # Reset axi adress to 0 + wrapper_comp.control += par( + control_subordinate_invoke, + [block_ap_start, main_compute_invoke, assert_ap_done] + ) # Helper functions From b9b23d4dbd850f9260e7af078bd7d1fb3b7dd31b Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Tue, 9 Jul 2024 07:32:50 -0400 Subject: [PATCH 18/66] generator updates wip --- yxi/axi-calyx/axi_controller_generator.py | 42 +++++++++++++++++++---- yxi/axi-calyx/dynamic_axi_generator.py | 40 ++++++++++++++++++--- 2 files changed, 71 insertions(+), 11 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index c19d957066..9aa4ec2aad 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -52,7 +52,7 @@ def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R elif x == "W": channel_inputs.append((f"WVALID", 1)) channel_inputs.append((f"WDATA", 32)) - channel_inputs.append((f"WSTRB", 2)) + channel_inputs.append((f"WSTRB", int(32 / 8))) channel_outputs.append((f"WREADY", 1)) elif x in ["B", "R"]: channel_inputs.append((f"{x}READY", 1)) @@ -87,7 +87,7 @@ def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): with s_to_m_address_channel.continuous: s_to_m_address_channel.this()[f"{x}READY"] = x_ready.out - x_addr.in_ = s_to_m_address_channel.this()[f"{x}ADDR"] + # x_addr.in_ = s_to_m_address_channel.this()[f"{x}ADDR"] with s_to_m_address_channel.group("block_transfer") as block_transfer: xVALID = s_to_m_address_channel.this()[f"{x}VALID"] @@ -321,7 +321,7 @@ def invoke_write_channel(reg): write_controller.control += [ invoke( aw_channel, - ref_aw_addr=w_addr, + ref_w_addr=w_addr, in_ARESETn=write_controller.this()["ARESETn"], in_AWVALID=write_controller.this()["AWVALID"], in_AWADDR=write_controller.this()["AWADDR"], @@ -349,9 +349,13 @@ def get_xrt_case_dict(invoke_function, controller, mems): args_addr = 0x10 for mem in mems: case_dict[args_addr] = invoke_function( - controller.get_cell(f"{mem['name']}_base_addr") + controller.get_cell(f"{mem['name']}_base_addr_0_31") ) - args_addr += 8 # 64 bit addr per kernel argument is 8 bytes + args_addr += 4 # 32 bit addr per kernel argument is 4 bytes + case_dict[args_addr] = invoke_function( + controller.get_cell(f"{mem['name']}_base_addr_32_63") + ) + args_addr += 4 return case_dict @@ -372,8 +376,23 @@ def generate_control_registers(component, mems, as_refs : bool): # These hold the base address of the memory mappings on the host # Kernel Arguments + # We split these into 2 because it makes sense for the AXI-lite interface to be 32 bits for mem in mems: - control_regs.append(component.reg(64, f"{mem['name']}_base_addr", as_refs)) + base_addr_right = component.reg(32, f"{mem['name']}_base_addr_0_31", as_refs) + base_addr_left = component.reg(32, f"{mem['name']}_base_addr_32_63", as_refs) + control_regs.append(base_addr_right) + control_regs.append(base_addr_left) + + # We assume that the concrete control registers are in the `control_subordinate` + # components, which needs to output base addresses, so we want to create 64 bit std-cat + # and might as well hook them up? + if not as_refs: + base_addr_cat = component.cat(32, 32, f"{mem['name']}_base_addr_cat") + with component.continuous: + base_addr_cat.left = base_addr_left.out + base_addr_cat.right = base_addr_right.out + + return control_regs @@ -408,6 +427,7 @@ def add_control_subordinate(prog, mems): ("BRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. ("ARREADY", 1), ("RDATA", 32), + ("RREADY", 1), ("RRESP", 2), # No error detection, for now we just set to 0b00 = OKAY. ("ap_start", 1), ("ap_done_out", 1), @@ -417,9 +437,10 @@ def add_control_subordinate(prog, mems): control_subordinate, control_subordinate_inputs, control_subordinate_outputs ) + control_regs = generate_control_registers(control_subordinate, mems, as_refs=False) + # Cells # Registers for control - control_regs = generate_control_registers(control_subordinate, mems, as_refs=False) # TODO: It could be nice to add to builder a way to access bits directly. # Currently: need to hook up these wires manually ap_start_slice = control_subordinate.bit_slice("ap_start_slice", 32, 0, 0, 1) @@ -438,6 +459,12 @@ def add_control_subordinate(prog, mems): xrt_control_reg = control_subordinate.get_cell("control") with control_subordinate.continuous: + + # output base addresses to memories + for mem in mems: + control_subordinate.output(f"{mem['name']}_base_addr", 64) + control_subordinate.this()[f"{mem['name']}_base_addr"] = control_subordinate.get_cell(f"{mem['name']}_base_addr_cat").out + # NOTE (nate): There must be a better away of hooking up a components ports to # a cell's ports within the component. Unfortunately I don't think the builders existing # `build_connections` does exactly what we want here. @@ -479,6 +506,7 @@ def add_control_subordinate(prog, mems): with control_subordinate.group("init_control_regs") as init_control_regs: for reg in control_regs: reg.in_ = 0 + reg.write_en = 1 init_control_regs.done = xrt_control_reg.done diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index cd011ee347..8be4f8513a 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -508,6 +508,7 @@ def add_axi_dyn_mem(prog, mem): ("content_en", 1, [("write_together", 1), ("go", 1)]), ("write_en", 1, [("write_together", 2)]), ("write_data", data_width, [("write_together", 2), "data"]), + (f"base_address", 64), (f"ARESETn", 1), (f"ARREADY", 1), (f"RVALID", 1), @@ -546,6 +547,8 @@ def add_axi_dyn_mem(prog, mem): address_translator = axi_dyn_mem.cell(f"address_translator_{name}", prog.get_component(f"address_translator_{name}")) read_controller = axi_dyn_mem.cell(f"read_controller_{name}", prog.get_component(f"read_controller_{name}")) write_controller = axi_dyn_mem.cell(f"write_controller_{name}", prog.get_component(f"write_controller_{name}")) + base_addr_adder = axi_dyn_mem.add(64, f"base_addr_adder_{name}") + write_en_reg = axi_dyn_mem.reg(1, f"write_en_reg_{name}") # Wires this_component = axi_dyn_mem.this() @@ -553,11 +556,18 @@ def add_axi_dyn_mem(prog, mem): with axi_dyn_mem.continuous: address_translator.calyx_mem_addr = this_component["addr0"] axi_dyn_mem.this()["read_data"] = read_controller.read_data + base_addr_adder.left = this_component["base_address"] + base_addr_adder.right = address_translator.axi_address + with axi_dyn_mem.group("latch_write_en") as latch_write_en: + write_en_reg.in_ = this_component["write_en"] + write_en_reg.write_en = 1 + latch_write_en.done = write_en_reg.done + #Control read_controller_invoke = invoke( axi_dyn_mem.get_cell(f"read_controller_{name}"), - in_axi_address=address_translator.axi_address, + in_axi_address=base_addr_adder.out, in_ARESETn=this_component[f"ARESETn"], in_ARREADY=this_component[f"ARREADY"], in_RVALID=this_component[f"RVALID"], @@ -576,7 +586,7 @@ def add_axi_dyn_mem(prog, mem): write_controller_invoke = invoke( axi_dyn_mem.get_cell(f"write_controller_{name}"), - in_axi_address=address_translator.axi_address, + in_axi_address=base_addr_adder.out, in_write_data=this_component["write_data"], in_ARESETn=this_component["ARESETn"], in_AWREADY=this_component["AWREADY"], @@ -595,7 +605,8 @@ def add_axi_dyn_mem(prog, mem): ) axi_dyn_mem.control += [ - if_(axi_dyn_mem.this()["write_en"], write_controller_invoke, read_controller_invoke) + latch_write_en, + if_(write_en_reg.out, write_controller_invoke, read_controller_invoke) ] @@ -648,6 +659,7 @@ def add_wrapper_comp(prog, mems): (f"{prefix}BVALID", 1), (f"{prefix}BRESP", 2), (f"{prefix}ARREADY", 1), + (f"{prefix}RREADY", 1), (f"{prefix}RDATA", 32), (f"{prefix}RRESP", 2), ("ap_start", 1), @@ -782,7 +794,27 @@ def add_wrapper_comp(prog, mems): main_compute_invoke = invoke( main_compute, **ref_mem_kwargs ) - control_subordinate_invoke = invoke(control_subordinate) + control_subordinate_invoke = invoke( + control_subordinate, + # in_ARESETn=wrapper_comp.this()[f"ARESETn"], + in_AWVALID = wrapper_comp.this()[f"s_axi_control_AWVALID"], + in_AWADDR = wrapper_comp.this()[f"s_axi_control_AWADDR"], + in_WVALID = wrapper_comp.this()[f"s_axi_control_WVALID"], + in_WDATA = wrapper_comp.this()[f"s_axi_control_WDATA"], + in_WSTRB = wrapper_comp.this()[f"s_axi_control_WSTRB"], + in_BREADY = wrapper_comp.this()[f"s_axi_control_BREADY"], + in_ARVALID = wrapper_comp.this()[f"s_axi_control_ARVALID"], + in_ARADDR = wrapper_comp.this()[f"s_axi_control_ARADDR"], + in_RVALID = wrapper_comp.this()[f"s_axi_control_RVALID"], + out_AWREADY = wrapper_comp.this()[f"s_axi_control_AWREADY"], + out_WREADY = wrapper_comp.this()[f"s_axi_control_WREADY"], + out_BVALID = wrapper_comp.this()[f"s_axi_control_BVALID"], + out_BRESP = wrapper_comp.this()[f"s_axi_control_BRESP"], + out_ARREADY = wrapper_comp.this()[f"s_axi_control_ARREADY"], + out_RDATA = wrapper_comp.this()[f"s_axi_control_RDATA"], + out_RREADY = wrapper_comp.this()[f"s_axi_control_RREADY"], + out_RRESP = wrapper_comp.this()[f"s_axi_control_RRESP"], + ) From 8d98db231832edb7a0419717e3839bf744303631 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Tue, 9 Jul 2024 07:33:56 -0400 Subject: [PATCH 19/66] fud2 update variable names --- fud2/src/lib.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs index 5bac0cac26..375d83ed4b 100644 --- a/fud2/src/lib.rs +++ b/fud2/src/lib.rs @@ -800,7 +800,7 @@ pub fn build_driver(bld: &mut DriverBuilder) { let generator_path = if FromStr::from_str(&dynamic) .expect("The dynamic flag should be either 'true' or 'false'.") { - "$calyx-base/yxi/axi-calyx/dynamic-axi-generator.py" + "$calyx-base/yxi/axi-calyx/dynamic_axi_generator.py" } else { "$calyx-base/yxi/axi-calyx/axi-generator.py" }; @@ -922,12 +922,12 @@ e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; let waves = FromStr::from_str(&waves) .expect("The 'waves' flag should be either 'true' or 'false'."); - let vcd_file_name = format!("{}.fst", basename(input)); + let fst_file_name = format!("{}.fst", basename(input)); let mut make_in = input; if waves { make_in = "dumpvars.v"; e.build_cmd(&[make_in], "iverilog-fst-sed", &[input], &[])?; - e.arg("fst_file_name", &vcd_file_name)?; + e.arg("fst_file_name", &fst_file_name)?; } e.build_cmd( &["tmp.dat"], From 0e38f1f7b212c01e0b7284acc7026780a0d3a5e4 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 11 Jul 2024 06:04:13 -0400 Subject: [PATCH 20/66] Add init invokes to ar,aw and w channels This works around #2198 causing combinational loops --- yxi/axi-calyx/axi_controller_generator.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 9aa4ec2aad..fdaef843a8 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -107,7 +107,7 @@ def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): block_transfer.done = x_addr.done - s_to_m_address_channel.control += [block_transfer] + s_to_m_address_channel.control += [invoke(x_ready, in_in=0),block_transfer] def add_read_channel(prog): @@ -171,7 +171,8 @@ def add_write_channel(prog): service_write_request.done = wdata.done - write_channel.control += [service_write_request] + + write_channel.control += [invoke(wready, in_in=0), service_write_request] def add_bresp_channel(prog): @@ -536,7 +537,7 @@ def add_control_subordinate(prog, mems): control_subordinate.control += [ init_control_regs, - while_with(n_ap_done, [par(read_controller_invoke, write_controller_invoke), check_ap_done]), + while_with(n_ap_done, [par(write_controller_invoke, read_controller_invoke), check_ap_done]), ] From adfdfa637b6470dcc8b03e84bd76dbb2934da633 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 11 Jul 2024 06:06:08 -0400 Subject: [PATCH 21/66] AddAXI manager to axi_test and writing to the control register --- yxi/axi-calyx/cocotb/axi_test.py | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/yxi/axi-calyx/cocotb/axi_test.py b/yxi/axi-calyx/cocotb/axi_test.py index 58c47b6452..2fc531b09c 100644 --- a/yxi/axi-calyx/cocotb/axi_test.py +++ b/yxi/axi-calyx/cocotb/axi_test.py @@ -1,7 +1,7 @@ import json import cocotb from cocotb.clock import Clock -from cocotbext.axi import AxiBus, AxiRam +from cocotbext.axi import AxiBus, AxiRam, AxiLiteMaster, AxiLiteBus from cocotb.triggers import Timer, FallingEdge, with_timeout, RisingEdge, ClockCycles from typing import Literal, Mapping, Any, Union, List from pathlib import Path @@ -19,9 +19,17 @@ def __init__(self, toplevel, data_path: Path): self.data_path ), "data_path must be a data path to a valid file" + async def setup_control_manager(self): + self.control_manager = AxiLiteMaster( + AxiLiteBus.from_prefix(self.toplevel, "s_axi_control"), + self.toplevel.clk, + reset=self.toplevel.reset, + ) + #Go through each mem, create an AxiRam, write data to it async def setup_rams(self, data: Mapping[str, Any]): - # Create cocotb AxiRams + + # Create cocotb AxiRams for each `ref` memory rams = {} for mem in data.keys(): assert not isinstance(data[mem]["data"][0], list) @@ -69,6 +77,7 @@ async def run_kernel_test(toplevel, data_path: str): f.close() assert data_map is not None await tb.setup_rams(data_map) + await tb.setup_control_manager() #print(data_map) @@ -78,11 +87,14 @@ async def run_kernel_test(toplevel, data_path: str): await Timer(100, "ns") await FallingEdge(toplevel.clk) - # Finish when ap_done is high or 100 us of simulation have passed. timeout = 5000 + #Assert ap_start by writing 1 to 0x0000 + await tb.control_manager.write(0x0000, encode([1],1)) await with_timeout(RisingEdge(toplevel.done), timeout, "us") + + # Get data from ram mems: list[str] = list(data_map.keys()) From 298fe1230bf722638ef4a1528f59d329998583f5 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 14 Jul 2024 04:43:33 -0400 Subject: [PATCH 22/66] WIP do mnaual ref hoisting. Problem with signal names --- yxi/axi-calyx/axi_controller_generator.py | 37 ++++++++++++++++++----- 1 file changed, 29 insertions(+), 8 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index fdaef843a8..26066309a7 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -519,21 +519,42 @@ def add_control_subordinate(prog, mems): xrt_control_reg.write_en = 1 check_ap_done.done = xrt_control_reg.done - sub_controller_kwargs = {} + # Ideally we would use the below to + # pass in the registers as ref cells, but because we want + # to invoke both controllers in parallel, we can't do this. + # To get around this we can manually hook up ports for registers + # ``` + # sub_controller_kwargs = {} + # for reg in control_regs: + # sub_controller_kwargs[f"ref_{reg.name}"] = reg + # # Control + # read_controller_invoke = invoke( + # read_controller, + # **sub_controller_kwargs + # ) + + # write_controller_invoke = invoke( + # write_controller, + # **sub_controller_kwargs + # ) + # ``` + + read_controller_kwargs = {} + write_controller_kwargs = {} for reg in control_regs: - sub_controller_kwargs[f"ref_{reg.name}"] = reg - # Control + read_controller_kwargs[f"in_{reg.name}_out"] = reg.out + write_controller_kwargs[f"out_{reg.name}_in"] = reg.in_ + write_controller_kwargs[f"out_{reg.name}_write_en"] = reg.write_en + n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) + read_controller_invoke = invoke( read_controller, - **sub_controller_kwargs + **read_controller_kwargs, ) - write_controller_invoke = invoke( write_controller, - **sub_controller_kwargs + **write_controller_kwargs, ) - - n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) control_subordinate.control += [ init_control_regs, From 13d1b469d8981aeea2b08ded64107ff772b3f168 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 20 Jul 2024 06:03:27 -0400 Subject: [PATCH 23/66] wip on ref ports only assigning to ports actually used --- calyx-ir/src/structure.rs | 7 + calyx-opt/src/passes/compile_invoke.rs | 195 +++++++++++++++++++++---- 2 files changed, 171 insertions(+), 31 deletions(-) diff --git a/calyx-ir/src/structure.rs b/calyx-ir/src/structure.rs index 42d10eae29..c158a9a08e 100644 --- a/calyx-ir/src/structure.rs +++ b/calyx-ir/src/structure.rs @@ -538,6 +538,13 @@ impl Assignment { } self.guard.for_each(&mut |port| f(&port).map(Guard::port)) } + + /// Reads through assignments unmutably + pub fn iter_ports(&self) -> impl Iterator> { + self.guard.all_ports().into_iter() + .chain(std::iter::once(Rc::clone(&self.dst))) + .chain(std::iter::once(Rc::clone(&self.src))) + } } impl From> for Assignment { diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index 5b1d14f05f..fba70f8aeb 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -7,7 +7,7 @@ use calyx_utils::{CalyxResult, Error}; use ir::{Assignment, RRC, WRC}; use itertools::Itertools; use linked_hash_map::LinkedHashMap; -use std::collections::HashMap; +use std::collections::{HashMap, HashSet}; use std::rc::Rc; use super::dump_ports; @@ -128,7 +128,10 @@ impl Named for CompileInvoke { impl CompileInvoke { /// Given `ref_cells` of an invoke, returns `(inputs, outputs)` where /// inputs are the corresponding inputs to the `invoke` and - /// outputs are the corresponding outputs to the `invoke`. + /// outputs are the corresponding outputs to the `invoke` that are used + /// in the component the ref_cell is. + /// (i.e. If a component only reads from a register, + /// only assignments for `reg.out` will be returned.) /// /// Since this pass eliminates all ref cells in post order, we expect that /// invoked component already had all of its ref cells removed. @@ -137,6 +140,7 @@ impl CompileInvoke { &mut self, inv_cell: RRC, ref_cells: impl Iterator)>, + ref_comps: Vec<&ir::Component>, ) -> Vec> { let inv_comp = inv_cell.borrow().type_name().unwrap(); let mut assigns = Vec::new(); @@ -147,19 +151,106 @@ impl CompileInvoke { concrete_cell.borrow().ports.len() ); - // Mapping from canonical names of the ports of the ref cell to the - // new port defined on the signature of the component. This has name of ref cell, not arg cell + // comp_ports is mapping from canonical names of the ports of the ref cell to the + // new port defined on the signature of the component. + // i.e. ref_reg.in -> ref_reg_in + // These have name of ref cell, not the cell passed in as an arugment let Some(comp_ports) = self.port_names.get(&inv_comp) else { unreachable!("component `{}` invoked but not already visited by the pass", inv_comp) }; + // let comp_port_names: HashSet = comp_ports + // .values() + // .map(|c| ) + // .collect(); + + log::debug!( + "self.port_names: {} \n {}", + self.port_names + .0 + .keys() + .join(", "), + self.port_names + .0 + .values() + .map(|m| m + .keys() + .map(|c| c.port.as_ref()) + .join(", ")) + .join(" :: ") + ); + + log::debug!( + "Comp ports: {} \n -> {}", + comp_ports + .keys() + .join(", "), + comp_ports + .values() + .map(|p| p.borrow().canonical()) + .join(", ") + ); + + log::debug!( + "ref_comps is: {}", + ref_comps + .iter() + .map(|c| c.name) + .collect_vec() + .into_iter() + .join(", ") + ); + + //This is the component of what is being invoked + // i.e in `invoke reader[]()();` this is `reader`. + let invoked_comp = *ref_comps + .iter() + .find(|&c| { + log::debug!( + "c is: {}", + c.name + ); + c.name == inv_comp + }) + .unwrap_or_else(|| { + unreachable!( + "A component `{}` was invoked but not found in the list of components of the program. Should not be possible.\n Instead we found: {}", + inv_comp, + ref_comps.iter().map(|c| c.name).collect_vec().into_iter().join(", ") + ) + }); + + //go through the invoked component and get assignments and their ports + let mut used_ports = HashSet::new(); + invoked_comp.iter_assignments(|a| { + // ref_reg_out for example + log::debug!("invoked_comp `{}` assignments: {} -> {}", invoked_comp.name ,a.src.borrow().canonical(), a.dst.borrow().name); + for port in a.iter_ports() { + //these are the ports of the invoked component + if comp_ports.values().any(|p| p.borrow().name == port.borrow().name){ + used_ports.insert(port.borrow().name); + } + } + }); + + log::debug!("concrete_cell: {}", concrete_cell.borrow().name()); + log::debug!("concrete_cell ports: {}", concrete_cell.borrow().ports().iter().map(|p| p.borrow().get_parent_name()).join(", ")); + log::debug!("used ports: {}", used_ports.iter().join(", ")); + // let ref_cell_ports = concrete_cell + // We expect each canonical port in `comp_ports` to exactly match with a port in //`concrete_cell` based on well-formedness subtype checks. + // `canon` is `ref_reg.in`, for example. for canon in comp_ports.keys() { //only interested in ports attached to the ref cell if canon.cell != ref_cell_name { continue; } + + if !used_ports.contains(&canon.port){ + continue; + } + // The given port of the actual, concrete cell passed in let concrete_port = Self::get_concrete_port(concrete_cell.clone(), &canon.port); @@ -170,6 +261,7 @@ impl CompileInvoke { continue; } + let Some(comp_port) = comp_ports.get(canon) else { unreachable!("port `{}` not found in the signature of {}. Known ports are: {}", canon, @@ -195,33 +287,28 @@ impl CompileInvoke { Rc::clone(&concrete_port) }; + //Create assignments from dst to src + let dst: RRC; + let src: RRC; match concrete_port.borrow().direction { ir::Direction::Output => { - log::debug!( - "constructing: {} = {}", - ref_port.borrow().canonical(), - arg_port.borrow().canonical() - ); - assigns.push(ir::Assignment::new( - ref_port.clone(), - arg_port, - )); + dst = ref_port.clone(); + src = arg_port; } ir::Direction::Input => { - log::debug!( - "constructing: {} = {}", - arg_port.borrow().canonical(), - ref_port.borrow().canonical(), - ); - assigns.push(ir::Assignment::new( - arg_port, - ref_port.clone(), - )); + dst = arg_port; + src = ref_port.clone(); } _ => { unreachable!("Cell should have inout ports"); } }; + log::debug!( + "constructing: {} = {}", + dst.borrow().canonical(), + src.borrow().canonical(), + ); + assigns.push(ir::Assignment::new(dst, src)); } } assigns @@ -272,12 +359,12 @@ impl Visitor for CompileInvoke { for cell in comp.cells.iter() { let mut new_ports: Vec> = Vec::new(); if let Some(name) = cell.borrow().type_name() { - if let Some(vec) = self.port_names.get_ports(&name) { + if let Some(ports) = self.port_names.get_ports(&name) { log::debug!( "Updating ports of cell `{}' (type `{name}')", cell.borrow().name() ); - for p in vec.iter() { + for p in ports.iter() { let new_port = ir::rrc(ir::Port { name: p.borrow().name, width: p.borrow().width, @@ -311,14 +398,48 @@ impl Visitor for CompileInvoke { s: &mut ir::Invoke, comp: &mut ir::Component, ctx: &LibrarySignatures, - _comps: &[ir::Component], + comps: &[ir::Component], ) -> VisResult { let mut builder = ir::Builder::new(comp, ctx); let invoke_group = builder.add_group("invoke"); + + //get iterator of comps of ref_cells used in the invoke + let ref_comps: Vec<&ir::Component> = comps + .iter() + .filter(|&c| { + log::debug!( + "invoke component: {}, c.name: {}", + s.comp.borrow().prototype.get_name().unwrap(), + c.name + ); + s.comp.borrow().prototype.get_name().unwrap() == c.name + }) + .collect(); + + //TODO (nathaniel): delete this and change ref_comps from a vector to just a &ir::Component + assert!( + ref_comps.len() == 1, + "Expected exactly one component to be found, found: {}", + ref_comps.len() + ); + log::debug!( + "comps is: {}", + comps + .iter() + .map(|c| c.name) + .collect_vec() + .into_iter() + .join(", ") + ); + // Assigns representing the ref cell connections invoke_group.borrow_mut().assignments.extend( - self.ref_cells_to_ports(Rc::clone(&s.comp), s.ref_cells.drain(..)), - // ), //the clone here is questionable? but lets things type check? Maybe change ref_cells_to_ports to expect a reference? + self.ref_cells_to_ports( + Rc::clone(&s.comp), + s.ref_cells.drain(..), + ref_comps, + ), + //the clone here is questionable? but lets things type check? Maybe change ref_cells_to_ports to expect a reference? ); // comp.go = 1'd1; @@ -390,14 +511,26 @@ impl Visitor for CompileInvoke { s: &mut ir::StaticInvoke, comp: &mut ir::Component, ctx: &LibrarySignatures, - _comps: &[ir::Component], + comps: &[ir::Component], ) -> VisResult { let mut builder = ir::Builder::new(comp, ctx); let invoke_group = builder.add_static_group("static_invoke", s.latency); - invoke_group.borrow_mut().assignments.extend( - self.ref_cells_to_ports(Rc::clone(&s.comp), s.ref_cells.drain(..)), - ); + //get iterator of comps of ref_cells used in the invoke + let ref_cells = s.ref_cells.clone(); + let ref_comps: Vec<&ir::Component> = comps + .iter() + .filter(|&c| ref_cells.iter().any(|(name, _)| c.name == name)) + .collect(); + + invoke_group + .borrow_mut() + .assignments + .extend(self.ref_cells_to_ports( + Rc::clone(&s.comp), + s.ref_cells.drain(..), + ref_comps, + )); // comp.go = 1'd1; structure!(builder; From b357ea480da67dd8c3ad047e06b2756d3b6348b4 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 05:41:23 -0400 Subject: [PATCH 24/66] WIP compile invoke only needed ports. TODO: add static assignments toowq --- calyx-opt/src/passes/compile_invoke.rs | 169 ++++++++++++------------- 1 file changed, 81 insertions(+), 88 deletions(-) diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index fba70f8aeb..ce7ce12a34 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -140,9 +140,9 @@ impl CompileInvoke { &mut self, inv_cell: RRC, ref_cells: impl Iterator)>, - ref_comps: Vec<&ir::Component>, + invoked_comp: Option<&ir::Component>, //i.e. in invoke reader[]()(); this is `reader` ) -> Vec> { - let inv_comp = inv_cell.borrow().type_name().unwrap(); + let inv_comp_id = inv_cell.borrow().type_name().unwrap(); let mut assigns = Vec::new(); for (ref_cell_name, concrete_cell) in ref_cells { log::debug!( @@ -152,108 +152,100 @@ impl CompileInvoke { ); // comp_ports is mapping from canonical names of the ports of the ref cell to the - // new port defined on the signature of the component. + // new port defined on the signature of the higher level component. // i.e. ref_reg.in -> ref_reg_in // These have name of ref cell, not the cell passed in as an arugment - let Some(comp_ports) = self.port_names.get(&inv_comp) else { - unreachable!("component `{}` invoked but not already visited by the pass", inv_comp) + let Some(comp_ports) = self.port_names.get(&inv_comp_id) else { + unreachable!("component `{}` invoked but not already visited by the pass", inv_comp_id) }; - // let comp_port_names: HashSet = comp_ports - // .values() - // .map(|c| ) - // .collect(); - log::debug!( "self.port_names: {} \n {}", - self.port_names - .0 - .keys() - .join(", "), + self.port_names.0.keys().join(", "), self.port_names .0 .values() - .map(|m| m - .keys() - .map(|c| c.port.as_ref()) - .join(", ")) + .map(|m| m.keys().map(|c| c.port.as_ref()).join(", ")) .join(" :: ") ); log::debug!( "Comp ports: {} \n -> {}", - comp_ports - .keys() - .join(", "), + comp_ports.keys().join(", "), comp_ports .values() .map(|p| p.borrow().canonical()) .join(", ") ); - log::debug!( - "ref_comps is: {}", - ref_comps - .iter() - .map(|c| c.name) - .collect_vec() - .into_iter() - .join(", ") - ); - - //This is the component of what is being invoked - // i.e in `invoke reader[]()();` this is `reader`. - let invoked_comp = *ref_comps - .iter() - .find(|&c| { + //contains the newly add ports that result ffrom ref cells. + let new_comp_ports = comp_ports + .values() + .map(|p| p.borrow().name) + .collect::>(); + + // tracks ports used in assigments of the invoked component + let mut used_ports: HashSet = HashSet::new(); + // If `is_none()` then the invoked comp should be a primitive , and + // we assume that all ports are used + if invoked_comp.is_none() { + used_ports = new_comp_ports.clone(); + } else { + invoked_comp.unwrap().iter_assignments(|a| { + // ref_reg_out for example log::debug!( - "c is: {}", - c.name + "invoked_comp `{}` assignments: {} -> {}", + invoked_comp.unwrap().name, + a.src.borrow().canonical(), + a.dst.borrow().canonical() ); - c.name == inv_comp - }) - .unwrap_or_else(|| { - unreachable!( - "A component `{}` was invoked but not found in the list of components of the program. Should not be possible.\n Instead we found: {}", - inv_comp, - ref_comps.iter().map(|c| c.name).collect_vec().into_iter().join(", ") - ) - }); - - //go through the invoked component and get assignments and their ports - let mut used_ports = HashSet::new(); - invoked_comp.iter_assignments(|a| { - // ref_reg_out for example - log::debug!("invoked_comp `{}` assignments: {} -> {}", invoked_comp.name ,a.src.borrow().canonical(), a.dst.borrow().name); - for port in a.iter_ports() { - //these are the ports of the invoked component - if comp_ports.values().any(|p| p.borrow().name == port.borrow().name){ + for port in a.iter_ports() { used_ports.insert(port.borrow().name); } - } - }); + }); + } + + log::debug!("new_comp_ports: {}", new_comp_ports.iter().join(", ")); + log::debug!("used_ports: {}", used_ports.iter().join(", ")); + + let to_assign: HashSet<&ir::Id> = + new_comp_ports.intersection(&used_ports).collect(); log::debug!("concrete_cell: {}", concrete_cell.borrow().name()); - log::debug!("concrete_cell ports: {}", concrete_cell.borrow().ports().iter().map(|p| p.borrow().get_parent_name()).join(", ")); - log::debug!("used ports: {}", used_ports.iter().join(", ")); + log::debug!( + "concrete_cell ports: {}", + concrete_cell + .borrow() + .ports() + .iter() + .map(|p| p.borrow().get_parent_name()) + .join(", ") + ); // let ref_cell_ports = concrete_cell // We expect each canonical port in `comp_ports` to exactly match with a port in //`concrete_cell` based on well-formedness subtype checks. // `canon` is `ref_reg.in`, for example. - for canon in comp_ports.keys() { + for (ref_cell_canon, new_sig_port) in comp_ports.iter() { //only interested in ports attached to the ref cell - if canon.cell != ref_cell_name { + if ref_cell_canon.cell != ref_cell_name { continue; } - if !used_ports.contains(&canon.port){ + log::debug!( + "used ports: {}. new_sig_port is: {}", + used_ports.iter().join(", "), + new_sig_port.borrow().name + ); + if !to_assign.contains(&new_sig_port.borrow().name) { continue; } // The given port of the actual, concrete cell passed in - let concrete_port = - Self::get_concrete_port(concrete_cell.clone(), &canon.port); + let concrete_port = Self::get_concrete_port( + concrete_cell.clone(), + &ref_cell_canon.port, + ); if concrete_port.borrow().has_attribute(ir::BoolAttr::Clk) || concrete_port.borrow().has_attribute(ir::BoolAttr::Reset) @@ -261,17 +253,20 @@ impl CompileInvoke { continue; } - - let Some(comp_port) = comp_ports.get(canon) else { + let Some(comp_port) = comp_ports.get(ref_cell_canon) else { unreachable!("port `{}` not found in the signature of {}. Known ports are: {}", - canon, - inv_comp, + ref_cell_canon, + inv_comp_id, comp_ports.keys().map(|c| c.port.as_ref()).collect_vec().join(", ") ) }; // Get the port on the new cell with the same name as ref_port let ref_port = inv_cell.borrow().get(comp_port.borrow().name); - log::debug!("Port `{}` -> `{}`", canon, ref_port.borrow().name); + log::debug!( + "Port `{}` -> `{}`", + ref_cell_canon, + ref_port.borrow().name + ); let old_port = concrete_port.borrow().canonical(); // If the port has been removed already, get the new port from the component's signature @@ -404,24 +399,17 @@ impl Visitor for CompileInvoke { let invoke_group = builder.add_group("invoke"); //get iterator of comps of ref_cells used in the invoke - let ref_comps: Vec<&ir::Component> = comps + let invoked_comp: Option<&ir::Component> = comps .iter() - .filter(|&c| { + .find(|&c| { log::debug!( "invoke component: {}, c.name: {}", s.comp.borrow().prototype.get_name().unwrap(), c.name ); s.comp.borrow().prototype.get_name().unwrap() == c.name - }) - .collect(); + }); - //TODO (nathaniel): delete this and change ref_comps from a vector to just a &ir::Component - assert!( - ref_comps.len() == 1, - "Expected exactly one component to be found, found: {}", - ref_comps.len() - ); log::debug!( "comps is: {}", comps @@ -437,7 +425,7 @@ impl Visitor for CompileInvoke { self.ref_cells_to_ports( Rc::clone(&s.comp), s.ref_cells.drain(..), - ref_comps, + invoked_comp, ), //the clone here is questionable? but lets things type check? Maybe change ref_cells_to_ports to expect a reference? ); @@ -516,12 +504,17 @@ impl Visitor for CompileInvoke { let mut builder = ir::Builder::new(comp, ctx); let invoke_group = builder.add_static_group("static_invoke", s.latency); - //get iterator of comps of ref_cells used in the invoke - let ref_cells = s.ref_cells.clone(); - let ref_comps: Vec<&ir::Component> = comps - .iter() - .filter(|&c| ref_cells.iter().any(|(name, _)| c.name == name)) - .collect(); + //If the component is not a primitive, pass along the component to `ref_cells_to_ports`` + let invoked_comp: Option<&ir::Component> = comps + .iter() + .find(|&c| { + log::debug!( + "invoke component: {}, c.name: {}", + s.comp.borrow().prototype.get_name().unwrap(), + c.name + ); + s.comp.borrow().prototype.get_name().unwrap() == c.name + }); invoke_group .borrow_mut() @@ -529,7 +522,7 @@ impl Visitor for CompileInvoke { .extend(self.ref_cells_to_ports( Rc::clone(&s.comp), s.ref_cells.drain(..), - ref_comps, + invoked_comp, )); // comp.go = 1'd1; From 18faa3085e3aa1f26925c46070c5b383d643a7bb Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 08:22:50 -0400 Subject: [PATCH 25/66] WIP: add static assignments to the limited ref assignments in groups --- calyx-opt/src/passes/compile_invoke.rs | 37 ++++++++++++++++---------- 1 file changed, 23 insertions(+), 14 deletions(-) diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index ce7ce12a34..d5c1954f57 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -136,7 +136,7 @@ impl CompileInvoke { /// Since this pass eliminates all ref cells in post order, we expect that /// invoked component already had all of its ref cells removed. - fn ref_cells_to_ports( + fn ref_cells_to_ports_assignments( &mut self, inv_cell: RRC, ref_cells: impl Iterator)>, @@ -145,6 +145,7 @@ impl CompileInvoke { let inv_comp_id = inv_cell.borrow().type_name().unwrap(); let mut assigns = Vec::new(); for (ref_cell_name, concrete_cell) in ref_cells { + log::debug!( "Removing ref cell `{}` with {} ports", ref_cell_name, @@ -165,7 +166,7 @@ impl CompileInvoke { self.port_names .0 .values() - .map(|m| m.keys().map(|c| c.port.as_ref()).join(", ")) + .map(|m| m.keys().join(", ")) .join(" :: ") ); @@ -178,7 +179,7 @@ impl CompileInvoke { .join(", ") ); - //contains the newly add ports that result ffrom ref cells. + //contains the newly added ports that result from ref cells removal/dump_ports let new_comp_ports = comp_ports .values() .map(|p| p.borrow().name) @@ -203,6 +204,11 @@ impl CompileInvoke { used_ports.insert(port.borrow().name); } }); + invoked_comp.unwrap().iter_static_assignments(|a| { + for port in a.iter_ports() { + used_ports.insert(port.borrow().name); + } + }); } log::debug!("new_comp_ports: {}", new_comp_ports.iter().join(", ")); @@ -237,6 +243,8 @@ impl CompileInvoke { used_ports.iter().join(", "), new_sig_port.borrow().name ); + + // For example, if we have a reader component that only reads frmo a ref_reg, we will not have `ref_reg.in = ...`` in the invoke* group. if !to_assign.contains(&new_sig_port.borrow().name) { continue; } @@ -405,7 +413,7 @@ impl Visitor for CompileInvoke { log::debug!( "invoke component: {}, c.name: {}", s.comp.borrow().prototype.get_name().unwrap(), - c.name + comps.iter().map(|c| c.name).join(", ") ); s.comp.borrow().prototype.get_name().unwrap() == c.name }); @@ -422,14 +430,14 @@ impl Visitor for CompileInvoke { // Assigns representing the ref cell connections invoke_group.borrow_mut().assignments.extend( - self.ref_cells_to_ports( + self.ref_cells_to_ports_assignments( Rc::clone(&s.comp), s.ref_cells.drain(..), invoked_comp, ), //the clone here is questionable? but lets things type check? Maybe change ref_cells_to_ports to expect a reference? ); - + // comp.go = 1'd1; // invoke[done] = comp.done; structure!(builder; @@ -438,7 +446,7 @@ impl Visitor for CompileInvoke { let cell = s.comp.borrow(); let go_port = get_go_port(Rc::clone(&s.comp))?; let done_port = cell.find_unique_with_attr(ir::NumAttr::Done)?.unwrap(); - + // Build assignemnts let go_assign = builder.build_assignment( go_port, @@ -450,12 +458,13 @@ impl Visitor for CompileInvoke { done_port, ir::Guard::True, ); - + invoke_group - .borrow_mut() - .assignments - .extend(vec![go_assign, done_assign]); - + .borrow_mut() + .assignments + .extend(vec![go_assign, done_assign]); + + log::debug!("invoke_group: `{}` has added assignments: {}", invoke_group.borrow().name(), invoke_group.borrow().assignments.iter().map(|a| format!("{} -> {}", a.src.borrow().canonical(), a.dst.borrow().canonical())).join(", ")); // Generate argument assignments let cell = &*s.comp.borrow(); let assigns = build_assignments( @@ -464,8 +473,8 @@ impl Visitor for CompileInvoke { &mut builder, cell, ); + log::debug!("assigns is: {}", assigns.clone().iter().map(|a| format!("{} -> {}", a.src.borrow().canonical(), a.dst.borrow().canonical())).join(", ")); invoke_group.borrow_mut().assignments.extend(assigns); - // Add assignments from the attached combinational group if let Some(cgr) = &s.comb_group { let cg = &*cgr.borrow(); @@ -519,7 +528,7 @@ impl Visitor for CompileInvoke { invoke_group .borrow_mut() .assignments - .extend(self.ref_cells_to_ports( + .extend(self.ref_cells_to_ports_assignments( Rc::clone(&s.comp), s.ref_cells.drain(..), invoked_comp, From f76267f169cf2c1b297f70e4caa0acb515197786 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 08:23:40 -0400 Subject: [PATCH 26/66] Update compile-invoke tests --- tests/passes/compile-invoke/invoke-ref.expect | 1 - tests/passes/compile-invoke/ref-invoke.expect | 2 -- tests/passes/compile-invoke/ref.expect | 1 - tests/passes/compile-invoke/static-ref.expect | 2 -- 4 files changed, 6 deletions(-) diff --git a/tests/passes/compile-invoke/invoke-ref.expect b/tests/passes/compile-invoke/invoke-ref.expect index dadf225558..f106d9f156 100644 --- a/tests/passes/compile-invoke/invoke-ref.expect +++ b/tests/passes/compile-invoke/invoke-ref.expect @@ -22,7 +22,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { group invoke0 { r0.in = f.r_in; r0.write_en = f.r_write_en; - f.r_out = r0.out; f.r_done = r0.done; f.go = 1'd1; invoke0[done] = f.done; diff --git a/tests/passes/compile-invoke/ref-invoke.expect b/tests/passes/compile-invoke/ref-invoke.expect index fed3a9b242..089a528ca5 100644 --- a/tests/passes/compile-invoke/ref-invoke.expect +++ b/tests/passes/compile-invoke/ref-invoke.expect @@ -24,7 +24,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { group invoke0 { k1.in = f.m_in; k1.write_en = f.m_write_en; - f.m_out = k1.out; f.m_done = k1.done; f.go = 1'd1; invoke0[done] = f.done; @@ -32,7 +31,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { group invoke1 { k2.in = f.m_in; k2.write_en = f.m_write_en; - f.m_out = k2.out; f.m_done = k2.done; f.go = 1'd1; invoke1[done] = f.done; diff --git a/tests/passes/compile-invoke/ref.expect b/tests/passes/compile-invoke/ref.expect index 20274fc711..d739ac3c98 100644 --- a/tests/passes/compile-invoke/ref.expect +++ b/tests/passes/compile-invoke/ref.expect @@ -26,7 +26,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { group invoke0 { r0.in = f.r_in; r0.write_en = f.r_write_en; - f.r_out = r0.out; f.r_done = r0.done; f.go = 1'd1; invoke0[done] = f.done; diff --git a/tests/passes/compile-invoke/static-ref.expect b/tests/passes/compile-invoke/static-ref.expect index 3961008028..f3bbf1223c 100644 --- a/tests/passes/compile-invoke/static-ref.expect +++ b/tests/passes/compile-invoke/static-ref.expect @@ -51,8 +51,6 @@ component main(@go go: 1, @clk clk: 1, @reset reset: 1) -> (@done done: 1) { mem.addr0 = adder.out_addr0; mem.write_data = adder.out_write_data; mem.write_en = adder.out_write_en; - adder.out_read_data = mem.read_data; - adder.out_done = mem.done; adder.go = %0 ? 1'd1; } } From 570ed4359d06e27cd7cf00776f4cc47c7f61fbdf Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 08:34:39 -0400 Subject: [PATCH 27/66] clippy and formatting --- calyx-opt/src/passes/compile_invoke.rs | 86 ++++++++++++++++---------- 1 file changed, 52 insertions(+), 34 deletions(-) diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index d5c1954f57..513ecace67 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -145,7 +145,6 @@ impl CompileInvoke { let inv_comp_id = inv_cell.borrow().type_name().unwrap(); let mut assigns = Vec::new(); for (ref_cell_name, concrete_cell) in ref_cells { - log::debug!( "Removing ref cell `{}` with {} ports", ref_cell_name, @@ -189,14 +188,12 @@ impl CompileInvoke { let mut used_ports: HashSet = HashSet::new(); // If `is_none()` then the invoked comp should be a primitive , and // we assume that all ports are used - if invoked_comp.is_none() { - used_ports = new_comp_ports.clone(); - } else { - invoked_comp.unwrap().iter_assignments(|a| { + if let Some(invoked_comp) = invoked_comp { + invoked_comp.iter_assignments(|a| { // ref_reg_out for example log::debug!( "invoked_comp `{}` assignments: {} -> {}", - invoked_comp.unwrap().name, + invoked_comp.name, a.src.borrow().canonical(), a.dst.borrow().canonical() ); @@ -204,11 +201,13 @@ impl CompileInvoke { used_ports.insert(port.borrow().name); } }); - invoked_comp.unwrap().iter_static_assignments(|a| { + invoked_comp.iter_static_assignments(|a| { for port in a.iter_ports() { used_ports.insert(port.borrow().name); } }); + } else { + used_ports.clone_from(&new_comp_ports); } log::debug!("new_comp_ports: {}", new_comp_ports.iter().join(", ")); @@ -407,16 +406,14 @@ impl Visitor for CompileInvoke { let invoke_group = builder.add_group("invoke"); //get iterator of comps of ref_cells used in the invoke - let invoked_comp: Option<&ir::Component> = comps - .iter() - .find(|&c| { - log::debug!( - "invoke component: {}, c.name: {}", - s.comp.borrow().prototype.get_name().unwrap(), - comps.iter().map(|c| c.name).join(", ") - ); - s.comp.borrow().prototype.get_name().unwrap() == c.name - }); + let invoked_comp: Option<&ir::Component> = comps.iter().find(|&c| { + log::debug!( + "invoke component: {}, c.name: {}", + s.comp.borrow().prototype.get_name().unwrap(), + comps.iter().map(|c| c.name).join(", ") + ); + s.comp.borrow().prototype.get_name().unwrap() == c.name + }); log::debug!( "comps is: {}", @@ -437,7 +434,7 @@ impl Visitor for CompileInvoke { ), //the clone here is questionable? but lets things type check? Maybe change ref_cells_to_ports to expect a reference? ); - + // comp.go = 1'd1; // invoke[done] = comp.done; structure!(builder; @@ -446,7 +443,7 @@ impl Visitor for CompileInvoke { let cell = s.comp.borrow(); let go_port = get_go_port(Rc::clone(&s.comp))?; let done_port = cell.find_unique_with_attr(ir::NumAttr::Done)?.unwrap(); - + // Build assignemnts let go_assign = builder.build_assignment( go_port, @@ -458,13 +455,26 @@ impl Visitor for CompileInvoke { done_port, ir::Guard::True, ); - + invoke_group - .borrow_mut() - .assignments - .extend(vec![go_assign, done_assign]); - - log::debug!("invoke_group: `{}` has added assignments: {}", invoke_group.borrow().name(), invoke_group.borrow().assignments.iter().map(|a| format!("{} -> {}", a.src.borrow().canonical(), a.dst.borrow().canonical())).join(", ")); + .borrow_mut() + .assignments + .extend(vec![go_assign, done_assign]); + + log::debug!( + "invoke_group: `{}` has added assignments: {}", + invoke_group.borrow().name(), + invoke_group + .borrow() + .assignments + .iter() + .map(|a| format!( + "{} -> {}", + a.src.borrow().canonical(), + a.dst.borrow().canonical() + )) + .join(", ") + ); // Generate argument assignments let cell = &*s.comp.borrow(); let assigns = build_assignments( @@ -473,7 +483,18 @@ impl Visitor for CompileInvoke { &mut builder, cell, ); - log::debug!("assigns is: {}", assigns.clone().iter().map(|a| format!("{} -> {}", a.src.borrow().canonical(), a.dst.borrow().canonical())).join(", ")); + log::debug!( + "assigns is: {}", + assigns + .clone() + .iter() + .map(|a| format!( + "{} -> {}", + a.src.borrow().canonical(), + a.dst.borrow().canonical() + )) + .join(", ") + ); invoke_group.borrow_mut().assignments.extend(assigns); // Add assignments from the attached combinational group if let Some(cgr) = &s.comb_group { @@ -514,9 +535,7 @@ impl Visitor for CompileInvoke { let invoke_group = builder.add_static_group("static_invoke", s.latency); //If the component is not a primitive, pass along the component to `ref_cells_to_ports`` - let invoked_comp: Option<&ir::Component> = comps - .iter() - .find(|&c| { + let invoked_comp: Option<&ir::Component> = comps.iter().find(|&c| { log::debug!( "invoke component: {}, c.name: {}", s.comp.borrow().prototype.get_name().unwrap(), @@ -525,14 +544,13 @@ impl Visitor for CompileInvoke { s.comp.borrow().prototype.get_name().unwrap() == c.name }); - invoke_group - .borrow_mut() - .assignments - .extend(self.ref_cells_to_ports_assignments( + invoke_group.borrow_mut().assignments.extend( + self.ref_cells_to_ports_assignments( Rc::clone(&s.comp), s.ref_cells.drain(..), invoked_comp, - )); + ), + ); // comp.go = 1'd1; structure!(builder; From bf55adffa11c092ab42583348b7fa87baa9ac6e1 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 08:46:57 -0400 Subject: [PATCH 28/66] more formatting --- calyx-ir/src/structure.rs | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/calyx-ir/src/structure.rs b/calyx-ir/src/structure.rs index c158a9a08e..8e320aaa68 100644 --- a/calyx-ir/src/structure.rs +++ b/calyx-ir/src/structure.rs @@ -539,12 +539,14 @@ impl Assignment { self.guard.for_each(&mut |port| f(&port).map(Guard::port)) } - /// Reads through assignments unmutably - pub fn iter_ports(&self) -> impl Iterator> { - self.guard.all_ports().into_iter() + /// Reads through assignments unmutably + pub fn iter_ports(&self) -> impl Iterator> { + self.guard + .all_ports() + .into_iter() .chain(std::iter::once(Rc::clone(&self.dst))) .chain(std::iter::once(Rc::clone(&self.src))) - } + } } impl From> for Assignment { From 795ff213e0c60e5e7d31591649703f750f37fbf5 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 09:11:19 -0400 Subject: [PATCH 29/66] update axi runt tests --- .../dyn-mem-vec-add-axi-wrapped.expect | 44 +- .../axi/dynamic/dyn-mem-vec-add-verilog.v | 44 +- .../seq-mem-vec-add-axi-wrapped.expect | 2202 ++++--- .../seq-mem-vec-add-verilog.v | 5339 ++++++++--------- 4 files changed, 3664 insertions(+), 3965 deletions(-) diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect index 8f8db5b9c1..ce3cbaa9b2 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect @@ -9899,8 +9899,8 @@ wire _guard4 = invoke0_go_out; wire _guard5 = invoke0_go_out; wire _guard6 = invoke0_go_out; wire _guard7 = invoke0_go_out; -wire _guard8 = invoke0_go_out; -wire _guard9 = invoke0_done_out; +wire _guard8 = invoke0_done_out; +wire _guard9 = invoke0_go_out; wire _guard10 = invoke0_go_out; wire _guard11 = invoke0_go_out; wire _guard12 = invoke0_go_out; @@ -9909,9 +9909,6 @@ wire _guard14 = invoke0_go_out; wire _guard15 = invoke0_go_out; wire _guard16 = invoke0_go_out; wire _guard17 = invoke0_go_out; -wire _guard18 = invoke0_go_out; -wire _guard19 = invoke0_go_out; -wire _guard20 = invoke0_go_out; assign axi_dyn_mem_A0_WREADY = A0_WREADY; assign axi_dyn_mem_A0_RVALID = A0_RVALID; assign axi_dyn_mem_A0_RLAST = A0_RLAST; @@ -9929,9 +9926,6 @@ assign axi_dyn_mem_A0_content_en = assign axi_dyn_mem_A0_AWREADY = A0_AWREADY; assign axi_dyn_mem_A0_reset = reset; assign axi_dyn_mem_A0_RRESP = A0_RRESP; -assign axi_dyn_mem_A0_write_data = - _guard4 ? main_compute_A0_write_data : - 32'd0; assign axi_dyn_mem_A0_ARREADY = A0_ARREADY; assign axi_dyn_mem_A0_BVALID = A0_BVALID; assign axi_dyn_mem_A0_ARESETn = A0_ARESETn; @@ -9939,26 +9933,26 @@ assign axi_dyn_mem_Sum0_WREADY = Sum0_WREADY; assign axi_dyn_mem_Sum0_RVALID = Sum0_RVALID; assign axi_dyn_mem_Sum0_RLAST = Sum0_RLAST; assign axi_dyn_mem_Sum0_write_en = - _guard5 ? main_compute_Sum0_write_en : + _guard4 ? main_compute_Sum0_write_en : 1'd0; assign axi_dyn_mem_Sum0_RDATA = Sum0_RDATA; assign axi_dyn_mem_Sum0_clk = clk; assign axi_dyn_mem_Sum0_addr0 = - _guard6 ? main_compute_Sum0_addr0 : + _guard5 ? main_compute_Sum0_addr0 : 3'd0; assign axi_dyn_mem_Sum0_content_en = - _guard7 ? main_compute_Sum0_content_en : + _guard6 ? main_compute_Sum0_content_en : 1'd0; assign axi_dyn_mem_Sum0_AWREADY = Sum0_AWREADY; assign axi_dyn_mem_Sum0_reset = reset; assign axi_dyn_mem_Sum0_RRESP = Sum0_RRESP; assign axi_dyn_mem_Sum0_write_data = - _guard8 ? main_compute_Sum0_write_data : + _guard7 ? main_compute_Sum0_write_data : 32'd0; assign axi_dyn_mem_Sum0_ARREADY = Sum0_ARREADY; assign axi_dyn_mem_Sum0_BVALID = Sum0_BVALID; assign axi_dyn_mem_Sum0_ARESETn = Sum0_ARESETn; -assign done = _guard9; +assign done = _guard8; assign B0_WLAST = axi_dyn_mem_B0_WLAST; assign Sum0_ARVALID = axi_dyn_mem_Sum0_ARVALID; assign Sum0_ARBURST = axi_dyn_mem_Sum0_ARBURST; @@ -10020,48 +10014,42 @@ assign Sum0_WID = 1'd0; assign A0_ARLEN = axi_dyn_mem_A0_ARLEN; assign A0_AWID = 1'd0; assign main_compute_A0_read_data = - _guard10 ? axi_dyn_mem_A0_read_data : + _guard9 ? axi_dyn_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard11 ? axi_dyn_mem_B0_read_data : + _guard10 ? axi_dyn_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard12 ? axi_dyn_mem_Sum0_done : + _guard11 ? axi_dyn_mem_Sum0_done : 1'd0; assign main_compute_clk = clk; assign main_compute_B0_done = - _guard13 ? axi_dyn_mem_B0_done : + _guard12 ? axi_dyn_mem_B0_done : 1'd0; -assign main_compute_go = _guard14; +assign main_compute_go = _guard13; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard15 ? axi_dyn_mem_A0_done : + _guard14 ? axi_dyn_mem_A0_done : 1'd0; -assign main_compute_Sum0_read_data = - _guard16 ? axi_dyn_mem_Sum0_read_data : - 32'd0; assign invoke0_go_in = go; assign invoke0_done_in = main_compute_done; assign axi_dyn_mem_B0_WREADY = B0_WREADY; assign axi_dyn_mem_B0_RVALID = B0_RVALID; assign axi_dyn_mem_B0_RLAST = B0_RLAST; assign axi_dyn_mem_B0_write_en = - _guard17 ? main_compute_B0_write_en : + _guard15 ? main_compute_B0_write_en : 1'd0; assign axi_dyn_mem_B0_RDATA = B0_RDATA; assign axi_dyn_mem_B0_clk = clk; assign axi_dyn_mem_B0_addr0 = - _guard18 ? main_compute_B0_addr0 : + _guard16 ? main_compute_B0_addr0 : 3'd0; assign axi_dyn_mem_B0_content_en = - _guard19 ? main_compute_B0_content_en : + _guard17 ? main_compute_B0_content_en : 1'd0; assign axi_dyn_mem_B0_AWREADY = B0_AWREADY; assign axi_dyn_mem_B0_reset = reset; assign axi_dyn_mem_B0_RRESP = B0_RRESP; -assign axi_dyn_mem_B0_write_data = - _guard20 ? main_compute_B0_write_data : - 32'd0; assign axi_dyn_mem_B0_ARREADY = B0_ARREADY; assign axi_dyn_mem_B0_BVALID = B0_BVALID; assign axi_dyn_mem_B0_ARESETn = B0_ARESETn; diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v b/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v index 8f8db5b9c1..ce3cbaa9b2 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v @@ -9899,8 +9899,8 @@ wire _guard4 = invoke0_go_out; wire _guard5 = invoke0_go_out; wire _guard6 = invoke0_go_out; wire _guard7 = invoke0_go_out; -wire _guard8 = invoke0_go_out; -wire _guard9 = invoke0_done_out; +wire _guard8 = invoke0_done_out; +wire _guard9 = invoke0_go_out; wire _guard10 = invoke0_go_out; wire _guard11 = invoke0_go_out; wire _guard12 = invoke0_go_out; @@ -9909,9 +9909,6 @@ wire _guard14 = invoke0_go_out; wire _guard15 = invoke0_go_out; wire _guard16 = invoke0_go_out; wire _guard17 = invoke0_go_out; -wire _guard18 = invoke0_go_out; -wire _guard19 = invoke0_go_out; -wire _guard20 = invoke0_go_out; assign axi_dyn_mem_A0_WREADY = A0_WREADY; assign axi_dyn_mem_A0_RVALID = A0_RVALID; assign axi_dyn_mem_A0_RLAST = A0_RLAST; @@ -9929,9 +9926,6 @@ assign axi_dyn_mem_A0_content_en = assign axi_dyn_mem_A0_AWREADY = A0_AWREADY; assign axi_dyn_mem_A0_reset = reset; assign axi_dyn_mem_A0_RRESP = A0_RRESP; -assign axi_dyn_mem_A0_write_data = - _guard4 ? main_compute_A0_write_data : - 32'd0; assign axi_dyn_mem_A0_ARREADY = A0_ARREADY; assign axi_dyn_mem_A0_BVALID = A0_BVALID; assign axi_dyn_mem_A0_ARESETn = A0_ARESETn; @@ -9939,26 +9933,26 @@ assign axi_dyn_mem_Sum0_WREADY = Sum0_WREADY; assign axi_dyn_mem_Sum0_RVALID = Sum0_RVALID; assign axi_dyn_mem_Sum0_RLAST = Sum0_RLAST; assign axi_dyn_mem_Sum0_write_en = - _guard5 ? main_compute_Sum0_write_en : + _guard4 ? main_compute_Sum0_write_en : 1'd0; assign axi_dyn_mem_Sum0_RDATA = Sum0_RDATA; assign axi_dyn_mem_Sum0_clk = clk; assign axi_dyn_mem_Sum0_addr0 = - _guard6 ? main_compute_Sum0_addr0 : + _guard5 ? main_compute_Sum0_addr0 : 3'd0; assign axi_dyn_mem_Sum0_content_en = - _guard7 ? main_compute_Sum0_content_en : + _guard6 ? main_compute_Sum0_content_en : 1'd0; assign axi_dyn_mem_Sum0_AWREADY = Sum0_AWREADY; assign axi_dyn_mem_Sum0_reset = reset; assign axi_dyn_mem_Sum0_RRESP = Sum0_RRESP; assign axi_dyn_mem_Sum0_write_data = - _guard8 ? main_compute_Sum0_write_data : + _guard7 ? main_compute_Sum0_write_data : 32'd0; assign axi_dyn_mem_Sum0_ARREADY = Sum0_ARREADY; assign axi_dyn_mem_Sum0_BVALID = Sum0_BVALID; assign axi_dyn_mem_Sum0_ARESETn = Sum0_ARESETn; -assign done = _guard9; +assign done = _guard8; assign B0_WLAST = axi_dyn_mem_B0_WLAST; assign Sum0_ARVALID = axi_dyn_mem_Sum0_ARVALID; assign Sum0_ARBURST = axi_dyn_mem_Sum0_ARBURST; @@ -10020,48 +10014,42 @@ assign Sum0_WID = 1'd0; assign A0_ARLEN = axi_dyn_mem_A0_ARLEN; assign A0_AWID = 1'd0; assign main_compute_A0_read_data = - _guard10 ? axi_dyn_mem_A0_read_data : + _guard9 ? axi_dyn_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard11 ? axi_dyn_mem_B0_read_data : + _guard10 ? axi_dyn_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard12 ? axi_dyn_mem_Sum0_done : + _guard11 ? axi_dyn_mem_Sum0_done : 1'd0; assign main_compute_clk = clk; assign main_compute_B0_done = - _guard13 ? axi_dyn_mem_B0_done : + _guard12 ? axi_dyn_mem_B0_done : 1'd0; -assign main_compute_go = _guard14; +assign main_compute_go = _guard13; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard15 ? axi_dyn_mem_A0_done : + _guard14 ? axi_dyn_mem_A0_done : 1'd0; -assign main_compute_Sum0_read_data = - _guard16 ? axi_dyn_mem_Sum0_read_data : - 32'd0; assign invoke0_go_in = go; assign invoke0_done_in = main_compute_done; assign axi_dyn_mem_B0_WREADY = B0_WREADY; assign axi_dyn_mem_B0_RVALID = B0_RVALID; assign axi_dyn_mem_B0_RLAST = B0_RLAST; assign axi_dyn_mem_B0_write_en = - _guard17 ? main_compute_B0_write_en : + _guard15 ? main_compute_B0_write_en : 1'd0; assign axi_dyn_mem_B0_RDATA = B0_RDATA; assign axi_dyn_mem_B0_clk = clk; assign axi_dyn_mem_B0_addr0 = - _guard18 ? main_compute_B0_addr0 : + _guard16 ? main_compute_B0_addr0 : 3'd0; assign axi_dyn_mem_B0_content_en = - _guard19 ? main_compute_B0_content_en : + _guard17 ? main_compute_B0_content_en : 1'd0; assign axi_dyn_mem_B0_AWREADY = B0_AWREADY; assign axi_dyn_mem_B0_reset = reset; assign axi_dyn_mem_B0_RRESP = B0_RRESP; -assign axi_dyn_mem_B0_write_data = - _guard20 ? main_compute_B0_write_data : - 32'd0; assign axi_dyn_mem_B0_ARREADY = B0_ARREADY; assign axi_dyn_mem_B0_BVALID = B0_BVALID; assign axi_dyn_mem_B0_ARESETn = B0_ARESETn; diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect index 996bbc1c46..8baa0b908c 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect @@ -6465,152 +6465,152 @@ wire _guard21 = invoke11_go_out; wire _guard22 = invoke11_go_out; wire _guard23 = invoke11_go_out; wire _guard24 = invoke11_go_out; -wire _guard25 = invoke11_go_out; -wire _guard26 = tdcc5_done_out; -wire _guard27 = invoke20_go_out; +wire _guard25 = tdcc5_done_out; +wire _guard26 = invoke20_go_out; +wire _guard27 = invoke10_go_out; wire _guard28 = invoke10_go_out; -wire _guard29 = invoke10_go_out; +wire _guard29 = invoke22_go_out; wire _guard30 = invoke22_go_out; -wire _guard31 = invoke22_go_out; -wire _guard32 = invoke6_go_out; -wire _guard33 = invoke16_go_out; -wire _guard34 = invoke19_go_out; -wire _guard35 = invoke23_go_out; -wire _guard36 = invoke18_go_out; -wire _guard37 = invoke19_go_out; -wire _guard38 = invoke11_go_out; -wire _guard39 = invoke8_go_out; -wire _guard40 = invoke19_go_out; -wire _guard41 = invoke20_go_out; -wire _guard42 = invoke22_go_out; -wire _guard43 = invoke16_go_out; -wire _guard44 = invoke8_go_out; -wire _guard45 = invoke17_go_out; -wire _guard46 = invoke8_go_out; -wire _guard47 = invoke19_go_out; -wire _guard48 = invoke22_go_out; -wire _guard49 = invoke6_go_out; -wire _guard50 = invoke16_go_out; -wire _guard51 = invoke23_go_out; -wire _guard52 = invoke24_go_out; -wire _guard53 = invoke17_go_out; -wire _guard54 = invoke6_go_out; -wire _guard55 = invoke17_go_out; -wire _guard56 = invoke10_go_out; -wire _guard57 = invoke22_go_out; -wire _guard58 = invoke23_go_out; -wire _guard59 = invoke7_go_out; -wire _guard60 = invoke9_go_out; -wire _guard61 = invoke20_go_out; -wire _guard62 = invoke21_go_out; -wire _guard63 = invoke16_go_out; -wire _guard64 = invoke8_go_out; -wire _guard65 = invoke16_go_out; -wire _guard66 = invoke8_go_out; +wire _guard31 = invoke6_go_out; +wire _guard32 = invoke16_go_out; +wire _guard33 = invoke19_go_out; +wire _guard34 = invoke23_go_out; +wire _guard35 = invoke18_go_out; +wire _guard36 = invoke19_go_out; +wire _guard37 = invoke11_go_out; +wire _guard38 = invoke8_go_out; +wire _guard39 = invoke19_go_out; +wire _guard40 = invoke20_go_out; +wire _guard41 = invoke22_go_out; +wire _guard42 = invoke16_go_out; +wire _guard43 = invoke8_go_out; +wire _guard44 = invoke17_go_out; +wire _guard45 = invoke8_go_out; +wire _guard46 = invoke19_go_out; +wire _guard47 = invoke22_go_out; +wire _guard48 = invoke6_go_out; +wire _guard49 = invoke16_go_out; +wire _guard50 = invoke23_go_out; +wire _guard51 = invoke24_go_out; +wire _guard52 = invoke17_go_out; +wire _guard53 = invoke6_go_out; +wire _guard54 = invoke17_go_out; +wire _guard55 = invoke10_go_out; +wire _guard56 = invoke22_go_out; +wire _guard57 = invoke23_go_out; +wire _guard58 = invoke7_go_out; +wire _guard59 = invoke9_go_out; +wire _guard60 = invoke20_go_out; +wire _guard61 = invoke21_go_out; +wire _guard62 = invoke16_go_out; +wire _guard63 = invoke8_go_out; +wire _guard64 = invoke16_go_out; +wire _guard65 = invoke8_go_out; +wire _guard66 = invoke10_go_out; wire _guard67 = invoke10_go_out; -wire _guard68 = invoke10_go_out; -wire _guard69 = invoke22_go_out; -wire _guard70 = invoke6_go_out; -wire _guard71 = invoke16_go_out; +wire _guard68 = invoke22_go_out; +wire _guard69 = invoke6_go_out; +wire _guard70 = invoke16_go_out; +wire _guard71 = invoke19_go_out; wire _guard72 = invoke19_go_out; -wire _guard73 = invoke19_go_out; -wire _guard74 = invoke6_go_out; -wire _guard75 = early_reset_static_par_go_out; -wire _guard76 = early_reset_static_par0_go_out; -wire _guard77 = _guard75 | _guard76; -wire _guard78 = fsm_out == 1'd0; -wire _guard79 = ~_guard78; -wire _guard80 = early_reset_static_par_go_out; -wire _guard81 = _guard79 & _guard80; -wire _guard82 = fsm_out == 1'd0; -wire _guard83 = early_reset_static_par_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = fsm_out == 1'd0; -wire _guard86 = early_reset_static_par0_go_out; -wire _guard87 = _guard85 & _guard86; -wire _guard88 = _guard84 | _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = ~_guard89; -wire _guard91 = early_reset_static_par0_go_out; -wire _guard92 = _guard90 & _guard91; +wire _guard73 = invoke6_go_out; +wire _guard74 = early_reset_static_par_go_out; +wire _guard75 = early_reset_static_par0_go_out; +wire _guard76 = _guard74 | _guard75; +wire _guard77 = fsm_out == 1'd0; +wire _guard78 = ~_guard77; +wire _guard79 = early_reset_static_par_go_out; +wire _guard80 = _guard78 & _guard79; +wire _guard81 = fsm_out == 1'd0; +wire _guard82 = early_reset_static_par_go_out; +wire _guard83 = _guard81 & _guard82; +wire _guard84 = fsm_out == 1'd0; +wire _guard85 = early_reset_static_par0_go_out; +wire _guard86 = _guard84 & _guard85; +wire _guard87 = _guard83 | _guard86; +wire _guard88 = fsm_out == 1'd0; +wire _guard89 = ~_guard88; +wire _guard90 = early_reset_static_par0_go_out; +wire _guard91 = _guard89 & _guard90; +wire _guard92 = early_reset_static_par_go_out; wire _guard93 = early_reset_static_par_go_out; -wire _guard94 = early_reset_static_par_go_out; -wire _guard95 = fsm6_out == 3'd5; -wire _guard96 = fsm6_out == 3'd0; -wire _guard97 = wrapper_early_reset_static_par_done_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = tdcc5_go_out; -wire _guard100 = _guard98 & _guard99; -wire _guard101 = _guard95 | _guard100; -wire _guard102 = fsm6_out == 3'd1; -wire _guard103 = par0_done_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = tdcc5_go_out; -wire _guard106 = _guard104 & _guard105; -wire _guard107 = _guard101 | _guard106; -wire _guard108 = fsm6_out == 3'd2; -wire _guard109 = invoke12_done_out; -wire _guard110 = _guard108 & _guard109; -wire _guard111 = tdcc5_go_out; -wire _guard112 = _guard110 & _guard111; -wire _guard113 = _guard107 | _guard112; -wire _guard114 = fsm6_out == 3'd3; -wire _guard115 = wrapper_early_reset_static_par0_done_out; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = tdcc5_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard113 | _guard118; -wire _guard120 = fsm6_out == 3'd4; -wire _guard121 = par1_done_out; -wire _guard122 = _guard120 & _guard121; -wire _guard123 = tdcc5_go_out; -wire _guard124 = _guard122 & _guard123; -wire _guard125 = _guard119 | _guard124; -wire _guard126 = fsm6_out == 3'd4; -wire _guard127 = par1_done_out; -wire _guard128 = _guard126 & _guard127; -wire _guard129 = tdcc5_go_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = fsm6_out == 3'd1; -wire _guard132 = par0_done_out; -wire _guard133 = _guard131 & _guard132; -wire _guard134 = tdcc5_go_out; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = fsm6_out == 3'd3; -wire _guard137 = wrapper_early_reset_static_par0_done_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = tdcc5_go_out; -wire _guard140 = _guard138 & _guard139; -wire _guard141 = fsm6_out == 3'd0; -wire _guard142 = wrapper_early_reset_static_par_done_out; -wire _guard143 = _guard141 & _guard142; -wire _guard144 = tdcc5_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = fsm6_out == 3'd5; -wire _guard147 = fsm6_out == 3'd2; -wire _guard148 = invoke12_done_out; -wire _guard149 = _guard147 & _guard148; -wire _guard150 = tdcc5_go_out; -wire _guard151 = _guard149 & _guard150; -wire _guard152 = wrapper_early_reset_static_par0_go_out; -wire _guard153 = invoke18_done_out; -wire _guard154 = ~_guard153; -wire _guard155 = fsm3_out == 2'd2; -wire _guard156 = _guard154 & _guard155; -wire _guard157 = tdcc2_go_out; -wire _guard158 = _guard156 & _guard157; -wire _guard159 = pd2_out; -wire _guard160 = tdcc2_done_out; -wire _guard161 = _guard159 | _guard160; -wire _guard162 = ~_guard161; -wire _guard163 = par1_go_out; -wire _guard164 = _guard162 & _guard163; -wire _guard165 = invoke9_go_out; -wire _guard166 = early_reset_static_par_go_out; -wire _guard167 = invoke20_go_out; -wire _guard168 = invoke9_go_out; -wire _guard169 = invoke20_go_out; -wire _guard170 = early_reset_static_par_go_out; +wire _guard94 = fsm6_out == 3'd5; +wire _guard95 = fsm6_out == 3'd0; +wire _guard96 = wrapper_early_reset_static_par_done_out; +wire _guard97 = _guard95 & _guard96; +wire _guard98 = tdcc5_go_out; +wire _guard99 = _guard97 & _guard98; +wire _guard100 = _guard94 | _guard99; +wire _guard101 = fsm6_out == 3'd1; +wire _guard102 = par0_done_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = tdcc5_go_out; +wire _guard105 = _guard103 & _guard104; +wire _guard106 = _guard100 | _guard105; +wire _guard107 = fsm6_out == 3'd2; +wire _guard108 = invoke12_done_out; +wire _guard109 = _guard107 & _guard108; +wire _guard110 = tdcc5_go_out; +wire _guard111 = _guard109 & _guard110; +wire _guard112 = _guard106 | _guard111; +wire _guard113 = fsm6_out == 3'd3; +wire _guard114 = wrapper_early_reset_static_par0_done_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = tdcc5_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = _guard112 | _guard117; +wire _guard119 = fsm6_out == 3'd4; +wire _guard120 = par1_done_out; +wire _guard121 = _guard119 & _guard120; +wire _guard122 = tdcc5_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = _guard118 | _guard123; +wire _guard125 = fsm6_out == 3'd4; +wire _guard126 = par1_done_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = tdcc5_go_out; +wire _guard129 = _guard127 & _guard128; +wire _guard130 = fsm6_out == 3'd1; +wire _guard131 = par0_done_out; +wire _guard132 = _guard130 & _guard131; +wire _guard133 = tdcc5_go_out; +wire _guard134 = _guard132 & _guard133; +wire _guard135 = fsm6_out == 3'd3; +wire _guard136 = wrapper_early_reset_static_par0_done_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = tdcc5_go_out; +wire _guard139 = _guard137 & _guard138; +wire _guard140 = fsm6_out == 3'd0; +wire _guard141 = wrapper_early_reset_static_par_done_out; +wire _guard142 = _guard140 & _guard141; +wire _guard143 = tdcc5_go_out; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = fsm6_out == 3'd5; +wire _guard146 = fsm6_out == 3'd2; +wire _guard147 = invoke12_done_out; +wire _guard148 = _guard146 & _guard147; +wire _guard149 = tdcc5_go_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = wrapper_early_reset_static_par0_go_out; +wire _guard152 = invoke18_done_out; +wire _guard153 = ~_guard152; +wire _guard154 = fsm3_out == 2'd2; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = tdcc2_go_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = pd2_out; +wire _guard159 = tdcc2_done_out; +wire _guard160 = _guard158 | _guard159; +wire _guard161 = ~_guard160; +wire _guard162 = par1_go_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = invoke9_go_out; +wire _guard165 = early_reset_static_par_go_out; +wire _guard166 = invoke20_go_out; +wire _guard167 = invoke9_go_out; +wire _guard168 = invoke20_go_out; +wire _guard169 = early_reset_static_par_go_out; +wire _guard170 = invoke9_go_out; wire _guard171 = invoke9_go_out; wire _guard172 = invoke9_go_out; wire _guard173 = invoke9_go_out; @@ -6622,672 +6622,627 @@ wire _guard178 = invoke9_go_out; wire _guard179 = invoke9_go_out; wire _guard180 = invoke9_go_out; wire _guard181 = invoke9_go_out; -wire _guard182 = invoke9_go_out; -wire _guard183 = invoke9_go_out; -wire _guard184 = invoke12_go_out; -wire _guard185 = invoke20_go_out; -wire _guard186 = invoke9_go_out; -wire _guard187 = invoke12_go_out; -wire _guard188 = invoke20_go_out; -wire _guard189 = invoke9_go_out; -wire _guard190 = invoke12_go_out; -wire _guard191 = invoke20_go_out; -wire _guard192 = invoke9_go_out; -wire _guard193 = invoke12_go_out; -wire _guard194 = invoke20_go_out; -wire _guard195 = invoke24_go_out; -wire _guard196 = invoke24_go_out; -wire _guard197 = fsm3_out == 2'd3; -wire _guard198 = fsm3_out == 2'd0; -wire _guard199 = invoke16_done_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = tdcc2_go_out; +wire _guard182 = invoke12_go_out; +wire _guard183 = invoke20_go_out; +wire _guard184 = invoke9_go_out; +wire _guard185 = invoke12_go_out; +wire _guard186 = invoke20_go_out; +wire _guard187 = invoke9_go_out; +wire _guard188 = invoke12_go_out; +wire _guard189 = invoke20_go_out; +wire _guard190 = invoke9_go_out; +wire _guard191 = invoke24_go_out; +wire _guard192 = invoke24_go_out; +wire _guard193 = fsm3_out == 2'd3; +wire _guard194 = fsm3_out == 2'd0; +wire _guard195 = invoke16_done_out; +wire _guard196 = _guard194 & _guard195; +wire _guard197 = tdcc2_go_out; +wire _guard198 = _guard196 & _guard197; +wire _guard199 = _guard193 | _guard198; +wire _guard200 = fsm3_out == 2'd1; +wire _guard201 = invoke17_done_out; wire _guard202 = _guard200 & _guard201; -wire _guard203 = _guard197 | _guard202; -wire _guard204 = fsm3_out == 2'd1; -wire _guard205 = invoke17_done_out; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = tdcc2_go_out; +wire _guard203 = tdcc2_go_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = _guard199 | _guard204; +wire _guard206 = fsm3_out == 2'd2; +wire _guard207 = invoke18_done_out; wire _guard208 = _guard206 & _guard207; -wire _guard209 = _guard203 | _guard208; -wire _guard210 = fsm3_out == 2'd2; -wire _guard211 = invoke18_done_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = tdcc2_go_out; +wire _guard209 = tdcc2_go_out; +wire _guard210 = _guard208 & _guard209; +wire _guard211 = _guard205 | _guard210; +wire _guard212 = fsm3_out == 2'd0; +wire _guard213 = invoke16_done_out; wire _guard214 = _guard212 & _guard213; -wire _guard215 = _guard209 | _guard214; -wire _guard216 = fsm3_out == 2'd0; -wire _guard217 = invoke16_done_out; -wire _guard218 = _guard216 & _guard217; -wire _guard219 = tdcc2_go_out; +wire _guard215 = tdcc2_go_out; +wire _guard216 = _guard214 & _guard215; +wire _guard217 = fsm3_out == 2'd3; +wire _guard218 = fsm3_out == 2'd2; +wire _guard219 = invoke18_done_out; wire _guard220 = _guard218 & _guard219; -wire _guard221 = fsm3_out == 2'd3; -wire _guard222 = fsm3_out == 2'd2; -wire _guard223 = invoke18_done_out; -wire _guard224 = _guard222 & _guard223; -wire _guard225 = tdcc2_go_out; -wire _guard226 = _guard224 & _guard225; -wire _guard227 = fsm3_out == 2'd1; -wire _guard228 = invoke17_done_out; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = tdcc2_go_out; +wire _guard221 = tdcc2_go_out; +wire _guard222 = _guard220 & _guard221; +wire _guard223 = fsm3_out == 2'd1; +wire _guard224 = invoke17_done_out; +wire _guard225 = _guard223 & _guard224; +wire _guard226 = tdcc2_go_out; +wire _guard227 = _guard225 & _guard226; +wire _guard228 = fsm5_out == 2'd3; +wire _guard229 = fsm5_out == 2'd0; +wire _guard230 = invoke22_done_out; wire _guard231 = _guard229 & _guard230; -wire _guard232 = fsm5_out == 2'd3; -wire _guard233 = fsm5_out == 2'd0; -wire _guard234 = invoke22_done_out; -wire _guard235 = _guard233 & _guard234; -wire _guard236 = tdcc4_go_out; +wire _guard232 = tdcc4_go_out; +wire _guard233 = _guard231 & _guard232; +wire _guard234 = _guard228 | _guard233; +wire _guard235 = fsm5_out == 2'd1; +wire _guard236 = invoke23_done_out; wire _guard237 = _guard235 & _guard236; -wire _guard238 = _guard232 | _guard237; -wire _guard239 = fsm5_out == 2'd1; -wire _guard240 = invoke23_done_out; -wire _guard241 = _guard239 & _guard240; -wire _guard242 = tdcc4_go_out; +wire _guard238 = tdcc4_go_out; +wire _guard239 = _guard237 & _guard238; +wire _guard240 = _guard234 | _guard239; +wire _guard241 = fsm5_out == 2'd2; +wire _guard242 = invoke24_done_out; wire _guard243 = _guard241 & _guard242; -wire _guard244 = _guard238 | _guard243; -wire _guard245 = fsm5_out == 2'd2; -wire _guard246 = invoke24_done_out; -wire _guard247 = _guard245 & _guard246; -wire _guard248 = tdcc4_go_out; +wire _guard244 = tdcc4_go_out; +wire _guard245 = _guard243 & _guard244; +wire _guard246 = _guard240 | _guard245; +wire _guard247 = fsm5_out == 2'd0; +wire _guard248 = invoke22_done_out; wire _guard249 = _guard247 & _guard248; -wire _guard250 = _guard244 | _guard249; -wire _guard251 = fsm5_out == 2'd0; -wire _guard252 = invoke22_done_out; -wire _guard253 = _guard251 & _guard252; -wire _guard254 = tdcc4_go_out; +wire _guard250 = tdcc4_go_out; +wire _guard251 = _guard249 & _guard250; +wire _guard252 = fsm5_out == 2'd3; +wire _guard253 = fsm5_out == 2'd2; +wire _guard254 = invoke24_done_out; wire _guard255 = _guard253 & _guard254; -wire _guard256 = fsm5_out == 2'd3; -wire _guard257 = fsm5_out == 2'd2; -wire _guard258 = invoke24_done_out; -wire _guard259 = _guard257 & _guard258; -wire _guard260 = tdcc4_go_out; -wire _guard261 = _guard259 & _guard260; -wire _guard262 = fsm5_out == 2'd1; -wire _guard263 = invoke23_done_out; -wire _guard264 = _guard262 & _guard263; -wire _guard265 = tdcc4_go_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = fsm1_out == 2'd2; -wire _guard268 = invoke9_go_out; -wire _guard269 = early_reset_static_par_go_out; -wire _guard270 = early_reset_static_par0_go_out; -wire _guard271 = _guard269 | _guard270; -wire _guard272 = invoke20_go_out; -wire _guard273 = invoke19_go_out; -wire _guard274 = invoke8_go_out; -wire _guard275 = invoke9_go_out; -wire _guard276 = invoke20_go_out; -wire _guard277 = invoke19_go_out; -wire _guard278 = early_reset_static_par_go_out; -wire _guard279 = early_reset_static_par0_go_out; -wire _guard280 = _guard278 | _guard279; -wire _guard281 = invoke8_go_out; -wire _guard282 = invoke22_go_out; -wire _guard283 = invoke23_go_out; -wire _guard284 = invoke22_go_out; -wire _guard285 = invoke23_go_out; -wire _guard286 = invoke12_go_out; -wire _guard287 = invoke12_go_out; -wire _guard288 = invoke12_go_out; -wire _guard289 = invoke12_go_out; -wire _guard290 = invoke12_go_out; -wire _guard291 = invoke12_go_out; -wire _guard292 = invoke12_go_out; -wire _guard293 = fsm1_out == 2'd2; -wire _guard294 = fsm1_out == 2'd0; -wire _guard295 = invoke8_done_out; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = tdcc0_go_out; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = _guard293 | _guard298; -wire _guard300 = fsm1_out == 2'd1; -wire _guard301 = invoke9_done_out; -wire _guard302 = _guard300 & _guard301; -wire _guard303 = tdcc0_go_out; -wire _guard304 = _guard302 & _guard303; -wire _guard305 = _guard299 | _guard304; -wire _guard306 = fsm1_out == 2'd0; -wire _guard307 = invoke8_done_out; -wire _guard308 = _guard306 & _guard307; -wire _guard309 = tdcc0_go_out; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = fsm1_out == 2'd2; -wire _guard312 = fsm1_out == 2'd1; -wire _guard313 = invoke9_done_out; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = tdcc0_go_out; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = fsm4_out == 2'd3; -wire _guard318 = fsm4_out == 2'd0; -wire _guard319 = invoke19_done_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = tdcc3_go_out; -wire _guard322 = _guard320 & _guard321; -wire _guard323 = _guard317 | _guard322; -wire _guard324 = fsm4_out == 2'd1; -wire _guard325 = invoke20_done_out; -wire _guard326 = _guard324 & _guard325; -wire _guard327 = tdcc3_go_out; -wire _guard328 = _guard326 & _guard327; -wire _guard329 = _guard323 | _guard328; -wire _guard330 = fsm4_out == 2'd2; -wire _guard331 = invoke21_done_out; -wire _guard332 = _guard330 & _guard331; -wire _guard333 = tdcc3_go_out; -wire _guard334 = _guard332 & _guard333; -wire _guard335 = _guard329 | _guard334; -wire _guard336 = fsm4_out == 2'd0; -wire _guard337 = invoke19_done_out; +wire _guard256 = tdcc4_go_out; +wire _guard257 = _guard255 & _guard256; +wire _guard258 = fsm5_out == 2'd1; +wire _guard259 = invoke23_done_out; +wire _guard260 = _guard258 & _guard259; +wire _guard261 = tdcc4_go_out; +wire _guard262 = _guard260 & _guard261; +wire _guard263 = fsm1_out == 2'd2; +wire _guard264 = invoke9_go_out; +wire _guard265 = early_reset_static_par_go_out; +wire _guard266 = early_reset_static_par0_go_out; +wire _guard267 = _guard265 | _guard266; +wire _guard268 = invoke20_go_out; +wire _guard269 = invoke9_go_out; +wire _guard270 = invoke20_go_out; +wire _guard271 = early_reset_static_par_go_out; +wire _guard272 = early_reset_static_par0_go_out; +wire _guard273 = _guard271 | _guard272; +wire _guard274 = invoke22_go_out; +wire _guard275 = invoke22_go_out; +wire _guard276 = invoke12_go_out; +wire _guard277 = invoke12_go_out; +wire _guard278 = invoke12_go_out; +wire _guard279 = invoke12_go_out; +wire _guard280 = invoke12_go_out; +wire _guard281 = invoke12_go_out; +wire _guard282 = fsm1_out == 2'd2; +wire _guard283 = fsm1_out == 2'd0; +wire _guard284 = invoke8_done_out; +wire _guard285 = _guard283 & _guard284; +wire _guard286 = tdcc0_go_out; +wire _guard287 = _guard285 & _guard286; +wire _guard288 = _guard282 | _guard287; +wire _guard289 = fsm1_out == 2'd1; +wire _guard290 = invoke9_done_out; +wire _guard291 = _guard289 & _guard290; +wire _guard292 = tdcc0_go_out; +wire _guard293 = _guard291 & _guard292; +wire _guard294 = _guard288 | _guard293; +wire _guard295 = fsm1_out == 2'd0; +wire _guard296 = invoke8_done_out; +wire _guard297 = _guard295 & _guard296; +wire _guard298 = tdcc0_go_out; +wire _guard299 = _guard297 & _guard298; +wire _guard300 = fsm1_out == 2'd2; +wire _guard301 = fsm1_out == 2'd1; +wire _guard302 = invoke9_done_out; +wire _guard303 = _guard301 & _guard302; +wire _guard304 = tdcc0_go_out; +wire _guard305 = _guard303 & _guard304; +wire _guard306 = fsm4_out == 2'd3; +wire _guard307 = fsm4_out == 2'd0; +wire _guard308 = invoke19_done_out; +wire _guard309 = _guard307 & _guard308; +wire _guard310 = tdcc3_go_out; +wire _guard311 = _guard309 & _guard310; +wire _guard312 = _guard306 | _guard311; +wire _guard313 = fsm4_out == 2'd1; +wire _guard314 = invoke20_done_out; +wire _guard315 = _guard313 & _guard314; +wire _guard316 = tdcc3_go_out; +wire _guard317 = _guard315 & _guard316; +wire _guard318 = _guard312 | _guard317; +wire _guard319 = fsm4_out == 2'd2; +wire _guard320 = invoke21_done_out; +wire _guard321 = _guard319 & _guard320; +wire _guard322 = tdcc3_go_out; +wire _guard323 = _guard321 & _guard322; +wire _guard324 = _guard318 | _guard323; +wire _guard325 = fsm4_out == 2'd0; +wire _guard326 = invoke19_done_out; +wire _guard327 = _guard325 & _guard326; +wire _guard328 = tdcc3_go_out; +wire _guard329 = _guard327 & _guard328; +wire _guard330 = fsm4_out == 2'd3; +wire _guard331 = fsm4_out == 2'd2; +wire _guard332 = invoke21_done_out; +wire _guard333 = _guard331 & _guard332; +wire _guard334 = tdcc3_go_out; +wire _guard335 = _guard333 & _guard334; +wire _guard336 = fsm4_out == 2'd1; +wire _guard337 = invoke20_done_out; wire _guard338 = _guard336 & _guard337; wire _guard339 = tdcc3_go_out; wire _guard340 = _guard338 & _guard339; -wire _guard341 = fsm4_out == 2'd3; -wire _guard342 = fsm4_out == 2'd2; -wire _guard343 = invoke21_done_out; +wire _guard341 = wrapper_early_reset_static_par_done_out; +wire _guard342 = ~_guard341; +wire _guard343 = fsm6_out == 3'd0; wire _guard344 = _guard342 & _guard343; -wire _guard345 = tdcc3_go_out; +wire _guard345 = tdcc5_go_out; wire _guard346 = _guard344 & _guard345; -wire _guard347 = fsm4_out == 2'd1; -wire _guard348 = invoke20_done_out; -wire _guard349 = _guard347 & _guard348; -wire _guard350 = tdcc3_go_out; -wire _guard351 = _guard349 & _guard350; -wire _guard352 = wrapper_early_reset_static_par_done_out; -wire _guard353 = ~_guard352; -wire _guard354 = fsm6_out == 3'd0; -wire _guard355 = _guard353 & _guard354; -wire _guard356 = tdcc5_go_out; -wire _guard357 = _guard355 & _guard356; -wire _guard358 = invoke11_done_out; -wire _guard359 = ~_guard358; -wire _guard360 = fsm2_out == 2'd1; -wire _guard361 = _guard359 & _guard360; -wire _guard362 = tdcc1_go_out; -wire _guard363 = _guard361 & _guard362; -wire _guard364 = invoke23_done_out; -wire _guard365 = ~_guard364; -wire _guard366 = fsm5_out == 2'd1; -wire _guard367 = _guard365 & _guard366; -wire _guard368 = tdcc4_go_out; -wire _guard369 = _guard367 & _guard368; -wire _guard370 = par1_done_out; -wire _guard371 = ~_guard370; -wire _guard372 = fsm6_out == 3'd4; -wire _guard373 = _guard371 & _guard372; -wire _guard374 = tdcc5_go_out; -wire _guard375 = _guard373 & _guard374; -wire _guard376 = early_reset_static_par_go_out; -wire _guard377 = early_reset_static_par0_go_out; -wire _guard378 = _guard376 | _guard377; +wire _guard347 = invoke11_done_out; +wire _guard348 = ~_guard347; +wire _guard349 = fsm2_out == 2'd1; +wire _guard350 = _guard348 & _guard349; +wire _guard351 = tdcc1_go_out; +wire _guard352 = _guard350 & _guard351; +wire _guard353 = invoke23_done_out; +wire _guard354 = ~_guard353; +wire _guard355 = fsm5_out == 2'd1; +wire _guard356 = _guard354 & _guard355; +wire _guard357 = tdcc4_go_out; +wire _guard358 = _guard356 & _guard357; +wire _guard359 = par1_done_out; +wire _guard360 = ~_guard359; +wire _guard361 = fsm6_out == 3'd4; +wire _guard362 = _guard360 & _guard361; +wire _guard363 = tdcc5_go_out; +wire _guard364 = _guard362 & _guard363; +wire _guard365 = early_reset_static_par_go_out; +wire _guard366 = early_reset_static_par0_go_out; +wire _guard367 = _guard365 | _guard366; +wire _guard368 = invoke7_go_out; +wire _guard369 = invoke17_go_out; +wire _guard370 = invoke7_go_out; +wire _guard371 = early_reset_static_par_go_out; +wire _guard372 = early_reset_static_par0_go_out; +wire _guard373 = _guard371 | _guard372; +wire _guard374 = invoke17_go_out; +wire _guard375 = invoke7_go_out; +wire _guard376 = invoke7_go_out; +wire _guard377 = invoke7_go_out; +wire _guard378 = invoke7_go_out; wire _guard379 = invoke7_go_out; -wire _guard380 = invoke6_go_out; -wire _guard381 = invoke16_go_out; -wire _guard382 = invoke17_go_out; +wire _guard380 = invoke7_go_out; +wire _guard381 = invoke7_go_out; +wire _guard382 = invoke7_go_out; wire _guard383 = invoke7_go_out; -wire _guard384 = invoke6_go_out; -wire _guard385 = invoke16_go_out; -wire _guard386 = early_reset_static_par_go_out; -wire _guard387 = early_reset_static_par0_go_out; -wire _guard388 = _guard386 | _guard387; -wire _guard389 = invoke17_go_out; +wire _guard384 = invoke7_go_out; +wire _guard385 = invoke7_go_out; +wire _guard386 = invoke12_go_out; +wire _guard387 = invoke7_go_out; +wire _guard388 = invoke17_go_out; +wire _guard389 = invoke12_go_out; wire _guard390 = invoke7_go_out; -wire _guard391 = invoke7_go_out; -wire _guard392 = invoke7_go_out; +wire _guard391 = invoke17_go_out; +wire _guard392 = invoke12_go_out; wire _guard393 = invoke7_go_out; -wire _guard394 = invoke7_go_out; +wire _guard394 = invoke17_go_out; wire _guard395 = invoke7_go_out; -wire _guard396 = invoke7_go_out; -wire _guard397 = invoke7_go_out; -wire _guard398 = invoke7_go_out; -wire _guard399 = invoke7_go_out; -wire _guard400 = invoke7_go_out; -wire _guard401 = invoke7_go_out; -wire _guard402 = invoke12_go_out; -wire _guard403 = invoke7_go_out; -wire _guard404 = invoke17_go_out; -wire _guard405 = invoke12_go_out; -wire _guard406 = invoke7_go_out; -wire _guard407 = invoke17_go_out; -wire _guard408 = invoke12_go_out; -wire _guard409 = invoke7_go_out; -wire _guard410 = invoke17_go_out; -wire _guard411 = invoke12_go_out; -wire _guard412 = invoke7_go_out; -wire _guard413 = invoke17_go_out; -wire _guard414 = invoke20_go_out; -wire _guard415 = invoke20_go_out; -wire _guard416 = invoke20_go_out; -wire _guard417 = invoke20_go_out; -wire _guard418 = invoke20_go_out; -wire _guard419 = invoke20_go_out; -wire _guard420 = invoke20_go_out; -wire _guard421 = invoke20_go_out; -wire _guard422 = invoke20_go_out; -wire _guard423 = invoke20_go_out; -wire _guard424 = invoke20_go_out; -wire _guard425 = invoke11_go_out; -wire _guard426 = early_reset_static_par_go_out; -wire _guard427 = early_reset_static_par0_go_out; -wire _guard428 = _guard426 | _guard427; -wire _guard429 = invoke10_go_out; -wire _guard430 = invoke22_go_out; -wire _guard431 = invoke23_go_out; -wire _guard432 = invoke11_go_out; -wire _guard433 = invoke10_go_out; -wire _guard434 = early_reset_static_par_go_out; -wire _guard435 = early_reset_static_par0_go_out; -wire _guard436 = _guard434 | _guard435; -wire _guard437 = invoke22_go_out; -wire _guard438 = invoke23_go_out; -wire _guard439 = invoke10_go_out; -wire _guard440 = invoke10_go_out; -wire _guard441 = invoke10_go_out; -wire _guard442 = invoke10_go_out; -wire _guard443 = invoke10_go_out; -wire _guard444 = pd_out; -wire _guard445 = pd0_out; -wire _guard446 = _guard444 & _guard445; -wire _guard447 = pd1_out; +wire _guard396 = invoke20_go_out; +wire _guard397 = invoke20_go_out; +wire _guard398 = invoke20_go_out; +wire _guard399 = invoke20_go_out; +wire _guard400 = invoke20_go_out; +wire _guard401 = invoke20_go_out; +wire _guard402 = invoke20_go_out; +wire _guard403 = invoke20_go_out; +wire _guard404 = invoke20_go_out; +wire _guard405 = invoke11_go_out; +wire _guard406 = early_reset_static_par_go_out; +wire _guard407 = early_reset_static_par0_go_out; +wire _guard408 = _guard406 | _guard407; +wire _guard409 = invoke23_go_out; +wire _guard410 = invoke11_go_out; +wire _guard411 = early_reset_static_par_go_out; +wire _guard412 = early_reset_static_par0_go_out; +wire _guard413 = _guard411 | _guard412; +wire _guard414 = invoke23_go_out; +wire _guard415 = invoke10_go_out; +wire _guard416 = invoke10_go_out; +wire _guard417 = invoke10_go_out; +wire _guard418 = invoke10_go_out; +wire _guard419 = pd_out; +wire _guard420 = pd0_out; +wire _guard421 = _guard419 & _guard420; +wire _guard422 = pd1_out; +wire _guard423 = _guard421 & _guard422; +wire _guard424 = tdcc1_done_out; +wire _guard425 = par0_go_out; +wire _guard426 = _guard424 & _guard425; +wire _guard427 = _guard423 | _guard426; +wire _guard428 = tdcc1_done_out; +wire _guard429 = par0_go_out; +wire _guard430 = _guard428 & _guard429; +wire _guard431 = pd_out; +wire _guard432 = pd0_out; +wire _guard433 = _guard431 & _guard432; +wire _guard434 = pd1_out; +wire _guard435 = _guard433 & _guard434; +wire _guard436 = fsm_out == 1'd0; +wire _guard437 = signal_reg_out; +wire _guard438 = _guard436 & _guard437; +wire _guard439 = pd_out; +wire _guard440 = tdcc_done_out; +wire _guard441 = _guard439 | _guard440; +wire _guard442 = ~_guard441; +wire _guard443 = par0_go_out; +wire _guard444 = _guard442 & _guard443; +wire _guard445 = invoke12_done_out; +wire _guard446 = ~_guard445; +wire _guard447 = fsm6_out == 3'd2; wire _guard448 = _guard446 & _guard447; -wire _guard449 = tdcc1_done_out; -wire _guard450 = par0_go_out; -wire _guard451 = _guard449 & _guard450; -wire _guard452 = _guard448 | _guard451; -wire _guard453 = tdcc1_done_out; -wire _guard454 = par0_go_out; -wire _guard455 = _guard453 & _guard454; -wire _guard456 = pd_out; -wire _guard457 = pd0_out; -wire _guard458 = _guard456 & _guard457; -wire _guard459 = pd1_out; -wire _guard460 = _guard458 & _guard459; -wire _guard461 = fsm_out == 1'd0; -wire _guard462 = signal_reg_out; -wire _guard463 = _guard461 & _guard462; -wire _guard464 = pd_out; -wire _guard465 = tdcc_done_out; -wire _guard466 = _guard464 | _guard465; -wire _guard467 = ~_guard466; -wire _guard468 = par0_go_out; -wire _guard469 = _guard467 & _guard468; -wire _guard470 = invoke12_done_out; -wire _guard471 = ~_guard470; -wire _guard472 = fsm6_out == 3'd2; +wire _guard449 = tdcc5_go_out; +wire _guard450 = _guard448 & _guard449; +wire _guard451 = pd3_out; +wire _guard452 = tdcc3_done_out; +wire _guard453 = _guard451 | _guard452; +wire _guard454 = ~_guard453; +wire _guard455 = par1_go_out; +wire _guard456 = _guard454 & _guard455; +wire _guard457 = fsm4_out == 2'd3; +wire _guard458 = invoke19_go_out; +wire _guard459 = invoke19_go_out; +wire _guard460 = invoke19_go_out; +wire _guard461 = invoke19_go_out; +wire _guard462 = fsm0_out == 2'd2; +wire _guard463 = fsm0_out == 2'd0; +wire _guard464 = invoke6_done_out; +wire _guard465 = _guard463 & _guard464; +wire _guard466 = tdcc_go_out; +wire _guard467 = _guard465 & _guard466; +wire _guard468 = _guard462 | _guard467; +wire _guard469 = fsm0_out == 2'd1; +wire _guard470 = invoke7_done_out; +wire _guard471 = _guard469 & _guard470; +wire _guard472 = tdcc_go_out; wire _guard473 = _guard471 & _guard472; -wire _guard474 = tdcc5_go_out; -wire _guard475 = _guard473 & _guard474; -wire _guard476 = pd3_out; -wire _guard477 = tdcc3_done_out; -wire _guard478 = _guard476 | _guard477; -wire _guard479 = ~_guard478; -wire _guard480 = par1_go_out; -wire _guard481 = _guard479 & _guard480; -wire _guard482 = fsm4_out == 2'd3; -wire _guard483 = invoke19_go_out; -wire _guard484 = invoke19_go_out; -wire _guard485 = invoke19_go_out; -wire _guard486 = invoke19_go_out; -wire _guard487 = invoke19_go_out; -wire _guard488 = invoke19_go_out; -wire _guard489 = invoke19_go_out; -wire _guard490 = fsm0_out == 2'd2; -wire _guard491 = fsm0_out == 2'd0; -wire _guard492 = invoke6_done_out; -wire _guard493 = _guard491 & _guard492; -wire _guard494 = tdcc_go_out; +wire _guard474 = _guard468 | _guard473; +wire _guard475 = fsm0_out == 2'd0; +wire _guard476 = invoke6_done_out; +wire _guard477 = _guard475 & _guard476; +wire _guard478 = tdcc_go_out; +wire _guard479 = _guard477 & _guard478; +wire _guard480 = fsm0_out == 2'd2; +wire _guard481 = fsm0_out == 2'd1; +wire _guard482 = invoke7_done_out; +wire _guard483 = _guard481 & _guard482; +wire _guard484 = tdcc_go_out; +wire _guard485 = _guard483 & _guard484; +wire _guard486 = fsm2_out == 2'd2; +wire _guard487 = fsm2_out == 2'd0; +wire _guard488 = invoke10_done_out; +wire _guard489 = _guard487 & _guard488; +wire _guard490 = tdcc1_go_out; +wire _guard491 = _guard489 & _guard490; +wire _guard492 = _guard486 | _guard491; +wire _guard493 = fsm2_out == 2'd1; +wire _guard494 = invoke11_done_out; wire _guard495 = _guard493 & _guard494; -wire _guard496 = _guard490 | _guard495; -wire _guard497 = fsm0_out == 2'd1; -wire _guard498 = invoke7_done_out; -wire _guard499 = _guard497 & _guard498; -wire _guard500 = tdcc_go_out; +wire _guard496 = tdcc1_go_out; +wire _guard497 = _guard495 & _guard496; +wire _guard498 = _guard492 | _guard497; +wire _guard499 = fsm2_out == 2'd0; +wire _guard500 = invoke10_done_out; wire _guard501 = _guard499 & _guard500; -wire _guard502 = _guard496 | _guard501; -wire _guard503 = fsm0_out == 2'd0; -wire _guard504 = invoke6_done_out; -wire _guard505 = _guard503 & _guard504; -wire _guard506 = tdcc_go_out; +wire _guard502 = tdcc1_go_out; +wire _guard503 = _guard501 & _guard502; +wire _guard504 = fsm2_out == 2'd2; +wire _guard505 = fsm2_out == 2'd1; +wire _guard506 = invoke11_done_out; wire _guard507 = _guard505 & _guard506; -wire _guard508 = fsm0_out == 2'd2; -wire _guard509 = fsm0_out == 2'd1; -wire _guard510 = invoke7_done_out; -wire _guard511 = _guard509 & _guard510; -wire _guard512 = tdcc_go_out; +wire _guard508 = tdcc1_go_out; +wire _guard509 = _guard507 & _guard508; +wire _guard510 = invoke8_done_out; +wire _guard511 = ~_guard510; +wire _guard512 = fsm1_out == 2'd0; wire _guard513 = _guard511 & _guard512; -wire _guard514 = fsm2_out == 2'd2; -wire _guard515 = fsm2_out == 2'd0; -wire _guard516 = invoke10_done_out; -wire _guard517 = _guard515 & _guard516; -wire _guard518 = tdcc1_go_out; -wire _guard519 = _guard517 & _guard518; -wire _guard520 = _guard514 | _guard519; -wire _guard521 = fsm2_out == 2'd1; -wire _guard522 = invoke11_done_out; -wire _guard523 = _guard521 & _guard522; -wire _guard524 = tdcc1_go_out; -wire _guard525 = _guard523 & _guard524; -wire _guard526 = _guard520 | _guard525; -wire _guard527 = fsm2_out == 2'd0; -wire _guard528 = invoke10_done_out; -wire _guard529 = _guard527 & _guard528; -wire _guard530 = tdcc1_go_out; -wire _guard531 = _guard529 & _guard530; -wire _guard532 = fsm2_out == 2'd2; -wire _guard533 = fsm2_out == 2'd1; -wire _guard534 = invoke11_done_out; -wire _guard535 = _guard533 & _guard534; -wire _guard536 = tdcc1_go_out; -wire _guard537 = _guard535 & _guard536; -wire _guard538 = invoke8_done_out; -wire _guard539 = ~_guard538; -wire _guard540 = fsm1_out == 2'd0; -wire _guard541 = _guard539 & _guard540; -wire _guard542 = tdcc0_go_out; -wire _guard543 = _guard541 & _guard542; -wire _guard544 = pd0_out; -wire _guard545 = tdcc0_done_out; -wire _guard546 = _guard544 | _guard545; -wire _guard547 = ~_guard546; -wire _guard548 = par0_go_out; -wire _guard549 = _guard547 & _guard548; -wire _guard550 = invoke6_go_out; -wire _guard551 = invoke6_go_out; -wire _guard552 = invoke6_go_out; -wire _guard553 = invoke6_go_out; -wire _guard554 = invoke6_go_out; -wire _guard555 = invoke16_go_out; -wire _guard556 = invoke16_go_out; -wire _guard557 = invoke16_go_out; -wire _guard558 = invoke16_go_out; -wire _guard559 = invoke16_go_out; -wire _guard560 = invoke16_go_out; -wire _guard561 = invoke16_go_out; -wire _guard562 = pd_out; -wire _guard563 = pd0_out; -wire _guard564 = _guard562 & _guard563; -wire _guard565 = pd1_out; -wire _guard566 = _guard564 & _guard565; -wire _guard567 = invoke17_done_out; -wire _guard568 = ~_guard567; -wire _guard569 = fsm3_out == 2'd1; -wire _guard570 = _guard568 & _guard569; -wire _guard571 = tdcc2_go_out; -wire _guard572 = _guard570 & _guard571; -wire _guard573 = invoke21_done_out; -wire _guard574 = ~_guard573; -wire _guard575 = fsm4_out == 2'd2; -wire _guard576 = _guard574 & _guard575; -wire _guard577 = tdcc3_go_out; -wire _guard578 = _guard576 & _guard577; -wire _guard579 = early_reset_static_par0_go_out; -wire _guard580 = early_reset_static_par0_go_out; -wire _guard581 = pd2_out; -wire _guard582 = pd3_out; -wire _guard583 = _guard581 & _guard582; -wire _guard584 = pd4_out; -wire _guard585 = _guard583 & _guard584; -wire _guard586 = tdcc2_done_out; -wire _guard587 = par1_go_out; -wire _guard588 = _guard586 & _guard587; -wire _guard589 = _guard585 | _guard588; -wire _guard590 = tdcc2_done_out; -wire _guard591 = par1_go_out; -wire _guard592 = _guard590 & _guard591; -wire _guard593 = pd2_out; -wire _guard594 = pd3_out; -wire _guard595 = _guard593 & _guard594; -wire _guard596 = pd4_out; -wire _guard597 = _guard595 & _guard596; -wire _guard598 = invoke16_done_out; -wire _guard599 = ~_guard598; -wire _guard600 = fsm3_out == 2'd0; -wire _guard601 = _guard599 & _guard600; -wire _guard602 = tdcc2_go_out; -wire _guard603 = _guard601 & _guard602; -wire _guard604 = invoke17_go_out; -wire _guard605 = invoke17_go_out; -wire _guard606 = invoke17_go_out; -wire _guard607 = invoke17_go_out; -wire _guard608 = invoke17_go_out; -wire _guard609 = invoke17_go_out; -wire _guard610 = invoke17_go_out; -wire _guard611 = invoke17_go_out; -wire _guard612 = invoke17_go_out; -wire _guard613 = invoke17_go_out; -wire _guard614 = invoke17_go_out; -wire _guard615 = invoke8_go_out; -wire _guard616 = invoke8_go_out; -wire _guard617 = invoke8_go_out; -wire _guard618 = invoke8_go_out; -wire _guard619 = invoke8_go_out; -wire _guard620 = fsm_out == 1'd0; -wire _guard621 = signal_reg_out; -wire _guard622 = _guard620 & _guard621; -wire _guard623 = fsm_out == 1'd0; -wire _guard624 = signal_reg_out; -wire _guard625 = ~_guard624; -wire _guard626 = _guard623 & _guard625; -wire _guard627 = wrapper_early_reset_static_par_go_out; -wire _guard628 = _guard626 & _guard627; -wire _guard629 = _guard622 | _guard628; -wire _guard630 = fsm_out == 1'd0; -wire _guard631 = signal_reg_out; -wire _guard632 = ~_guard631; -wire _guard633 = _guard630 & _guard632; -wire _guard634 = wrapper_early_reset_static_par0_go_out; -wire _guard635 = _guard633 & _guard634; -wire _guard636 = _guard629 | _guard635; -wire _guard637 = fsm_out == 1'd0; -wire _guard638 = signal_reg_out; -wire _guard639 = ~_guard638; -wire _guard640 = _guard637 & _guard639; -wire _guard641 = wrapper_early_reset_static_par_go_out; -wire _guard642 = _guard640 & _guard641; -wire _guard643 = fsm_out == 1'd0; -wire _guard644 = signal_reg_out; -wire _guard645 = ~_guard644; -wire _guard646 = _guard643 & _guard645; -wire _guard647 = wrapper_early_reset_static_par0_go_out; +wire _guard514 = tdcc0_go_out; +wire _guard515 = _guard513 & _guard514; +wire _guard516 = pd0_out; +wire _guard517 = tdcc0_done_out; +wire _guard518 = _guard516 | _guard517; +wire _guard519 = ~_guard518; +wire _guard520 = par0_go_out; +wire _guard521 = _guard519 & _guard520; +wire _guard522 = invoke6_go_out; +wire _guard523 = invoke6_go_out; +wire _guard524 = invoke6_go_out; +wire _guard525 = invoke6_go_out; +wire _guard526 = invoke16_go_out; +wire _guard527 = invoke16_go_out; +wire _guard528 = invoke16_go_out; +wire _guard529 = invoke16_go_out; +wire _guard530 = pd_out; +wire _guard531 = pd0_out; +wire _guard532 = _guard530 & _guard531; +wire _guard533 = pd1_out; +wire _guard534 = _guard532 & _guard533; +wire _guard535 = invoke17_done_out; +wire _guard536 = ~_guard535; +wire _guard537 = fsm3_out == 2'd1; +wire _guard538 = _guard536 & _guard537; +wire _guard539 = tdcc2_go_out; +wire _guard540 = _guard538 & _guard539; +wire _guard541 = invoke21_done_out; +wire _guard542 = ~_guard541; +wire _guard543 = fsm4_out == 2'd2; +wire _guard544 = _guard542 & _guard543; +wire _guard545 = tdcc3_go_out; +wire _guard546 = _guard544 & _guard545; +wire _guard547 = early_reset_static_par0_go_out; +wire _guard548 = early_reset_static_par0_go_out; +wire _guard549 = pd2_out; +wire _guard550 = pd3_out; +wire _guard551 = _guard549 & _guard550; +wire _guard552 = pd4_out; +wire _guard553 = _guard551 & _guard552; +wire _guard554 = tdcc2_done_out; +wire _guard555 = par1_go_out; +wire _guard556 = _guard554 & _guard555; +wire _guard557 = _guard553 | _guard556; +wire _guard558 = tdcc2_done_out; +wire _guard559 = par1_go_out; +wire _guard560 = _guard558 & _guard559; +wire _guard561 = pd2_out; +wire _guard562 = pd3_out; +wire _guard563 = _guard561 & _guard562; +wire _guard564 = pd4_out; +wire _guard565 = _guard563 & _guard564; +wire _guard566 = invoke16_done_out; +wire _guard567 = ~_guard566; +wire _guard568 = fsm3_out == 2'd0; +wire _guard569 = _guard567 & _guard568; +wire _guard570 = tdcc2_go_out; +wire _guard571 = _guard569 & _guard570; +wire _guard572 = invoke17_go_out; +wire _guard573 = invoke17_go_out; +wire _guard574 = invoke17_go_out; +wire _guard575 = invoke17_go_out; +wire _guard576 = invoke17_go_out; +wire _guard577 = invoke17_go_out; +wire _guard578 = invoke17_go_out; +wire _guard579 = invoke17_go_out; +wire _guard580 = invoke17_go_out; +wire _guard581 = invoke8_go_out; +wire _guard582 = invoke8_go_out; +wire _guard583 = invoke8_go_out; +wire _guard584 = invoke8_go_out; +wire _guard585 = fsm_out == 1'd0; +wire _guard586 = signal_reg_out; +wire _guard587 = _guard585 & _guard586; +wire _guard588 = fsm_out == 1'd0; +wire _guard589 = signal_reg_out; +wire _guard590 = ~_guard589; +wire _guard591 = _guard588 & _guard590; +wire _guard592 = wrapper_early_reset_static_par_go_out; +wire _guard593 = _guard591 & _guard592; +wire _guard594 = _guard587 | _guard593; +wire _guard595 = fsm_out == 1'd0; +wire _guard596 = signal_reg_out; +wire _guard597 = ~_guard596; +wire _guard598 = _guard595 & _guard597; +wire _guard599 = wrapper_early_reset_static_par0_go_out; +wire _guard600 = _guard598 & _guard599; +wire _guard601 = _guard594 | _guard600; +wire _guard602 = fsm_out == 1'd0; +wire _guard603 = signal_reg_out; +wire _guard604 = ~_guard603; +wire _guard605 = _guard602 & _guard604; +wire _guard606 = wrapper_early_reset_static_par_go_out; +wire _guard607 = _guard605 & _guard606; +wire _guard608 = fsm_out == 1'd0; +wire _guard609 = signal_reg_out; +wire _guard610 = ~_guard609; +wire _guard611 = _guard608 & _guard610; +wire _guard612 = wrapper_early_reset_static_par0_go_out; +wire _guard613 = _guard611 & _guard612; +wire _guard614 = _guard607 | _guard613; +wire _guard615 = fsm_out == 1'd0; +wire _guard616 = signal_reg_out; +wire _guard617 = _guard615 & _guard616; +wire _guard618 = fsm2_out == 2'd2; +wire _guard619 = pd2_out; +wire _guard620 = pd3_out; +wire _guard621 = _guard619 & _guard620; +wire _guard622 = pd4_out; +wire _guard623 = _guard621 & _guard622; +wire _guard624 = invoke21_go_out; +wire _guard625 = invoke21_go_out; +wire _guard626 = invoke11_go_out; +wire _guard627 = invoke12_go_out; +wire _guard628 = invoke23_go_out; +wire _guard629 = invoke11_go_out; +wire _guard630 = invoke12_go_out; +wire _guard631 = invoke23_go_out; +wire _guard632 = invoke11_go_out; +wire _guard633 = invoke12_go_out; +wire _guard634 = invoke23_go_out; +wire _guard635 = invoke11_go_out; +wire _guard636 = invoke12_go_out; +wire _guard637 = pd_out; +wire _guard638 = pd0_out; +wire _guard639 = _guard637 & _guard638; +wire _guard640 = pd1_out; +wire _guard641 = _guard639 & _guard640; +wire _guard642 = tdcc_done_out; +wire _guard643 = par0_go_out; +wire _guard644 = _guard642 & _guard643; +wire _guard645 = _guard641 | _guard644; +wire _guard646 = tdcc_done_out; +wire _guard647 = par0_go_out; wire _guard648 = _guard646 & _guard647; -wire _guard649 = _guard642 | _guard648; -wire _guard650 = fsm_out == 1'd0; -wire _guard651 = signal_reg_out; -wire _guard652 = _guard650 & _guard651; -wire _guard653 = fsm2_out == 2'd2; -wire _guard654 = pd2_out; -wire _guard655 = pd3_out; +wire _guard649 = pd_out; +wire _guard650 = pd0_out; +wire _guard651 = _guard649 & _guard650; +wire _guard652 = pd1_out; +wire _guard653 = _guard651 & _guard652; +wire _guard654 = pd_out; +wire _guard655 = pd0_out; wire _guard656 = _guard654 & _guard655; -wire _guard657 = pd4_out; +wire _guard657 = pd1_out; wire _guard658 = _guard656 & _guard657; -wire _guard659 = invoke21_go_out; -wire _guard660 = invoke21_go_out; -wire _guard661 = invoke11_go_out; -wire _guard662 = invoke12_go_out; -wire _guard663 = invoke23_go_out; -wire _guard664 = invoke11_go_out; -wire _guard665 = invoke12_go_out; -wire _guard666 = invoke23_go_out; -wire _guard667 = invoke11_go_out; -wire _guard668 = invoke12_go_out; -wire _guard669 = invoke23_go_out; -wire _guard670 = invoke11_go_out; -wire _guard671 = invoke12_go_out; -wire _guard672 = invoke23_go_out; -wire _guard673 = pd_out; -wire _guard674 = pd0_out; +wire _guard659 = tdcc0_done_out; +wire _guard660 = par0_go_out; +wire _guard661 = _guard659 & _guard660; +wire _guard662 = _guard658 | _guard661; +wire _guard663 = tdcc0_done_out; +wire _guard664 = par0_go_out; +wire _guard665 = _guard663 & _guard664; +wire _guard666 = pd_out; +wire _guard667 = pd0_out; +wire _guard668 = _guard666 & _guard667; +wire _guard669 = pd1_out; +wire _guard670 = _guard668 & _guard669; +wire _guard671 = pd2_out; +wire _guard672 = pd3_out; +wire _guard673 = _guard671 & _guard672; +wire _guard674 = pd4_out; wire _guard675 = _guard673 & _guard674; -wire _guard676 = pd1_out; -wire _guard677 = _guard675 & _guard676; -wire _guard678 = tdcc_done_out; -wire _guard679 = par0_go_out; -wire _guard680 = _guard678 & _guard679; -wire _guard681 = _guard677 | _guard680; -wire _guard682 = tdcc_done_out; -wire _guard683 = par0_go_out; -wire _guard684 = _guard682 & _guard683; -wire _guard685 = pd_out; -wire _guard686 = pd0_out; +wire _guard676 = tdcc4_done_out; +wire _guard677 = par1_go_out; +wire _guard678 = _guard676 & _guard677; +wire _guard679 = _guard675 | _guard678; +wire _guard680 = tdcc4_done_out; +wire _guard681 = par1_go_out; +wire _guard682 = _guard680 & _guard681; +wire _guard683 = pd2_out; +wire _guard684 = pd3_out; +wire _guard685 = _guard683 & _guard684; +wire _guard686 = pd4_out; wire _guard687 = _guard685 & _guard686; -wire _guard688 = pd1_out; -wire _guard689 = _guard687 & _guard688; -wire _guard690 = pd_out; -wire _guard691 = pd0_out; -wire _guard692 = _guard690 & _guard691; -wire _guard693 = pd1_out; -wire _guard694 = _guard692 & _guard693; -wire _guard695 = tdcc0_done_out; -wire _guard696 = par0_go_out; -wire _guard697 = _guard695 & _guard696; -wire _guard698 = _guard694 | _guard697; -wire _guard699 = tdcc0_done_out; -wire _guard700 = par0_go_out; +wire _guard688 = pd4_out; +wire _guard689 = tdcc4_done_out; +wire _guard690 = _guard688 | _guard689; +wire _guard691 = ~_guard690; +wire _guard692 = par1_go_out; +wire _guard693 = _guard691 & _guard692; +wire _guard694 = invoke18_go_out; +wire _guard695 = invoke18_go_out; +wire _guard696 = wrapper_early_reset_static_par0_done_out; +wire _guard697 = ~_guard696; +wire _guard698 = fsm6_out == 3'd3; +wire _guard699 = _guard697 & _guard698; +wire _guard700 = tdcc5_go_out; wire _guard701 = _guard699 & _guard700; -wire _guard702 = pd_out; -wire _guard703 = pd0_out; +wire _guard702 = fsm_out == 1'd0; +wire _guard703 = signal_reg_out; wire _guard704 = _guard702 & _guard703; -wire _guard705 = pd1_out; -wire _guard706 = _guard704 & _guard705; -wire _guard707 = pd2_out; -wire _guard708 = pd3_out; +wire _guard705 = fsm0_out == 2'd2; +wire _guard706 = invoke19_done_out; +wire _guard707 = ~_guard706; +wire _guard708 = fsm4_out == 2'd0; wire _guard709 = _guard707 & _guard708; -wire _guard710 = pd4_out; +wire _guard710 = tdcc3_go_out; wire _guard711 = _guard709 & _guard710; -wire _guard712 = tdcc4_done_out; -wire _guard713 = par1_go_out; -wire _guard714 = _guard712 & _guard713; -wire _guard715 = _guard711 | _guard714; -wire _guard716 = tdcc4_done_out; -wire _guard717 = par1_go_out; -wire _guard718 = _guard716 & _guard717; -wire _guard719 = pd2_out; -wire _guard720 = pd3_out; -wire _guard721 = _guard719 & _guard720; -wire _guard722 = pd4_out; -wire _guard723 = _guard721 & _guard722; -wire _guard724 = pd4_out; -wire _guard725 = tdcc4_done_out; -wire _guard726 = _guard724 | _guard725; -wire _guard727 = ~_guard726; -wire _guard728 = par1_go_out; -wire _guard729 = _guard727 & _guard728; -wire _guard730 = invoke18_go_out; -wire _guard731 = invoke18_go_out; -wire _guard732 = wrapper_early_reset_static_par0_done_out; -wire _guard733 = ~_guard732; -wire _guard734 = fsm6_out == 3'd3; +wire _guard712 = invoke20_done_out; +wire _guard713 = ~_guard712; +wire _guard714 = fsm4_out == 2'd1; +wire _guard715 = _guard713 & _guard714; +wire _guard716 = tdcc3_go_out; +wire _guard717 = _guard715 & _guard716; +wire _guard718 = invoke16_go_out; +wire _guard719 = invoke16_go_out; +wire _guard720 = invoke22_go_out; +wire _guard721 = invoke22_go_out; +wire _guard722 = invoke22_go_out; +wire _guard723 = invoke22_go_out; +wire _guard724 = invoke23_go_out; +wire _guard725 = invoke23_go_out; +wire _guard726 = invoke23_go_out; +wire _guard727 = invoke23_go_out; +wire _guard728 = invoke23_go_out; +wire _guard729 = invoke23_go_out; +wire _guard730 = invoke23_go_out; +wire _guard731 = invoke23_go_out; +wire _guard732 = invoke23_go_out; +wire _guard733 = pd2_out; +wire _guard734 = pd3_out; wire _guard735 = _guard733 & _guard734; -wire _guard736 = tdcc5_go_out; +wire _guard736 = pd4_out; wire _guard737 = _guard735 & _guard736; -wire _guard738 = fsm_out == 1'd0; -wire _guard739 = signal_reg_out; +wire _guard738 = tdcc3_done_out; +wire _guard739 = par1_go_out; wire _guard740 = _guard738 & _guard739; -wire _guard741 = fsm0_out == 2'd2; -wire _guard742 = invoke19_done_out; -wire _guard743 = ~_guard742; -wire _guard744 = fsm4_out == 2'd0; -wire _guard745 = _guard743 & _guard744; -wire _guard746 = tdcc3_go_out; +wire _guard741 = _guard737 | _guard740; +wire _guard742 = tdcc3_done_out; +wire _guard743 = par1_go_out; +wire _guard744 = _guard742 & _guard743; +wire _guard745 = pd2_out; +wire _guard746 = pd3_out; wire _guard747 = _guard745 & _guard746; -wire _guard748 = invoke20_done_out; -wire _guard749 = ~_guard748; -wire _guard750 = fsm4_out == 2'd1; -wire _guard751 = _guard749 & _guard750; -wire _guard752 = tdcc3_go_out; -wire _guard753 = _guard751 & _guard752; -wire _guard754 = invoke16_go_out; -wire _guard755 = invoke17_go_out; -wire _guard756 = invoke16_go_out; -wire _guard757 = invoke17_go_out; -wire _guard758 = invoke22_go_out; -wire _guard759 = invoke22_go_out; -wire _guard760 = invoke22_go_out; -wire _guard761 = invoke22_go_out; -wire _guard762 = invoke22_go_out; -wire _guard763 = invoke22_go_out; -wire _guard764 = invoke22_go_out; -wire _guard765 = invoke23_go_out; -wire _guard766 = invoke23_go_out; -wire _guard767 = invoke23_go_out; -wire _guard768 = invoke23_go_out; -wire _guard769 = invoke23_go_out; -wire _guard770 = invoke23_go_out; -wire _guard771 = invoke23_go_out; -wire _guard772 = invoke23_go_out; -wire _guard773 = invoke23_go_out; -wire _guard774 = invoke23_go_out; -wire _guard775 = invoke23_go_out; -wire _guard776 = pd2_out; -wire _guard777 = pd3_out; -wire _guard778 = _guard776 & _guard777; -wire _guard779 = pd4_out; -wire _guard780 = _guard778 & _guard779; -wire _guard781 = tdcc3_done_out; -wire _guard782 = par1_go_out; +wire _guard748 = pd4_out; +wire _guard749 = _guard747 & _guard748; +wire _guard750 = wrapper_early_reset_static_par_go_out; +wire _guard751 = fsm5_out == 2'd3; +wire _guard752 = invoke19_go_out; +wire _guard753 = invoke19_go_out; +wire _guard754 = invoke11_go_out; +wire _guard755 = early_reset_static_par_go_out; +wire _guard756 = invoke23_go_out; +wire _guard757 = invoke11_go_out; +wire _guard758 = invoke23_go_out; +wire _guard759 = early_reset_static_par_go_out; +wire _guard760 = invoke6_done_out; +wire _guard761 = ~_guard760; +wire _guard762 = fsm0_out == 2'd0; +wire _guard763 = _guard761 & _guard762; +wire _guard764 = tdcc_go_out; +wire _guard765 = _guard763 & _guard764; +wire _guard766 = invoke24_done_out; +wire _guard767 = ~_guard766; +wire _guard768 = fsm5_out == 2'd2; +wire _guard769 = _guard767 & _guard768; +wire _guard770 = tdcc4_go_out; +wire _guard771 = _guard769 & _guard770; +wire _guard772 = pd1_out; +wire _guard773 = tdcc1_done_out; +wire _guard774 = _guard772 | _guard773; +wire _guard775 = ~_guard774; +wire _guard776 = par0_go_out; +wire _guard777 = _guard775 & _guard776; +wire _guard778 = par0_done_out; +wire _guard779 = ~_guard778; +wire _guard780 = fsm6_out == 3'd1; +wire _guard781 = _guard779 & _guard780; +wire _guard782 = tdcc5_go_out; wire _guard783 = _guard781 & _guard782; -wire _guard784 = _guard780 | _guard783; -wire _guard785 = tdcc3_done_out; -wire _guard786 = par1_go_out; +wire _guard784 = invoke7_done_out; +wire _guard785 = ~_guard784; +wire _guard786 = fsm0_out == 2'd1; wire _guard787 = _guard785 & _guard786; -wire _guard788 = pd2_out; -wire _guard789 = pd3_out; -wire _guard790 = _guard788 & _guard789; -wire _guard791 = pd4_out; -wire _guard792 = _guard790 & _guard791; -wire _guard793 = wrapper_early_reset_static_par_go_out; -wire _guard794 = fsm5_out == 2'd3; -wire _guard795 = invoke20_go_out; -wire _guard796 = invoke19_go_out; -wire _guard797 = invoke20_go_out; -wire _guard798 = invoke19_go_out; -wire _guard799 = invoke11_go_out; -wire _guard800 = early_reset_static_par_go_out; -wire _guard801 = invoke23_go_out; -wire _guard802 = invoke11_go_out; -wire _guard803 = invoke23_go_out; -wire _guard804 = early_reset_static_par_go_out; -wire _guard805 = invoke6_done_out; -wire _guard806 = ~_guard805; -wire _guard807 = fsm0_out == 2'd0; -wire _guard808 = _guard806 & _guard807; -wire _guard809 = tdcc_go_out; -wire _guard810 = _guard808 & _guard809; -wire _guard811 = invoke24_done_out; -wire _guard812 = ~_guard811; -wire _guard813 = fsm5_out == 2'd2; -wire _guard814 = _guard812 & _guard813; -wire _guard815 = tdcc4_go_out; -wire _guard816 = _guard814 & _guard815; -wire _guard817 = pd1_out; -wire _guard818 = tdcc1_done_out; -wire _guard819 = _guard817 | _guard818; -wire _guard820 = ~_guard819; -wire _guard821 = par0_go_out; -wire _guard822 = _guard820 & _guard821; -wire _guard823 = par0_done_out; -wire _guard824 = ~_guard823; -wire _guard825 = fsm6_out == 3'd1; -wire _guard826 = _guard824 & _guard825; -wire _guard827 = tdcc5_go_out; -wire _guard828 = _guard826 & _guard827; -wire _guard829 = invoke7_done_out; -wire _guard830 = ~_guard829; -wire _guard831 = fsm0_out == 2'd1; -wire _guard832 = _guard830 & _guard831; -wire _guard833 = tdcc_go_out; -wire _guard834 = _guard832 & _guard833; -wire _guard835 = invoke10_done_out; -wire _guard836 = ~_guard835; -wire _guard837 = fsm2_out == 2'd0; -wire _guard838 = _guard836 & _guard837; -wire _guard839 = tdcc1_go_out; -wire _guard840 = _guard838 & _guard839; -wire _guard841 = invoke22_done_out; -wire _guard842 = ~_guard841; -wire _guard843 = fsm5_out == 2'd0; -wire _guard844 = _guard842 & _guard843; -wire _guard845 = tdcc4_go_out; -wire _guard846 = _guard844 & _guard845; -wire _guard847 = fsm6_out == 3'd5; +wire _guard788 = tdcc_go_out; +wire _guard789 = _guard787 & _guard788; +wire _guard790 = invoke10_done_out; +wire _guard791 = ~_guard790; +wire _guard792 = fsm2_out == 2'd0; +wire _guard793 = _guard791 & _guard792; +wire _guard794 = tdcc1_go_out; +wire _guard795 = _guard793 & _guard794; +wire _guard796 = invoke22_done_out; +wire _guard797 = ~_guard796; +wire _guard798 = fsm5_out == 2'd0; +wire _guard799 = _guard797 & _guard798; +wire _guard800 = tdcc4_go_out; +wire _guard801 = _guard799 & _guard800; +wire _guard802 = fsm6_out == 3'd5; assign curr_addr_internal_mem_A0_write_en = _guard1 ? 1'd1 : _guard2 ? read_channel_A0_curr_addr_internal_mem_write_en : @@ -7320,850 +7275,751 @@ assign read_channel_Sum0_RDATA = _guard18 ? Sum0_RDATA : 32'd0; assign read_channel_Sum0_clk = clk; -assign read_channel_Sum0_mem_ref_read_data = - _guard19 ? internal_mem_Sum0_read_data : - 32'd0; -assign read_channel_Sum0_go = _guard20; +assign read_channel_Sum0_go = _guard19; assign read_channel_Sum0_reset = reset; assign read_channel_Sum0_RRESP = - _guard21 ? Sum0_RRESP : + _guard20 ? Sum0_RRESP : 2'd0; assign read_channel_Sum0_mem_ref_done = - _guard22 ? internal_mem_Sum0_done : + _guard21 ? internal_mem_Sum0_done : 1'd0; assign read_channel_Sum0_ARESETn = - _guard23 ? Sum0_ARESETn : + _guard22 ? Sum0_ARESETn : 1'd0; assign read_channel_Sum0_curr_addr_internal_mem_done = - _guard24 ? curr_addr_internal_mem_Sum0_done : + _guard23 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign read_channel_Sum0_curr_addr_axi_done = - _guard25 ? curr_addr_axi_Sum0_done : + _guard24 ? curr_addr_axi_Sum0_done : 1'd0; -assign done = _guard26; +assign done = _guard25; assign B0_WLAST = - _guard27 ? write_channel_B0_WLAST : + _guard26 ? write_channel_B0_WLAST : 1'd0; assign Sum0_ARVALID = - _guard28 ? ar_channel_Sum0_ARVALID : + _guard27 ? ar_channel_Sum0_ARVALID : 1'd0; assign Sum0_ARBURST = - _guard29 ? ar_channel_Sum0_ARBURST : + _guard28 ? ar_channel_Sum0_ARBURST : 2'd0; assign Sum0_AWADDR = - _guard30 ? aw_channel_Sum0_AWADDR : + _guard29 ? aw_channel_Sum0_AWADDR : 64'd0; assign Sum0_AWSIZE = - _guard31 ? aw_channel_Sum0_AWSIZE : + _guard30 ? aw_channel_Sum0_AWSIZE : 3'd0; assign Sum0_ARID = 1'd0; assign A0_ARSIZE = - _guard32 ? ar_channel_A0_ARSIZE : + _guard31 ? ar_channel_A0_ARSIZE : 3'd0; assign A0_AWBURST = - _guard33 ? aw_channel_A0_AWBURST : + _guard32 ? aw_channel_A0_AWBURST : 2'd0; assign B0_AWBURST = - _guard34 ? aw_channel_B0_AWBURST : + _guard33 ? aw_channel_B0_AWBURST : 2'd0; assign Sum0_WDATA = - _guard35 ? write_channel_Sum0_WDATA : + _guard34 ? write_channel_Sum0_WDATA : 32'd0; assign A0_BREADY = - _guard36 ? bresp_channel_A0_BREADY : + _guard35 ? bresp_channel_A0_BREADY : 1'd0; assign B0_AWLEN = - _guard37 ? aw_channel_B0_AWLEN : + _guard36 ? aw_channel_B0_AWLEN : 8'd0; assign Sum0_RREADY = - _guard38 ? read_channel_Sum0_RREADY : + _guard37 ? read_channel_Sum0_RREADY : 1'd0; assign B0_ARID = 1'd0; assign B0_ARBURST = - _guard39 ? ar_channel_B0_ARBURST : + _guard38 ? ar_channel_B0_ARBURST : 2'd0; assign B0_AWVALID = - _guard40 ? aw_channel_B0_AWVALID : + _guard39 ? aw_channel_B0_AWVALID : 1'd0; assign B0_WVALID = - _guard41 ? write_channel_B0_WVALID : + _guard40 ? write_channel_B0_WVALID : 1'd0; assign Sum0_AWLEN = - _guard42 ? aw_channel_Sum0_AWLEN : + _guard41 ? aw_channel_Sum0_AWLEN : 8'd0; assign Sum0_BID = 1'd0; assign A0_AWSIZE = - _guard43 ? aw_channel_A0_AWSIZE : + _guard42 ? aw_channel_A0_AWSIZE : 3'd0; assign B0_ARLEN = - _guard44 ? ar_channel_B0_ARLEN : + _guard43 ? ar_channel_B0_ARLEN : 8'd0; assign B0_WID = 1'd0; assign B0_BID = 1'd0; assign A0_WLAST = - _guard45 ? write_channel_A0_WLAST : + _guard44 ? write_channel_A0_WLAST : 1'd0; assign B0_ARVALID = - _guard46 ? ar_channel_B0_ARVALID : + _guard45 ? ar_channel_B0_ARVALID : 1'd0; assign B0_AWPROT = - _guard47 ? aw_channel_B0_AWPROT : + _guard46 ? aw_channel_B0_AWPROT : 3'd0; assign Sum0_AWPROT = - _guard48 ? aw_channel_Sum0_AWPROT : + _guard47 ? aw_channel_Sum0_AWPROT : 3'd0; assign A0_ARBURST = - _guard49 ? ar_channel_A0_ARBURST : + _guard48 ? ar_channel_A0_ARBURST : 2'd0; assign A0_AWPROT = - _guard50 ? aw_channel_A0_AWPROT : + _guard49 ? aw_channel_A0_AWPROT : 3'd0; assign Sum0_WLAST = - _guard51 ? write_channel_Sum0_WLAST : + _guard50 ? write_channel_Sum0_WLAST : 1'd0; assign Sum0_BREADY = - _guard52 ? bresp_channel_Sum0_BREADY : + _guard51 ? bresp_channel_Sum0_BREADY : 1'd0; assign Sum0_AWID = 1'd0; assign A0_WVALID = - _guard53 ? write_channel_A0_WVALID : + _guard52 ? write_channel_A0_WVALID : 1'd0; assign A0_WID = 1'd0; assign B0_AWID = 1'd0; assign A0_ARADDR = - _guard54 ? ar_channel_A0_ARADDR : + _guard53 ? ar_channel_A0_ARADDR : 64'd0; assign A0_WDATA = - _guard55 ? write_channel_A0_WDATA : + _guard54 ? write_channel_A0_WDATA : 32'd0; assign Sum0_ARADDR = - _guard56 ? ar_channel_Sum0_ARADDR : + _guard55 ? ar_channel_Sum0_ARADDR : 64'd0; assign Sum0_AWBURST = - _guard57 ? aw_channel_Sum0_AWBURST : + _guard56 ? aw_channel_Sum0_AWBURST : 2'd0; assign Sum0_WVALID = - _guard58 ? write_channel_Sum0_WVALID : + _guard57 ? write_channel_Sum0_WVALID : 1'd0; assign A0_RREADY = - _guard59 ? read_channel_A0_RREADY : + _guard58 ? read_channel_A0_RREADY : 1'd0; assign A0_BID = 1'd0; assign B0_RREADY = - _guard60 ? read_channel_B0_RREADY : + _guard59 ? read_channel_B0_RREADY : 1'd0; assign B0_WDATA = - _guard61 ? write_channel_B0_WDATA : + _guard60 ? write_channel_B0_WDATA : 32'd0; assign B0_BREADY = - _guard62 ? bresp_channel_B0_BREADY : + _guard61 ? bresp_channel_B0_BREADY : 1'd0; assign A0_AWLEN = - _guard63 ? aw_channel_A0_AWLEN : + _guard62 ? aw_channel_A0_AWLEN : 8'd0; assign B0_ARSIZE = - _guard64 ? ar_channel_B0_ARSIZE : + _guard63 ? ar_channel_B0_ARSIZE : 3'd0; assign A0_AWADDR = - _guard65 ? aw_channel_A0_AWADDR : + _guard64 ? aw_channel_A0_AWADDR : 64'd0; assign B0_ARADDR = - _guard66 ? ar_channel_B0_ARADDR : + _guard65 ? ar_channel_B0_ARADDR : 64'd0; assign Sum0_ARSIZE = - _guard67 ? ar_channel_Sum0_ARSIZE : + _guard66 ? ar_channel_Sum0_ARSIZE : 3'd0; assign Sum0_ARLEN = - _guard68 ? ar_channel_Sum0_ARLEN : + _guard67 ? ar_channel_Sum0_ARLEN : 8'd0; assign Sum0_AWVALID = - _guard69 ? aw_channel_Sum0_AWVALID : + _guard68 ? aw_channel_Sum0_AWVALID : 1'd0; assign A0_ARVALID = - _guard70 ? ar_channel_A0_ARVALID : + _guard69 ? ar_channel_A0_ARVALID : 1'd0; assign A0_AWVALID = - _guard71 ? aw_channel_A0_AWVALID : + _guard70 ? aw_channel_A0_AWVALID : 1'd0; assign A0_ARID = 1'd0; assign B0_AWADDR = - _guard72 ? aw_channel_B0_AWADDR : + _guard71 ? aw_channel_B0_AWADDR : 64'd0; assign B0_AWSIZE = - _guard73 ? aw_channel_B0_AWSIZE : + _guard72 ? aw_channel_B0_AWSIZE : 3'd0; assign Sum0_WID = 1'd0; assign A0_ARLEN = - _guard74 ? ar_channel_A0_ARLEN : + _guard73 ? ar_channel_A0_ARLEN : 8'd0; assign A0_AWID = 1'd0; -assign fsm_write_en = _guard77; +assign fsm_write_en = _guard76; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard81 ? adder_out : - _guard88 ? 1'd0 : - _guard92 ? adder0_out : + _guard80 ? adder_out : + _guard87 ? 1'd0 : + _guard91 ? adder0_out : 1'd0; assign adder_left = - _guard93 ? fsm_out : + _guard92 ? fsm_out : 1'd0; -assign adder_right = _guard94; -assign fsm6_write_en = _guard125; +assign adder_right = _guard93; +assign fsm6_write_en = _guard124; assign fsm6_clk = clk; assign fsm6_reset = reset; assign fsm6_in = - _guard130 ? 3'd5 : - _guard135 ? 3'd2 : - _guard140 ? 3'd4 : - _guard145 ? 3'd1 : - _guard146 ? 3'd0 : - _guard151 ? 3'd3 : + _guard129 ? 3'd5 : + _guard134 ? 3'd2 : + _guard139 ? 3'd4 : + _guard144 ? 3'd1 : + _guard145 ? 3'd0 : + _guard150 ? 3'd3 : 3'd0; -assign early_reset_static_par0_go_in = _guard152; +assign early_reset_static_par0_go_in = _guard151; assign invoke11_done_in = read_channel_Sum0_done; -assign invoke18_go_in = _guard158; -assign tdcc2_go_in = _guard164; +assign invoke18_go_in = _guard157; +assign tdcc2_go_in = _guard163; assign curr_addr_internal_mem_B0_write_en = - _guard165 ? read_channel_B0_curr_addr_internal_mem_write_en : - _guard166 ? 1'd1 : - _guard167 ? write_channel_B0_curr_addr_internal_mem_write_en : + _guard164 ? read_channel_B0_curr_addr_internal_mem_write_en : + _guard165 ? 1'd1 : + _guard166 ? write_channel_B0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_B0_clk = clk; assign curr_addr_internal_mem_B0_reset = reset; assign curr_addr_internal_mem_B0_in = - _guard168 ? read_channel_B0_curr_addr_internal_mem_in : - _guard169 ? write_channel_B0_curr_addr_internal_mem_in : - _guard170 ? 3'd0 : + _guard167 ? read_channel_B0_curr_addr_internal_mem_in : + _guard168 ? write_channel_B0_curr_addr_internal_mem_in : + _guard169 ? 3'd0 : 'x; assign read_channel_B0_curr_addr_internal_mem_out = - _guard171 ? curr_addr_internal_mem_B0_out : + _guard170 ? curr_addr_internal_mem_B0_out : 3'd0; assign read_channel_B0_curr_addr_axi_out = - _guard172 ? curr_addr_axi_B0_out : + _guard171 ? curr_addr_axi_B0_out : 64'd0; assign read_channel_B0_RVALID = - _guard173 ? B0_RVALID : + _guard172 ? B0_RVALID : 1'd0; assign read_channel_B0_RLAST = - _guard174 ? B0_RLAST : + _guard173 ? B0_RLAST : 1'd0; assign read_channel_B0_RDATA = - _guard175 ? B0_RDATA : + _guard174 ? B0_RDATA : 32'd0; assign read_channel_B0_clk = clk; -assign read_channel_B0_mem_ref_read_data = - _guard176 ? internal_mem_B0_read_data : - 32'd0; -assign read_channel_B0_go = _guard177; +assign read_channel_B0_go = _guard175; assign read_channel_B0_reset = reset; assign read_channel_B0_RRESP = - _guard178 ? B0_RRESP : + _guard176 ? B0_RRESP : 2'd0; assign read_channel_B0_mem_ref_done = - _guard179 ? internal_mem_B0_done : + _guard177 ? internal_mem_B0_done : 1'd0; assign read_channel_B0_ARESETn = - _guard180 ? B0_ARESETn : + _guard178 ? B0_ARESETn : 1'd0; assign read_channel_B0_curr_addr_internal_mem_done = - _guard181 ? curr_addr_internal_mem_B0_done : + _guard179 ? curr_addr_internal_mem_B0_done : 1'd0; assign read_channel_B0_curr_addr_axi_done = - _guard182 ? curr_addr_axi_B0_done : + _guard180 ? curr_addr_axi_B0_done : 1'd0; assign internal_mem_B0_write_en = - _guard183 ? read_channel_B0_mem_ref_write_en : - _guard184 ? main_compute_B0_write_en : - _guard185 ? write_channel_B0_mem_ref_write_en : + _guard181 ? read_channel_B0_mem_ref_write_en : + _guard182 ? main_compute_B0_write_en : + _guard183 ? write_channel_B0_mem_ref_write_en : 1'd0; assign internal_mem_B0_clk = clk; assign internal_mem_B0_addr0 = - _guard186 ? read_channel_B0_mem_ref_addr0 : - _guard187 ? main_compute_B0_addr0 : - _guard188 ? write_channel_B0_mem_ref_addr0 : + _guard184 ? read_channel_B0_mem_ref_addr0 : + _guard185 ? main_compute_B0_addr0 : + _guard186 ? write_channel_B0_mem_ref_addr0 : 'x; assign internal_mem_B0_content_en = - _guard189 ? read_channel_B0_mem_ref_content_en : - _guard190 ? main_compute_B0_content_en : - _guard191 ? write_channel_B0_mem_ref_content_en : + _guard187 ? read_channel_B0_mem_ref_content_en : + _guard188 ? main_compute_B0_content_en : + _guard189 ? write_channel_B0_mem_ref_content_en : 1'd0; assign internal_mem_B0_reset = reset; -assign internal_mem_B0_write_data = - _guard192 ? read_channel_B0_mem_ref_write_data : - _guard193 ? main_compute_B0_write_data : - _guard194 ? write_channel_B0_mem_ref_write_data : - 'x; +assign internal_mem_B0_write_data = read_channel_B0_mem_ref_write_data; assign bresp_channel_Sum0_clk = clk; -assign bresp_channel_Sum0_go = _guard195; +assign bresp_channel_Sum0_go = _guard191; assign bresp_channel_Sum0_reset = reset; assign bresp_channel_Sum0_BVALID = - _guard196 ? Sum0_BVALID : + _guard192 ? Sum0_BVALID : 1'd0; -assign fsm3_write_en = _guard215; +assign fsm3_write_en = _guard211; assign fsm3_clk = clk; assign fsm3_reset = reset; assign fsm3_in = - _guard220 ? 2'd1 : - _guard221 ? 2'd0 : - _guard226 ? 2'd3 : - _guard231 ? 2'd2 : + _guard216 ? 2'd1 : + _guard217 ? 2'd0 : + _guard222 ? 2'd3 : + _guard227 ? 2'd2 : 2'd0; -assign fsm5_write_en = _guard250; +assign fsm5_write_en = _guard246; assign fsm5_clk = clk; assign fsm5_reset = reset; assign fsm5_in = - _guard255 ? 2'd1 : - _guard256 ? 2'd0 : - _guard261 ? 2'd3 : - _guard266 ? 2'd2 : + _guard251 ? 2'd1 : + _guard252 ? 2'd0 : + _guard257 ? 2'd3 : + _guard262 ? 2'd2 : 2'd0; -assign tdcc0_done_in = _guard267; +assign tdcc0_done_in = _guard263; assign curr_addr_axi_B0_write_en = - _guard268 ? read_channel_B0_curr_addr_axi_write_en : - _guard271 ? 1'd1 : - _guard272 ? write_channel_B0_curr_addr_axi_write_en : - _guard273 ? aw_channel_B0_curr_addr_axi_write_en : - _guard274 ? ar_channel_B0_curr_addr_axi_write_en : + _guard264 ? read_channel_B0_curr_addr_axi_write_en : + _guard267 ? 1'd1 : + _guard268 ? write_channel_B0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_B0_clk = clk; assign curr_addr_axi_B0_reset = reset; assign curr_addr_axi_B0_in = - _guard275 ? read_channel_B0_curr_addr_axi_in : - _guard276 ? write_channel_B0_curr_addr_axi_in : - _guard277 ? aw_channel_B0_curr_addr_axi_in : - _guard280 ? 64'd4096 : - _guard281 ? ar_channel_B0_curr_addr_axi_in : + _guard269 ? read_channel_B0_curr_addr_axi_in : + _guard270 ? write_channel_B0_curr_addr_axi_in : + _guard273 ? 64'd4096 : 'x; assign max_transfers_Sum0_write_en = - _guard282 ? aw_channel_Sum0_max_transfers_write_en : - _guard283 ? write_channel_Sum0_max_transfers_write_en : + _guard274 ? aw_channel_Sum0_max_transfers_write_en : 1'd0; assign max_transfers_Sum0_clk = clk; assign max_transfers_Sum0_reset = reset; -assign max_transfers_Sum0_in = - _guard284 ? aw_channel_Sum0_max_transfers_in : - _guard285 ? write_channel_Sum0_max_transfers_in : - 'x; +assign max_transfers_Sum0_in = aw_channel_Sum0_max_transfers_in; assign main_compute_A0_read_data = - _guard286 ? internal_mem_A0_read_data : + _guard276 ? internal_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard287 ? internal_mem_B0_read_data : + _guard277 ? internal_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard288 ? internal_mem_Sum0_done : + _guard278 ? internal_mem_Sum0_done : 1'd0; assign main_compute_clk = clk; assign main_compute_B0_done = - _guard289 ? internal_mem_B0_done : + _guard279 ? internal_mem_B0_done : 1'd0; -assign main_compute_go = _guard290; +assign main_compute_go = _guard280; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard291 ? internal_mem_A0_done : + _guard281 ? internal_mem_A0_done : 1'd0; -assign main_compute_Sum0_read_data = - _guard292 ? internal_mem_Sum0_read_data : - 32'd0; -assign fsm1_write_en = _guard305; +assign fsm1_write_en = _guard294; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard310 ? 2'd1 : - _guard311 ? 2'd0 : - _guard316 ? 2'd2 : + _guard299 ? 2'd1 : + _guard300 ? 2'd0 : + _guard305 ? 2'd2 : 2'd0; -assign fsm4_write_en = _guard335; +assign fsm4_write_en = _guard324; assign fsm4_clk = clk; assign fsm4_reset = reset; assign fsm4_in = - _guard340 ? 2'd1 : - _guard341 ? 2'd0 : - _guard346 ? 2'd3 : - _guard351 ? 2'd2 : + _guard329 ? 2'd1 : + _guard330 ? 2'd0 : + _guard335 ? 2'd3 : + _guard340 ? 2'd2 : 2'd0; -assign wrapper_early_reset_static_par_go_in = _guard357; -assign invoke11_go_in = _guard363; +assign wrapper_early_reset_static_par_go_in = _guard346; +assign invoke11_go_in = _guard352; assign invoke20_done_in = write_channel_B0_done; -assign invoke23_go_in = _guard369; -assign par1_go_in = _guard375; +assign invoke23_go_in = _guard358; +assign par1_go_in = _guard364; assign curr_addr_axi_A0_write_en = - _guard378 ? 1'd1 : - _guard379 ? read_channel_A0_curr_addr_axi_write_en : - _guard380 ? ar_channel_A0_curr_addr_axi_write_en : - _guard381 ? aw_channel_A0_curr_addr_axi_write_en : - _guard382 ? write_channel_A0_curr_addr_axi_write_en : + _guard367 ? 1'd1 : + _guard368 ? read_channel_A0_curr_addr_axi_write_en : + _guard369 ? write_channel_A0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_A0_clk = clk; assign curr_addr_axi_A0_reset = reset; assign curr_addr_axi_A0_in = - _guard383 ? read_channel_A0_curr_addr_axi_in : - _guard384 ? ar_channel_A0_curr_addr_axi_in : - _guard385 ? aw_channel_A0_curr_addr_axi_in : - _guard388 ? 64'd4096 : - _guard389 ? write_channel_A0_curr_addr_axi_in : + _guard370 ? read_channel_A0_curr_addr_axi_in : + _guard373 ? 64'd4096 : + _guard374 ? write_channel_A0_curr_addr_axi_in : 'x; assign read_channel_A0_curr_addr_internal_mem_out = - _guard390 ? curr_addr_internal_mem_A0_out : + _guard375 ? curr_addr_internal_mem_A0_out : 3'd0; assign read_channel_A0_curr_addr_axi_out = - _guard391 ? curr_addr_axi_A0_out : + _guard376 ? curr_addr_axi_A0_out : 64'd0; assign read_channel_A0_RVALID = - _guard392 ? A0_RVALID : + _guard377 ? A0_RVALID : 1'd0; assign read_channel_A0_RLAST = - _guard393 ? A0_RLAST : + _guard378 ? A0_RLAST : 1'd0; assign read_channel_A0_RDATA = - _guard394 ? A0_RDATA : + _guard379 ? A0_RDATA : 32'd0; assign read_channel_A0_clk = clk; -assign read_channel_A0_mem_ref_read_data = - _guard395 ? internal_mem_A0_read_data : - 32'd0; -assign read_channel_A0_go = _guard396; +assign read_channel_A0_go = _guard380; assign read_channel_A0_reset = reset; assign read_channel_A0_RRESP = - _guard397 ? A0_RRESP : + _guard381 ? A0_RRESP : 2'd0; assign read_channel_A0_mem_ref_done = - _guard398 ? internal_mem_A0_done : + _guard382 ? internal_mem_A0_done : 1'd0; assign read_channel_A0_ARESETn = - _guard399 ? A0_ARESETn : + _guard383 ? A0_ARESETn : 1'd0; assign read_channel_A0_curr_addr_internal_mem_done = - _guard400 ? curr_addr_internal_mem_A0_done : + _guard384 ? curr_addr_internal_mem_A0_done : 1'd0; assign read_channel_A0_curr_addr_axi_done = - _guard401 ? curr_addr_axi_A0_done : + _guard385 ? curr_addr_axi_A0_done : 1'd0; assign internal_mem_A0_write_en = - _guard402 ? main_compute_A0_write_en : - _guard403 ? read_channel_A0_mem_ref_write_en : - _guard404 ? write_channel_A0_mem_ref_write_en : + _guard386 ? main_compute_A0_write_en : + _guard387 ? read_channel_A0_mem_ref_write_en : + _guard388 ? write_channel_A0_mem_ref_write_en : 1'd0; assign internal_mem_A0_clk = clk; assign internal_mem_A0_addr0 = - _guard405 ? main_compute_A0_addr0 : - _guard406 ? read_channel_A0_mem_ref_addr0 : - _guard407 ? write_channel_A0_mem_ref_addr0 : + _guard389 ? main_compute_A0_addr0 : + _guard390 ? read_channel_A0_mem_ref_addr0 : + _guard391 ? write_channel_A0_mem_ref_addr0 : 'x; assign internal_mem_A0_content_en = - _guard408 ? main_compute_A0_content_en : - _guard409 ? read_channel_A0_mem_ref_content_en : - _guard410 ? write_channel_A0_mem_ref_content_en : + _guard392 ? main_compute_A0_content_en : + _guard393 ? read_channel_A0_mem_ref_content_en : + _guard394 ? write_channel_A0_mem_ref_content_en : 1'd0; assign internal_mem_A0_reset = reset; -assign internal_mem_A0_write_data = - _guard411 ? main_compute_A0_write_data : - _guard412 ? read_channel_A0_mem_ref_write_data : - _guard413 ? write_channel_A0_mem_ref_write_data : - 'x; +assign internal_mem_A0_write_data = read_channel_A0_mem_ref_write_data; assign write_channel_B0_WREADY = - _guard414 ? B0_WREADY : + _guard396 ? B0_WREADY : 1'd0; assign write_channel_B0_curr_addr_internal_mem_out = - _guard415 ? curr_addr_internal_mem_B0_out : + _guard397 ? curr_addr_internal_mem_B0_out : 3'd0; assign write_channel_B0_curr_addr_axi_out = - _guard416 ? curr_addr_axi_B0_out : + _guard398 ? curr_addr_axi_B0_out : 64'd0; assign write_channel_B0_max_transfers_out = - _guard417 ? max_transfers_B0_out : + _guard399 ? max_transfers_B0_out : 8'd0; -assign write_channel_B0_max_transfers_done = - _guard418 ? max_transfers_B0_done : - 1'd0; assign write_channel_B0_clk = clk; assign write_channel_B0_mem_ref_read_data = - _guard419 ? internal_mem_B0_read_data : + _guard400 ? internal_mem_B0_read_data : 32'd0; -assign write_channel_B0_go = _guard420; +assign write_channel_B0_go = _guard401; assign write_channel_B0_reset = reset; -assign write_channel_B0_mem_ref_done = - _guard421 ? internal_mem_B0_done : - 1'd0; assign write_channel_B0_ARESETn = - _guard422 ? B0_ARESETn : + _guard402 ? B0_ARESETn : 1'd0; assign write_channel_B0_curr_addr_internal_mem_done = - _guard423 ? curr_addr_internal_mem_B0_done : + _guard403 ? curr_addr_internal_mem_B0_done : 1'd0; assign write_channel_B0_curr_addr_axi_done = - _guard424 ? curr_addr_axi_B0_done : + _guard404 ? curr_addr_axi_B0_done : 1'd0; assign curr_addr_axi_Sum0_write_en = - _guard425 ? read_channel_Sum0_curr_addr_axi_write_en : - _guard428 ? 1'd1 : - _guard429 ? ar_channel_Sum0_curr_addr_axi_write_en : - _guard430 ? aw_channel_Sum0_curr_addr_axi_write_en : - _guard431 ? write_channel_Sum0_curr_addr_axi_write_en : + _guard405 ? read_channel_Sum0_curr_addr_axi_write_en : + _guard408 ? 1'd1 : + _guard409 ? write_channel_Sum0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_Sum0_clk = clk; assign curr_addr_axi_Sum0_reset = reset; assign curr_addr_axi_Sum0_in = - _guard432 ? read_channel_Sum0_curr_addr_axi_in : - _guard433 ? ar_channel_Sum0_curr_addr_axi_in : - _guard436 ? 64'd4096 : - _guard437 ? aw_channel_Sum0_curr_addr_axi_in : - _guard438 ? write_channel_Sum0_curr_addr_axi_in : + _guard410 ? read_channel_Sum0_curr_addr_axi_in : + _guard413 ? 64'd4096 : + _guard414 ? write_channel_Sum0_curr_addr_axi_in : 'x; assign ar_channel_Sum0_curr_addr_axi_out = - _guard439 ? curr_addr_axi_Sum0_out : + _guard415 ? curr_addr_axi_Sum0_out : 64'd0; assign ar_channel_Sum0_clk = clk; -assign ar_channel_Sum0_go = _guard440; +assign ar_channel_Sum0_go = _guard416; assign ar_channel_Sum0_reset = reset; assign ar_channel_Sum0_ARREADY = - _guard441 ? Sum0_ARREADY : + _guard417 ? Sum0_ARREADY : 1'd0; assign ar_channel_Sum0_ARESETn = - _guard442 ? Sum0_ARESETn : - 1'd0; -assign ar_channel_Sum0_curr_addr_axi_done = - _guard443 ? curr_addr_axi_Sum0_done : + _guard418 ? Sum0_ARESETn : 1'd0; -assign pd1_write_en = _guard452; +assign pd1_write_en = _guard427; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard455 ? 1'd1 : - _guard460 ? 1'd0 : + _guard430 ? 1'd1 : + _guard435 ? 1'd0 : 1'd0; assign early_reset_static_par0_done_in = ud0_out; -assign wrapper_early_reset_static_par_done_in = _guard463; -assign tdcc_go_in = _guard469; -assign invoke12_go_in = _guard475; +assign wrapper_early_reset_static_par_done_in = _guard438; +assign tdcc_go_in = _guard444; +assign invoke12_go_in = _guard450; assign invoke16_done_in = aw_channel_A0_done; assign invoke18_done_in = bresp_channel_A0_done; assign invoke23_done_in = write_channel_Sum0_done; -assign tdcc3_go_in = _guard481; -assign tdcc3_done_in = _guard482; +assign tdcc3_go_in = _guard456; +assign tdcc3_done_in = _guard457; assign aw_channel_B0_curr_addr_axi_out = - _guard483 ? curr_addr_axi_B0_out : + _guard458 ? curr_addr_axi_B0_out : 64'd0; -assign aw_channel_B0_max_transfers_out = - _guard484 ? max_transfers_B0_out : - 8'd0; -assign aw_channel_B0_max_transfers_done = - _guard485 ? max_transfers_B0_done : - 1'd0; assign aw_channel_B0_clk = clk; assign aw_channel_B0_AWREADY = - _guard486 ? B0_AWREADY : + _guard459 ? B0_AWREADY : 1'd0; -assign aw_channel_B0_go = _guard487; +assign aw_channel_B0_go = _guard460; assign aw_channel_B0_reset = reset; assign aw_channel_B0_ARESETn = - _guard488 ? B0_ARESETn : - 1'd0; -assign aw_channel_B0_curr_addr_axi_done = - _guard489 ? curr_addr_axi_B0_done : + _guard461 ? B0_ARESETn : 1'd0; -assign fsm0_write_en = _guard502; +assign fsm0_write_en = _guard474; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard507 ? 2'd1 : - _guard508 ? 2'd0 : - _guard513 ? 2'd2 : + _guard479 ? 2'd1 : + _guard480 ? 2'd0 : + _guard485 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard526; +assign fsm2_write_en = _guard498; assign fsm2_clk = clk; assign fsm2_reset = reset; assign fsm2_in = - _guard531 ? 2'd1 : - _guard532 ? 2'd0 : - _guard537 ? 2'd2 : + _guard503 ? 2'd1 : + _guard504 ? 2'd0 : + _guard509 ? 2'd2 : 2'd0; -assign invoke8_go_in = _guard543; +assign invoke8_go_in = _guard515; assign invoke10_done_in = ar_channel_Sum0_done; -assign tdcc0_go_in = _guard549; +assign tdcc0_go_in = _guard521; assign ar_channel_A0_curr_addr_axi_out = - _guard550 ? curr_addr_axi_A0_out : + _guard522 ? curr_addr_axi_A0_out : 64'd0; assign ar_channel_A0_clk = clk; -assign ar_channel_A0_go = _guard551; +assign ar_channel_A0_go = _guard523; assign ar_channel_A0_reset = reset; assign ar_channel_A0_ARREADY = - _guard552 ? A0_ARREADY : + _guard524 ? A0_ARREADY : 1'd0; assign ar_channel_A0_ARESETn = - _guard553 ? A0_ARESETn : - 1'd0; -assign ar_channel_A0_curr_addr_axi_done = - _guard554 ? curr_addr_axi_A0_done : + _guard525 ? A0_ARESETn : 1'd0; assign aw_channel_A0_curr_addr_axi_out = - _guard555 ? curr_addr_axi_A0_out : + _guard526 ? curr_addr_axi_A0_out : 64'd0; -assign aw_channel_A0_max_transfers_out = - _guard556 ? max_transfers_A0_out : - 8'd0; -assign aw_channel_A0_max_transfers_done = - _guard557 ? max_transfers_A0_done : - 1'd0; assign aw_channel_A0_clk = clk; assign aw_channel_A0_AWREADY = - _guard558 ? A0_AWREADY : + _guard527 ? A0_AWREADY : 1'd0; -assign aw_channel_A0_go = _guard559; +assign aw_channel_A0_go = _guard528; assign aw_channel_A0_reset = reset; assign aw_channel_A0_ARESETn = - _guard560 ? A0_ARESETn : - 1'd0; -assign aw_channel_A0_curr_addr_axi_done = - _guard561 ? curr_addr_axi_A0_done : + _guard529 ? A0_ARESETn : 1'd0; -assign par0_done_in = _guard566; +assign par0_done_in = _guard534; assign invoke8_done_in = ar_channel_B0_done; assign invoke12_done_in = main_compute_done; -assign invoke17_go_in = _guard572; -assign invoke21_go_in = _guard578; +assign invoke17_go_in = _guard540; +assign invoke21_go_in = _guard546; assign adder0_left = - _guard579 ? fsm_out : + _guard547 ? fsm_out : 1'd0; -assign adder0_right = _guard580; -assign pd2_write_en = _guard589; +assign adder0_right = _guard548; +assign pd2_write_en = _guard557; assign pd2_clk = clk; assign pd2_reset = reset; assign pd2_in = - _guard592 ? 1'd1 : - _guard597 ? 1'd0 : + _guard560 ? 1'd1 : + _guard565 ? 1'd0 : 1'd0; assign early_reset_static_par_done_in = ud_out; assign invoke6_done_in = ar_channel_A0_done; -assign invoke16_go_in = _guard603; +assign invoke16_go_in = _guard571; assign invoke19_done_in = aw_channel_B0_done; assign write_channel_A0_WREADY = - _guard604 ? A0_WREADY : + _guard572 ? A0_WREADY : 1'd0; assign write_channel_A0_curr_addr_internal_mem_out = - _guard605 ? curr_addr_internal_mem_A0_out : + _guard573 ? curr_addr_internal_mem_A0_out : 3'd0; assign write_channel_A0_curr_addr_axi_out = - _guard606 ? curr_addr_axi_A0_out : + _guard574 ? curr_addr_axi_A0_out : 64'd0; assign write_channel_A0_max_transfers_out = - _guard607 ? max_transfers_A0_out : + _guard575 ? max_transfers_A0_out : 8'd0; -assign write_channel_A0_max_transfers_done = - _guard608 ? max_transfers_A0_done : - 1'd0; assign write_channel_A0_clk = clk; assign write_channel_A0_mem_ref_read_data = - _guard609 ? internal_mem_A0_read_data : + _guard576 ? internal_mem_A0_read_data : 32'd0; -assign write_channel_A0_go = _guard610; +assign write_channel_A0_go = _guard577; assign write_channel_A0_reset = reset; -assign write_channel_A0_mem_ref_done = - _guard611 ? internal_mem_A0_done : - 1'd0; assign write_channel_A0_ARESETn = - _guard612 ? A0_ARESETn : + _guard578 ? A0_ARESETn : 1'd0; assign write_channel_A0_curr_addr_internal_mem_done = - _guard613 ? curr_addr_internal_mem_A0_done : + _guard579 ? curr_addr_internal_mem_A0_done : 1'd0; assign write_channel_A0_curr_addr_axi_done = - _guard614 ? curr_addr_axi_A0_done : + _guard580 ? curr_addr_axi_A0_done : 1'd0; assign ar_channel_B0_curr_addr_axi_out = - _guard615 ? curr_addr_axi_B0_out : + _guard581 ? curr_addr_axi_B0_out : 64'd0; assign ar_channel_B0_clk = clk; -assign ar_channel_B0_go = _guard616; +assign ar_channel_B0_go = _guard582; assign ar_channel_B0_reset = reset; assign ar_channel_B0_ARREADY = - _guard617 ? B0_ARREADY : + _guard583 ? B0_ARREADY : 1'd0; assign ar_channel_B0_ARESETn = - _guard618 ? B0_ARESETn : - 1'd0; -assign ar_channel_B0_curr_addr_axi_done = - _guard619 ? curr_addr_axi_B0_done : + _guard584 ? B0_ARESETn : 1'd0; -assign signal_reg_write_en = _guard636; +assign signal_reg_write_en = _guard601; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard649 ? 1'd1 : - _guard652 ? 1'd0 : + _guard614 ? 1'd1 : + _guard617 ? 1'd0 : 1'd0; assign invoke24_done_in = bresp_channel_Sum0_done; -assign tdcc1_done_in = _guard653; -assign par1_done_in = _guard658; +assign tdcc1_done_in = _guard618; +assign par1_done_in = _guard623; assign bresp_channel_B0_clk = clk; -assign bresp_channel_B0_go = _guard659; +assign bresp_channel_B0_go = _guard624; assign bresp_channel_B0_reset = reset; assign bresp_channel_B0_BVALID = - _guard660 ? B0_BVALID : + _guard625 ? B0_BVALID : 1'd0; assign internal_mem_Sum0_write_en = - _guard661 ? read_channel_Sum0_mem_ref_write_en : - _guard662 ? main_compute_Sum0_write_en : - _guard663 ? write_channel_Sum0_mem_ref_write_en : + _guard626 ? read_channel_Sum0_mem_ref_write_en : + _guard627 ? main_compute_Sum0_write_en : + _guard628 ? write_channel_Sum0_mem_ref_write_en : 1'd0; assign internal_mem_Sum0_clk = clk; assign internal_mem_Sum0_addr0 = - _guard664 ? read_channel_Sum0_mem_ref_addr0 : - _guard665 ? main_compute_Sum0_addr0 : - _guard666 ? write_channel_Sum0_mem_ref_addr0 : + _guard629 ? read_channel_Sum0_mem_ref_addr0 : + _guard630 ? main_compute_Sum0_addr0 : + _guard631 ? write_channel_Sum0_mem_ref_addr0 : 'x; assign internal_mem_Sum0_content_en = - _guard667 ? read_channel_Sum0_mem_ref_content_en : - _guard668 ? main_compute_Sum0_content_en : - _guard669 ? write_channel_Sum0_mem_ref_content_en : + _guard632 ? read_channel_Sum0_mem_ref_content_en : + _guard633 ? main_compute_Sum0_content_en : + _guard634 ? write_channel_Sum0_mem_ref_content_en : 1'd0; assign internal_mem_Sum0_reset = reset; assign internal_mem_Sum0_write_data = - _guard670 ? read_channel_Sum0_mem_ref_write_data : - _guard671 ? main_compute_Sum0_write_data : - _guard672 ? write_channel_Sum0_mem_ref_write_data : + _guard635 ? read_channel_Sum0_mem_ref_write_data : + _guard636 ? main_compute_Sum0_write_data : 'x; -assign pd_write_en = _guard681; +assign pd_write_en = _guard645; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard684 ? 1'd1 : - _guard689 ? 1'd0 : + _guard648 ? 1'd1 : + _guard653 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard698; +assign pd0_write_en = _guard662; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard701 ? 1'd1 : - _guard706 ? 1'd0 : + _guard665 ? 1'd1 : + _guard670 ? 1'd0 : 1'd0; -assign pd4_write_en = _guard715; +assign pd4_write_en = _guard679; assign pd4_clk = clk; assign pd4_reset = reset; assign pd4_in = - _guard718 ? 1'd1 : - _guard723 ? 1'd0 : + _guard682 ? 1'd1 : + _guard687 ? 1'd0 : 1'd0; assign invoke22_done_in = aw_channel_Sum0_done; -assign tdcc4_go_in = _guard729; +assign tdcc4_go_in = _guard693; assign bresp_channel_A0_clk = clk; -assign bresp_channel_A0_go = _guard730; +assign bresp_channel_A0_go = _guard694; assign bresp_channel_A0_reset = reset; assign bresp_channel_A0_BVALID = - _guard731 ? A0_BVALID : + _guard695 ? A0_BVALID : 1'd0; -assign wrapper_early_reset_static_par0_go_in = _guard737; -assign wrapper_early_reset_static_par0_done_in = _guard740; -assign tdcc_done_in = _guard741; +assign wrapper_early_reset_static_par0_go_in = _guard701; +assign wrapper_early_reset_static_par0_done_in = _guard704; +assign tdcc_done_in = _guard705; assign invoke17_done_in = write_channel_A0_done; -assign invoke19_go_in = _guard747; -assign invoke20_go_in = _guard753; +assign invoke19_go_in = _guard711; +assign invoke20_go_in = _guard717; assign invoke21_done_in = bresp_channel_B0_done; assign max_transfers_A0_write_en = - _guard754 ? aw_channel_A0_max_transfers_write_en : - _guard755 ? write_channel_A0_max_transfers_write_en : + _guard718 ? aw_channel_A0_max_transfers_write_en : 1'd0; assign max_transfers_A0_clk = clk; assign max_transfers_A0_reset = reset; -assign max_transfers_A0_in = - _guard756 ? aw_channel_A0_max_transfers_in : - _guard757 ? write_channel_A0_max_transfers_in : - 'x; +assign max_transfers_A0_in = aw_channel_A0_max_transfers_in; assign aw_channel_Sum0_curr_addr_axi_out = - _guard758 ? curr_addr_axi_Sum0_out : + _guard720 ? curr_addr_axi_Sum0_out : 64'd0; -assign aw_channel_Sum0_max_transfers_out = - _guard759 ? max_transfers_Sum0_out : - 8'd0; -assign aw_channel_Sum0_max_transfers_done = - _guard760 ? max_transfers_Sum0_done : - 1'd0; assign aw_channel_Sum0_clk = clk; assign aw_channel_Sum0_AWREADY = - _guard761 ? Sum0_AWREADY : + _guard721 ? Sum0_AWREADY : 1'd0; -assign aw_channel_Sum0_go = _guard762; +assign aw_channel_Sum0_go = _guard722; assign aw_channel_Sum0_reset = reset; assign aw_channel_Sum0_ARESETn = - _guard763 ? Sum0_ARESETn : - 1'd0; -assign aw_channel_Sum0_curr_addr_axi_done = - _guard764 ? curr_addr_axi_Sum0_done : + _guard723 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_WREADY = - _guard765 ? Sum0_WREADY : + _guard724 ? Sum0_WREADY : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_out = - _guard766 ? curr_addr_internal_mem_Sum0_out : + _guard725 ? curr_addr_internal_mem_Sum0_out : 3'd0; assign write_channel_Sum0_curr_addr_axi_out = - _guard767 ? curr_addr_axi_Sum0_out : + _guard726 ? curr_addr_axi_Sum0_out : 64'd0; assign write_channel_Sum0_max_transfers_out = - _guard768 ? max_transfers_Sum0_out : + _guard727 ? max_transfers_Sum0_out : 8'd0; -assign write_channel_Sum0_max_transfers_done = - _guard769 ? max_transfers_Sum0_done : - 1'd0; assign write_channel_Sum0_clk = clk; assign write_channel_Sum0_mem_ref_read_data = - _guard770 ? internal_mem_Sum0_read_data : + _guard728 ? internal_mem_Sum0_read_data : 32'd0; -assign write_channel_Sum0_go = _guard771; +assign write_channel_Sum0_go = _guard729; assign write_channel_Sum0_reset = reset; -assign write_channel_Sum0_mem_ref_done = - _guard772 ? internal_mem_Sum0_done : - 1'd0; assign write_channel_Sum0_ARESETn = - _guard773 ? Sum0_ARESETn : + _guard730 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_done = - _guard774 ? curr_addr_internal_mem_Sum0_done : + _guard731 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign write_channel_Sum0_curr_addr_axi_done = - _guard775 ? curr_addr_axi_Sum0_done : + _guard732 ? curr_addr_axi_Sum0_done : 1'd0; -assign pd3_write_en = _guard784; +assign pd3_write_en = _guard741; assign pd3_clk = clk; assign pd3_reset = reset; assign pd3_in = - _guard787 ? 1'd1 : - _guard792 ? 1'd0 : + _guard744 ? 1'd1 : + _guard749 ? 1'd0 : 1'd0; -assign early_reset_static_par_go_in = _guard793; -assign tdcc4_done_in = _guard794; +assign early_reset_static_par_go_in = _guard750; +assign tdcc4_done_in = _guard751; assign max_transfers_B0_write_en = - _guard795 ? write_channel_B0_max_transfers_write_en : - _guard796 ? aw_channel_B0_max_transfers_write_en : + _guard752 ? aw_channel_B0_max_transfers_write_en : 1'd0; assign max_transfers_B0_clk = clk; assign max_transfers_B0_reset = reset; -assign max_transfers_B0_in = - _guard797 ? write_channel_B0_max_transfers_in : - _guard798 ? aw_channel_B0_max_transfers_in : - 'x; +assign max_transfers_B0_in = aw_channel_B0_max_transfers_in; assign curr_addr_internal_mem_Sum0_write_en = - _guard799 ? read_channel_Sum0_curr_addr_internal_mem_write_en : - _guard800 ? 1'd1 : - _guard801 ? write_channel_Sum0_curr_addr_internal_mem_write_en : + _guard754 ? read_channel_Sum0_curr_addr_internal_mem_write_en : + _guard755 ? 1'd1 : + _guard756 ? write_channel_Sum0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_Sum0_clk = clk; assign curr_addr_internal_mem_Sum0_reset = reset; assign curr_addr_internal_mem_Sum0_in = - _guard802 ? read_channel_Sum0_curr_addr_internal_mem_in : - _guard803 ? write_channel_Sum0_curr_addr_internal_mem_in : - _guard804 ? 3'd0 : + _guard757 ? read_channel_Sum0_curr_addr_internal_mem_in : + _guard758 ? write_channel_Sum0_curr_addr_internal_mem_in : + _guard759 ? 3'd0 : 'x; -assign invoke6_go_in = _guard810; -assign invoke24_go_in = _guard816; -assign tdcc1_go_in = _guard822; -assign par0_go_in = _guard828; -assign invoke7_go_in = _guard834; -assign invoke10_go_in = _guard840; -assign invoke22_go_in = _guard846; +assign invoke6_go_in = _guard765; +assign invoke24_go_in = _guard771; +assign tdcc1_go_in = _guard777; +assign par0_go_in = _guard783; +assign invoke7_go_in = _guard789; +assign invoke10_go_in = _guard795; +assign invoke22_go_in = _guard801; assign tdcc5_go_in = go; -assign tdcc5_done_in = _guard847; +assign tdcc5_done_in = _guard802; // COMPONENT END: wrapper endmodule module main( diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v index 2577b638fb..8baa0b908c 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v @@ -1140,16 +1140,6 @@ module std_le #( assign out = left <= right; endmodule -module std_lsh #( - parameter WIDTH = 32 -) ( - input wire logic [WIDTH-1:0] left, - input wire logic [WIDTH-1:0] right, - output logic [WIDTH-1:0] out -); - assign out = left << right; -endmodule - module std_rsh #( parameter WIDTH = 32 ) ( @@ -1234,6 +1224,16 @@ module std_add #( assign out = left + right; endmodule +module std_lsh #( + parameter WIDTH = 32 +) ( + input wire logic [WIDTH-1:0] left, + input wire logic [WIDTH-1:0] right, + output logic [WIDTH-1:0] out +); +assign out = left << right; +endmodule + module std_reg #( parameter WIDTH = 32 ) ( @@ -1255,6 +1255,27 @@ always_ff @(posedge clk) begin end endmodule +module init_one_reg #( + parameter WIDTH = 32 +) ( + input wire logic [WIDTH-1:0] in, + input wire logic write_en, + input wire logic clk, + input wire logic reset, + output logic [WIDTH-1:0] out, + output logic done +); +always_ff @(posedge clk) begin + if (reset) begin + out <= 1; + done <= 0; + end else if (write_en) begin + out <= in; + done <= 1'd1; + end else done <= 1'd0; + end +endmodule + module m_ar_channel( input logic ARESETn, input logic ARREADY, @@ -1323,22 +1344,22 @@ logic fsm_clk; logic fsm_reset; logic fsm_out; logic fsm_done; -logic ud_out; logic adder_left; logic adder_right; logic adder_out; -logic ud0_out; logic adder0_left; logic adder0_right; logic adder0_out; -logic ud1_out; logic adder1_left; logic adder1_right; logic adder1_out; -logic ud2_out; logic adder2_left; logic adder2_right; logic adder2_out; +logic ud_out; +logic ud0_out; +logic ud1_out; +logic ud2_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; @@ -1481,11 +1502,6 @@ std_reg # ( .reset(fsm_reset), .write_en(fsm_write_en) ); -undef # ( - .WIDTH(1) -) ud ( - .out(ud_out) -); std_add # ( .WIDTH(1) ) adder ( @@ -1493,11 +1509,6 @@ std_add # ( .out(adder_out), .right(adder_right) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); std_add # ( .WIDTH(1) ) adder0 ( @@ -1505,11 +1516,6 @@ std_add # ( .out(adder0_out), .right(adder0_right) ); -undef # ( - .WIDTH(1) -) ud1 ( - .out(ud1_out) -); std_add # ( .WIDTH(1) ) adder1 ( @@ -1517,11 +1523,6 @@ std_add # ( .out(adder1_out), .right(adder1_right) ); -undef # ( - .WIDTH(1) -) ud2 ( - .out(ud2_out) -); std_add # ( .WIDTH(1) ) adder2 ( @@ -1529,6 +1530,26 @@ std_add # ( .out(adder2_out), .right(adder2_right) ); +undef # ( + .WIDTH(1) +) ud ( + .out(ud_out) +); +undef # ( + .WIDTH(1) +) ud0 ( + .out(ud0_out) +); +undef # ( + .WIDTH(1) +) ud1 ( + .out(ud1_out) +); +undef # ( + .WIDTH(1) +) ud2 ( + .out(ud2_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -1691,322 +1712,326 @@ wire _guard18 = early_reset_static_par0_go_out; wire _guard19 = _guard17 | _guard18; wire _guard20 = early_reset_static_par1_go_out; wire _guard21 = _guard19 | _guard20; -wire _guard22 = fsm_out != 1'd0; -wire _guard23 = early_reset_static_par0_go_out; -wire _guard24 = _guard22 & _guard23; -wire _guard25 = fsm_out != 1'd0; -wire _guard26 = early_reset_perform_reads_group0_go_out; -wire _guard27 = _guard25 & _guard26; -wire _guard28 = fsm_out != 1'd0; -wire _guard29 = early_reset_static_par1_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = fsm_out == 1'd0; -wire _guard32 = early_reset_perform_reads_group0_go_out; +wire _guard22 = fsm_out == 1'd0; +wire _guard23 = ~_guard22; +wire _guard24 = early_reset_static_par0_go_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = fsm_out == 1'd0; +wire _guard27 = ~_guard26; +wire _guard28 = early_reset_perform_reads_group0_go_out; +wire _guard29 = _guard27 & _guard28; +wire _guard30 = fsm_out == 1'd0; +wire _guard31 = ~_guard30; +wire _guard32 = early_reset_static_par1_go_out; wire _guard33 = _guard31 & _guard32; wire _guard34 = fsm_out == 1'd0; -wire _guard35 = early_reset_static_par_go_out; +wire _guard35 = early_reset_perform_reads_group0_go_out; wire _guard36 = _guard34 & _guard35; -wire _guard37 = _guard33 | _guard36; -wire _guard38 = fsm_out == 1'd0; -wire _guard39 = early_reset_static_par0_go_out; -wire _guard40 = _guard38 & _guard39; -wire _guard41 = _guard37 | _guard40; -wire _guard42 = fsm_out == 1'd0; -wire _guard43 = early_reset_static_par1_go_out; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = _guard41 | _guard44; -wire _guard46 = fsm_out != 1'd0; -wire _guard47 = early_reset_static_par_go_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = early_reset_perform_reads_group0_go_out; -wire _guard50 = early_reset_perform_reads_group0_go_out; -wire _guard51 = wrapper_early_reset_static_par0_go_out; -wire _guard52 = fsm_out == 1'd0; -wire _guard53 = signal_reg_out; -wire _guard54 = _guard52 & _guard53; -wire _guard55 = ar_handshake_occurred_out; -wire _guard56 = ~_guard55; -wire _guard57 = do_ar_transfer_go_out; +wire _guard37 = fsm_out == 1'd0; +wire _guard38 = early_reset_static_par_go_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = _guard36 | _guard39; +wire _guard41 = fsm_out == 1'd0; +wire _guard42 = early_reset_static_par0_go_out; +wire _guard43 = _guard41 & _guard42; +wire _guard44 = _guard40 | _guard43; +wire _guard45 = fsm_out == 1'd0; +wire _guard46 = early_reset_static_par1_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = _guard44 | _guard47; +wire _guard49 = fsm_out == 1'd0; +wire _guard50 = ~_guard49; +wire _guard51 = early_reset_static_par_go_out; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = early_reset_perform_reads_group0_go_out; +wire _guard54 = early_reset_perform_reads_group0_go_out; +wire _guard55 = wrapper_early_reset_static_par0_go_out; +wire _guard56 = fsm_out == 1'd0; +wire _guard57 = signal_reg_out; wire _guard58 = _guard56 & _guard57; -wire _guard59 = early_reset_static_par0_go_out; -wire _guard60 = _guard58 | _guard59; -wire _guard61 = arvalid_out; -wire _guard62 = ARREADY; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = do_ar_transfer_go_out; -wire _guard65 = _guard63 & _guard64; -wire _guard66 = early_reset_static_par0_go_out; -wire _guard67 = early_reset_perform_reads_group0_go_out; -wire _guard68 = early_reset_perform_reads_group0_go_out; -wire _guard69 = early_reset_perform_reads_group0_go_out; -wire _guard70 = early_reset_perform_reads_group0_go_out; -wire _guard71 = early_reset_static_par_go_out; -wire _guard72 = early_reset_static_par_go_out; -wire _guard73 = wrapper_early_reset_static_par1_go_out; -wire _guard74 = wrapper_early_reset_static_par_done_out; -wire _guard75 = ~_guard74; -wire _guard76 = fsm0_out == 3'd0; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; -wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm_out == 1'd0; -wire _guard81 = signal_reg_out; -wire _guard82 = _guard80 & _guard81; -wire _guard83 = early_reset_static_par_go_out; -wire _guard84 = early_reset_static_par1_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = early_reset_static_par_go_out; -wire _guard87 = early_reset_static_par1_go_out; -wire _guard88 = fsm_out == 1'd0; -wire _guard89 = signal_reg_out; -wire _guard90 = _guard88 & _guard89; +wire _guard59 = ar_handshake_occurred_out; +wire _guard60 = ~_guard59; +wire _guard61 = do_ar_transfer_go_out; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = early_reset_static_par0_go_out; +wire _guard64 = _guard62 | _guard63; +wire _guard65 = arvalid_out; +wire _guard66 = ARREADY; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = do_ar_transfer_go_out; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = early_reset_static_par0_go_out; +wire _guard71 = early_reset_perform_reads_group0_go_out; +wire _guard72 = early_reset_perform_reads_group0_go_out; +wire _guard73 = early_reset_perform_reads_group0_go_out; +wire _guard74 = early_reset_perform_reads_group0_go_out; +wire _guard75 = early_reset_static_par_go_out; +wire _guard76 = early_reset_static_par_go_out; +wire _guard77 = wrapper_early_reset_static_par1_go_out; +wire _guard78 = wrapper_early_reset_static_par_done_out; +wire _guard79 = ~_guard78; +wire _guard80 = fsm0_out == 3'd0; +wire _guard81 = _guard79 & _guard80; +wire _guard82 = tdcc_go_out; +wire _guard83 = _guard81 & _guard82; +wire _guard84 = fsm_out == 1'd0; +wire _guard85 = signal_reg_out; +wire _guard86 = _guard84 & _guard85; +wire _guard87 = early_reset_static_par_go_out; +wire _guard88 = early_reset_static_par1_go_out; +wire _guard89 = _guard87 | _guard88; +wire _guard90 = early_reset_static_par_go_out; wire _guard91 = early_reset_static_par1_go_out; -wire _guard92 = early_reset_static_par1_go_out; -wire _guard93 = fsm0_out == 3'd6; -wire _guard94 = fsm0_out == 3'd0; -wire _guard95 = wrapper_early_reset_static_par_done_out; -wire _guard96 = _guard94 & _guard95; -wire _guard97 = tdcc_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = _guard93 | _guard98; -wire _guard100 = fsm0_out == 3'd1; -wire _guard101 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard102 = comb_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = _guard100 & _guard103; -wire _guard105 = tdcc_go_out; -wire _guard106 = _guard104 & _guard105; -wire _guard107 = _guard99 | _guard106; -wire _guard108 = fsm0_out == 3'd5; -wire _guard109 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard110 = comb_reg_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = _guard108 & _guard111; -wire _guard113 = tdcc_go_out; -wire _guard114 = _guard112 & _guard113; -wire _guard115 = _guard107 | _guard114; -wire _guard116 = fsm0_out == 3'd2; -wire _guard117 = wrapper_early_reset_static_par0_done_out; +wire _guard92 = fsm_out == 1'd0; +wire _guard93 = signal_reg_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = early_reset_static_par1_go_out; +wire _guard96 = early_reset_static_par1_go_out; +wire _guard97 = fsm0_out == 3'd6; +wire _guard98 = fsm0_out == 3'd0; +wire _guard99 = wrapper_early_reset_static_par_done_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = tdcc_go_out; +wire _guard102 = _guard100 & _guard101; +wire _guard103 = _guard97 | _guard102; +wire _guard104 = fsm0_out == 3'd1; +wire _guard105 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard106 = comb_reg_out; +wire _guard107 = _guard105 & _guard106; +wire _guard108 = _guard104 & _guard107; +wire _guard109 = tdcc_go_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = _guard103 | _guard110; +wire _guard112 = fsm0_out == 3'd5; +wire _guard113 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard114 = comb_reg_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = _guard112 & _guard115; +wire _guard117 = tdcc_go_out; wire _guard118 = _guard116 & _guard117; -wire _guard119 = tdcc_go_out; -wire _guard120 = _guard118 & _guard119; -wire _guard121 = _guard115 | _guard120; -wire _guard122 = fsm0_out == 3'd3; -wire _guard123 = do_ar_transfer_done_out; +wire _guard119 = _guard111 | _guard118; +wire _guard120 = fsm0_out == 3'd2; +wire _guard121 = wrapper_early_reset_static_par0_done_out; +wire _guard122 = _guard120 & _guard121; +wire _guard123 = tdcc_go_out; wire _guard124 = _guard122 & _guard123; -wire _guard125 = tdcc_go_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = _guard121 | _guard126; -wire _guard128 = fsm0_out == 3'd4; -wire _guard129 = wrapper_early_reset_static_par1_done_out; +wire _guard125 = _guard119 | _guard124; +wire _guard126 = fsm0_out == 3'd3; +wire _guard127 = do_ar_transfer_done_out; +wire _guard128 = _guard126 & _guard127; +wire _guard129 = tdcc_go_out; wire _guard130 = _guard128 & _guard129; -wire _guard131 = tdcc_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = _guard127 | _guard132; -wire _guard134 = fsm0_out == 3'd1; -wire _guard135 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard136 = comb_reg_out; -wire _guard137 = ~_guard136; -wire _guard138 = _guard135 & _guard137; -wire _guard139 = _guard134 & _guard138; -wire _guard140 = tdcc_go_out; -wire _guard141 = _guard139 & _guard140; -wire _guard142 = _guard133 | _guard141; -wire _guard143 = fsm0_out == 3'd5; -wire _guard144 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard145 = comb_reg_out; -wire _guard146 = ~_guard145; -wire _guard147 = _guard144 & _guard146; -wire _guard148 = _guard143 & _guard147; -wire _guard149 = tdcc_go_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = _guard142 | _guard150; -wire _guard152 = fsm0_out == 3'd1; -wire _guard153 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard154 = comb_reg_out; -wire _guard155 = ~_guard154; -wire _guard156 = _guard153 & _guard155; -wire _guard157 = _guard152 & _guard156; -wire _guard158 = tdcc_go_out; -wire _guard159 = _guard157 & _guard158; -wire _guard160 = fsm0_out == 3'd5; -wire _guard161 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard162 = comb_reg_out; -wire _guard163 = ~_guard162; -wire _guard164 = _guard161 & _guard163; -wire _guard165 = _guard160 & _guard164; -wire _guard166 = tdcc_go_out; -wire _guard167 = _guard165 & _guard166; -wire _guard168 = _guard159 | _guard167; -wire _guard169 = fsm0_out == 3'd4; -wire _guard170 = wrapper_early_reset_static_par1_done_out; +wire _guard131 = _guard125 | _guard130; +wire _guard132 = fsm0_out == 3'd4; +wire _guard133 = wrapper_early_reset_static_par1_done_out; +wire _guard134 = _guard132 & _guard133; +wire _guard135 = tdcc_go_out; +wire _guard136 = _guard134 & _guard135; +wire _guard137 = _guard131 | _guard136; +wire _guard138 = fsm0_out == 3'd1; +wire _guard139 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard140 = comb_reg_out; +wire _guard141 = ~_guard140; +wire _guard142 = _guard139 & _guard141; +wire _guard143 = _guard138 & _guard142; +wire _guard144 = tdcc_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard137 | _guard145; +wire _guard147 = fsm0_out == 3'd5; +wire _guard148 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard149 = comb_reg_out; +wire _guard150 = ~_guard149; +wire _guard151 = _guard148 & _guard150; +wire _guard152 = _guard147 & _guard151; +wire _guard153 = tdcc_go_out; +wire _guard154 = _guard152 & _guard153; +wire _guard155 = _guard146 | _guard154; +wire _guard156 = fsm0_out == 3'd1; +wire _guard157 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard158 = comb_reg_out; +wire _guard159 = ~_guard158; +wire _guard160 = _guard157 & _guard159; +wire _guard161 = _guard156 & _guard160; +wire _guard162 = tdcc_go_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = fsm0_out == 3'd5; +wire _guard165 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard166 = comb_reg_out; +wire _guard167 = ~_guard166; +wire _guard168 = _guard165 & _guard167; +wire _guard169 = _guard164 & _guard168; +wire _guard170 = tdcc_go_out; wire _guard171 = _guard169 & _guard170; -wire _guard172 = tdcc_go_out; -wire _guard173 = _guard171 & _guard172; -wire _guard174 = fsm0_out == 3'd1; -wire _guard175 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard176 = comb_reg_out; +wire _guard172 = _guard163 | _guard171; +wire _guard173 = fsm0_out == 3'd4; +wire _guard174 = wrapper_early_reset_static_par1_done_out; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = tdcc_go_out; wire _guard177 = _guard175 & _guard176; -wire _guard178 = _guard174 & _guard177; -wire _guard179 = tdcc_go_out; -wire _guard180 = _guard178 & _guard179; -wire _guard181 = fsm0_out == 3'd5; -wire _guard182 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard183 = comb_reg_out; +wire _guard178 = fsm0_out == 3'd1; +wire _guard179 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard180 = comb_reg_out; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = _guard178 & _guard181; +wire _guard183 = tdcc_go_out; wire _guard184 = _guard182 & _guard183; -wire _guard185 = _guard181 & _guard184; -wire _guard186 = tdcc_go_out; -wire _guard187 = _guard185 & _guard186; -wire _guard188 = _guard180 | _guard187; -wire _guard189 = fsm0_out == 3'd3; -wire _guard190 = do_ar_transfer_done_out; +wire _guard185 = fsm0_out == 3'd5; +wire _guard186 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard187 = comb_reg_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = _guard185 & _guard188; +wire _guard190 = tdcc_go_out; wire _guard191 = _guard189 & _guard190; -wire _guard192 = tdcc_go_out; -wire _guard193 = _guard191 & _guard192; -wire _guard194 = fsm0_out == 3'd0; -wire _guard195 = wrapper_early_reset_static_par_done_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = tdcc_go_out; -wire _guard198 = _guard196 & _guard197; -wire _guard199 = fsm0_out == 3'd6; -wire _guard200 = fsm0_out == 3'd2; -wire _guard201 = wrapper_early_reset_static_par0_done_out; +wire _guard192 = _guard184 | _guard191; +wire _guard193 = fsm0_out == 3'd3; +wire _guard194 = do_ar_transfer_done_out; +wire _guard195 = _guard193 & _guard194; +wire _guard196 = tdcc_go_out; +wire _guard197 = _guard195 & _guard196; +wire _guard198 = fsm0_out == 3'd0; +wire _guard199 = wrapper_early_reset_static_par_done_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = tdcc_go_out; wire _guard202 = _guard200 & _guard201; -wire _guard203 = tdcc_go_out; -wire _guard204 = _guard202 & _guard203; -wire _guard205 = early_reset_static_par_go_out; -wire _guard206 = early_reset_static_par_go_out; -wire _guard207 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard208 = ~_guard207; -wire _guard209 = fsm0_out == 3'd1; -wire _guard210 = _guard208 & _guard209; -wire _guard211 = tdcc_go_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard214 = ~_guard213; -wire _guard215 = fsm0_out == 3'd5; +wire _guard203 = fsm0_out == 3'd6; +wire _guard204 = fsm0_out == 3'd2; +wire _guard205 = wrapper_early_reset_static_par0_done_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = tdcc_go_out; +wire _guard208 = _guard206 & _guard207; +wire _guard209 = early_reset_static_par_go_out; +wire _guard210 = early_reset_static_par_go_out; +wire _guard211 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard212 = ~_guard211; +wire _guard213 = fsm0_out == 3'd1; +wire _guard214 = _guard212 & _guard213; +wire _guard215 = tdcc_go_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = tdcc_go_out; -wire _guard218 = _guard216 & _guard217; -wire _guard219 = _guard212 | _guard218; -wire _guard220 = do_ar_transfer_go_out; -wire _guard221 = early_reset_static_par0_go_out; -wire _guard222 = _guard220 | _guard221; -wire _guard223 = ARREADY; -wire _guard224 = arvalid_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = do_ar_transfer_go_out; -wire _guard227 = _guard225 & _guard226; -wire _guard228 = ARREADY; -wire _guard229 = arvalid_out; -wire _guard230 = _guard228 & _guard229; -wire _guard231 = ~_guard230; -wire _guard232 = do_ar_transfer_go_out; -wire _guard233 = _guard231 & _guard232; -wire _guard234 = early_reset_static_par0_go_out; -wire _guard235 = _guard233 | _guard234; -wire _guard236 = fsm_out == 1'd0; -wire _guard237 = signal_reg_out; -wire _guard238 = _guard236 & _guard237; -wire _guard239 = fsm_out == 1'd0; -wire _guard240 = signal_reg_out; -wire _guard241 = ~_guard240; -wire _guard242 = _guard239 & _guard241; -wire _guard243 = wrapper_early_reset_static_par_go_out; -wire _guard244 = _guard242 & _guard243; -wire _guard245 = _guard238 | _guard244; -wire _guard246 = fsm_out == 1'd0; -wire _guard247 = signal_reg_out; -wire _guard248 = ~_guard247; -wire _guard249 = _guard246 & _guard248; -wire _guard250 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard251 = _guard249 & _guard250; -wire _guard252 = _guard245 | _guard251; -wire _guard253 = fsm_out == 1'd0; -wire _guard254 = signal_reg_out; -wire _guard255 = ~_guard254; -wire _guard256 = _guard253 & _guard255; -wire _guard257 = wrapper_early_reset_static_par0_go_out; -wire _guard258 = _guard256 & _guard257; -wire _guard259 = _guard252 | _guard258; -wire _guard260 = fsm_out == 1'd0; -wire _guard261 = signal_reg_out; -wire _guard262 = ~_guard261; -wire _guard263 = _guard260 & _guard262; -wire _guard264 = wrapper_early_reset_static_par1_go_out; -wire _guard265 = _guard263 & _guard264; -wire _guard266 = _guard259 | _guard265; -wire _guard267 = fsm_out == 1'd0; -wire _guard268 = signal_reg_out; -wire _guard269 = ~_guard268; -wire _guard270 = _guard267 & _guard269; -wire _guard271 = wrapper_early_reset_static_par_go_out; -wire _guard272 = _guard270 & _guard271; -wire _guard273 = fsm_out == 1'd0; -wire _guard274 = signal_reg_out; -wire _guard275 = ~_guard274; -wire _guard276 = _guard273 & _guard275; -wire _guard277 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard278 = _guard276 & _guard277; -wire _guard279 = _guard272 | _guard278; -wire _guard280 = fsm_out == 1'd0; -wire _guard281 = signal_reg_out; -wire _guard282 = ~_guard281; -wire _guard283 = _guard280 & _guard282; -wire _guard284 = wrapper_early_reset_static_par0_go_out; -wire _guard285 = _guard283 & _guard284; -wire _guard286 = _guard279 | _guard285; -wire _guard287 = fsm_out == 1'd0; -wire _guard288 = signal_reg_out; -wire _guard289 = ~_guard288; -wire _guard290 = _guard287 & _guard289; -wire _guard291 = wrapper_early_reset_static_par1_go_out; -wire _guard292 = _guard290 & _guard291; -wire _guard293 = _guard286 | _guard292; -wire _guard294 = fsm_out == 1'd0; -wire _guard295 = signal_reg_out; +wire _guard217 = wrapper_early_reset_perform_reads_group0_done_out; +wire _guard218 = ~_guard217; +wire _guard219 = fsm0_out == 3'd5; +wire _guard220 = _guard218 & _guard219; +wire _guard221 = tdcc_go_out; +wire _guard222 = _guard220 & _guard221; +wire _guard223 = _guard216 | _guard222; +wire _guard224 = do_ar_transfer_go_out; +wire _guard225 = early_reset_static_par0_go_out; +wire _guard226 = _guard224 | _guard225; +wire _guard227 = ARREADY; +wire _guard228 = arvalid_out; +wire _guard229 = _guard227 & _guard228; +wire _guard230 = do_ar_transfer_go_out; +wire _guard231 = _guard229 & _guard230; +wire _guard232 = ARREADY; +wire _guard233 = arvalid_out; +wire _guard234 = _guard232 & _guard233; +wire _guard235 = ~_guard234; +wire _guard236 = do_ar_transfer_go_out; +wire _guard237 = _guard235 & _guard236; +wire _guard238 = early_reset_static_par0_go_out; +wire _guard239 = _guard237 | _guard238; +wire _guard240 = fsm_out == 1'd0; +wire _guard241 = signal_reg_out; +wire _guard242 = _guard240 & _guard241; +wire _guard243 = fsm_out == 1'd0; +wire _guard244 = signal_reg_out; +wire _guard245 = ~_guard244; +wire _guard246 = _guard243 & _guard245; +wire _guard247 = wrapper_early_reset_static_par_go_out; +wire _guard248 = _guard246 & _guard247; +wire _guard249 = _guard242 | _guard248; +wire _guard250 = fsm_out == 1'd0; +wire _guard251 = signal_reg_out; +wire _guard252 = ~_guard251; +wire _guard253 = _guard250 & _guard252; +wire _guard254 = wrapper_early_reset_perform_reads_group0_go_out; +wire _guard255 = _guard253 & _guard254; +wire _guard256 = _guard249 | _guard255; +wire _guard257 = fsm_out == 1'd0; +wire _guard258 = signal_reg_out; +wire _guard259 = ~_guard258; +wire _guard260 = _guard257 & _guard259; +wire _guard261 = wrapper_early_reset_static_par0_go_out; +wire _guard262 = _guard260 & _guard261; +wire _guard263 = _guard256 | _guard262; +wire _guard264 = fsm_out == 1'd0; +wire _guard265 = signal_reg_out; +wire _guard266 = ~_guard265; +wire _guard267 = _guard264 & _guard266; +wire _guard268 = wrapper_early_reset_static_par1_go_out; +wire _guard269 = _guard267 & _guard268; +wire _guard270 = _guard263 | _guard269; +wire _guard271 = fsm_out == 1'd0; +wire _guard272 = signal_reg_out; +wire _guard273 = ~_guard272; +wire _guard274 = _guard271 & _guard273; +wire _guard275 = wrapper_early_reset_static_par_go_out; +wire _guard276 = _guard274 & _guard275; +wire _guard277 = fsm_out == 1'd0; +wire _guard278 = signal_reg_out; +wire _guard279 = ~_guard278; +wire _guard280 = _guard277 & _guard279; +wire _guard281 = wrapper_early_reset_perform_reads_group0_go_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = _guard276 | _guard282; +wire _guard284 = fsm_out == 1'd0; +wire _guard285 = signal_reg_out; +wire _guard286 = ~_guard285; +wire _guard287 = _guard284 & _guard286; +wire _guard288 = wrapper_early_reset_static_par0_go_out; +wire _guard289 = _guard287 & _guard288; +wire _guard290 = _guard283 | _guard289; +wire _guard291 = fsm_out == 1'd0; +wire _guard292 = signal_reg_out; +wire _guard293 = ~_guard292; +wire _guard294 = _guard291 & _guard293; +wire _guard295 = wrapper_early_reset_static_par1_go_out; wire _guard296 = _guard294 & _guard295; -wire _guard297 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard298 = do_ar_transfer_go_out; -wire _guard299 = early_reset_static_par1_go_out; -wire _guard300 = _guard298 | _guard299; -wire _guard301 = arvalid_out; -wire _guard302 = ARREADY; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = ~_guard303; -wire _guard305 = ar_handshake_occurred_out; -wire _guard306 = ~_guard305; -wire _guard307 = _guard304 & _guard306; -wire _guard308 = do_ar_transfer_go_out; -wire _guard309 = _guard307 & _guard308; -wire _guard310 = arvalid_out; -wire _guard311 = ARREADY; -wire _guard312 = _guard310 & _guard311; -wire _guard313 = ar_handshake_occurred_out; -wire _guard314 = _guard312 | _guard313; -wire _guard315 = do_ar_transfer_go_out; +wire _guard297 = _guard290 | _guard296; +wire _guard298 = fsm_out == 1'd0; +wire _guard299 = signal_reg_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = wrapper_early_reset_perform_reads_group0_go_out; +wire _guard302 = do_ar_transfer_go_out; +wire _guard303 = early_reset_static_par1_go_out; +wire _guard304 = _guard302 | _guard303; +wire _guard305 = arvalid_out; +wire _guard306 = ARREADY; +wire _guard307 = _guard305 & _guard306; +wire _guard308 = ~_guard307; +wire _guard309 = ar_handshake_occurred_out; +wire _guard310 = ~_guard309; +wire _guard311 = _guard308 & _guard310; +wire _guard312 = do_ar_transfer_go_out; +wire _guard313 = _guard311 & _guard312; +wire _guard314 = arvalid_out; +wire _guard315 = ARREADY; wire _guard316 = _guard314 & _guard315; -wire _guard317 = early_reset_static_par1_go_out; +wire _guard317 = ar_handshake_occurred_out; wire _guard318 = _guard316 | _guard317; -wire _guard319 = early_reset_static_par1_go_out; -wire _guard320 = early_reset_static_par1_go_out; -wire _guard321 = wrapper_early_reset_static_par0_done_out; -wire _guard322 = ~_guard321; -wire _guard323 = fsm0_out == 3'd2; -wire _guard324 = _guard322 & _guard323; -wire _guard325 = tdcc_go_out; -wire _guard326 = _guard324 & _guard325; -wire _guard327 = fsm_out == 1'd0; -wire _guard328 = signal_reg_out; -wire _guard329 = _guard327 & _guard328; -wire _guard330 = wrapper_early_reset_static_par1_done_out; -wire _guard331 = ~_guard330; -wire _guard332 = fsm0_out == 3'd4; +wire _guard319 = do_ar_transfer_go_out; +wire _guard320 = _guard318 & _guard319; +wire _guard321 = early_reset_static_par1_go_out; +wire _guard322 = _guard320 | _guard321; +wire _guard323 = early_reset_static_par1_go_out; +wire _guard324 = early_reset_static_par1_go_out; +wire _guard325 = wrapper_early_reset_static_par0_done_out; +wire _guard326 = ~_guard325; +wire _guard327 = fsm0_out == 3'd2; +wire _guard328 = _guard326 & _guard327; +wire _guard329 = tdcc_go_out; +wire _guard330 = _guard328 & _guard329; +wire _guard331 = fsm_out == 1'd0; +wire _guard332 = signal_reg_out; wire _guard333 = _guard331 & _guard332; -wire _guard334 = tdcc_go_out; -wire _guard335 = _guard333 & _guard334; -wire _guard336 = fsm0_out == 3'd6; -wire _guard337 = wrapper_early_reset_static_par_go_out; +wire _guard334 = wrapper_early_reset_static_par1_done_out; +wire _guard335 = ~_guard334; +wire _guard336 = fsm0_out == 3'd4; +wire _guard337 = _guard335 & _guard336; +wire _guard338 = tdcc_go_out; +wire _guard339 = _guard337 & _guard338; +wire _guard340 = fsm0_out == 3'd6; +wire _guard341 = wrapper_early_reset_static_par_go_out; assign adder1_left = _guard1 ? fsm_out : 1'd0; @@ -2033,106 +2058,106 @@ assign fsm_write_en = _guard21; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard24 ? adder1_out : - _guard27 ? adder_out : - _guard30 ? adder2_out : - _guard45 ? 1'd0 : - _guard48 ? adder0_out : + _guard25 ? adder1_out : + _guard29 ? adder_out : + _guard33 ? adder2_out : + _guard48 ? 1'd0 : + _guard52 ? adder0_out : 1'd0; assign adder_left = - _guard49 ? fsm_out : + _guard53 ? fsm_out : 1'd0; -assign adder_right = _guard50; -assign early_reset_static_par0_go_in = _guard51; -assign wrapper_early_reset_static_par1_done_in = _guard54; -assign ar_handshake_occurred_write_en = _guard60; +assign adder_right = _guard54; +assign early_reset_static_par0_go_in = _guard55; +assign wrapper_early_reset_static_par1_done_in = _guard58; +assign ar_handshake_occurred_write_en = _guard64; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard65 ? 1'd1 : - _guard66 ? 1'd0 : + _guard69 ? 1'd1 : + _guard70 ? 1'd0 : 'x; -assign comb_reg_write_en = _guard67; +assign comb_reg_write_en = _guard71; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard68 ? perform_reads_out : + _guard72 ? perform_reads_out : 1'd0; assign early_reset_perform_reads_group0_done_in = ud_out; assign perform_reads_left = - _guard69 ? txn_count_out : + _guard73 ? txn_count_out : 32'd0; assign perform_reads_right = - _guard70 ? txn_n_out : + _guard74 ? txn_n_out : 32'd0; -assign arlen_write_en = _guard71; +assign arlen_write_en = _guard75; assign arlen_clk = clk; assign arlen_reset = reset; assign arlen_in = 8'd7; -assign early_reset_static_par1_go_in = _guard73; -assign wrapper_early_reset_static_par_go_in = _guard79; -assign wrapper_early_reset_perform_reads_group0_done_in = _guard82; -assign txn_count_write_en = _guard85; +assign early_reset_static_par1_go_in = _guard77; +assign wrapper_early_reset_static_par_go_in = _guard83; +assign wrapper_early_reset_perform_reads_group0_done_in = _guard86; +assign txn_count_write_en = _guard89; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard86 ? 32'd0 : - _guard87 ? txn_adder_out : + _guard90 ? 32'd0 : + _guard91 ? txn_adder_out : 'x; assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard90; +assign wrapper_early_reset_static_par_done_in = _guard94; assign tdcc_go_in = go; assign adder2_left = - _guard91 ? fsm_out : + _guard95 ? fsm_out : 1'd0; -assign adder2_right = _guard92; -assign fsm0_write_en = _guard151; +assign adder2_right = _guard96; +assign fsm0_write_en = _guard155; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard168 ? 3'd6 : - _guard173 ? 3'd5 : - _guard188 ? 3'd2 : - _guard193 ? 3'd4 : - _guard198 ? 3'd1 : - _guard199 ? 3'd0 : - _guard204 ? 3'd3 : + _guard172 ? 3'd6 : + _guard177 ? 3'd5 : + _guard192 ? 3'd2 : + _guard197 ? 3'd4 : + _guard202 ? 3'd1 : + _guard203 ? 3'd0 : + _guard208 ? 3'd3 : 3'd0; assign adder0_left = - _guard205 ? fsm_out : + _guard209 ? fsm_out : 1'd0; -assign adder0_right = _guard206; +assign adder0_right = _guard210; assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_reads_group0_go_in = _guard219; -assign bt_reg_write_en = _guard222; +assign wrapper_early_reset_perform_reads_group0_go_in = _guard223; +assign bt_reg_write_en = _guard226; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard227 ? 1'd1 : - _guard235 ? 1'd0 : + _guard231 ? 1'd1 : + _guard239 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard266; +assign signal_reg_write_en = _guard270; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard293 ? 1'd1 : - _guard296 ? 1'd0 : + _guard297 ? 1'd1 : + _guard300 ? 1'd0 : 1'd0; -assign early_reset_perform_reads_group0_go_in = _guard297; -assign arvalid_write_en = _guard300; +assign early_reset_perform_reads_group0_go_in = _guard301; +assign arvalid_write_en = _guard304; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard309 ? 1'd1 : - _guard318 ? 1'd0 : + _guard313 ? 1'd1 : + _guard322 ? 1'd0 : 'x; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign wrapper_early_reset_static_par0_go_in = _guard326; -assign wrapper_early_reset_static_par0_done_in = _guard329; -assign wrapper_early_reset_static_par1_go_in = _guard335; -assign tdcc_done_in = _guard336; -assign early_reset_static_par_go_in = _guard337; +assign wrapper_early_reset_static_par0_go_in = _guard330; +assign wrapper_early_reset_static_par0_done_in = _guard333; +assign wrapper_early_reset_static_par1_go_in = _guard339; +assign tdcc_done_in = _guard340; +assign early_reset_static_par_go_in = _guard341; assign do_ar_transfer_done_in = bt_reg_out; assign early_reset_static_par1_done_in = ud2_out; // COMPONENT END: m_ar_channel @@ -2209,22 +2234,22 @@ logic fsm_clk; logic fsm_reset; logic fsm_out; logic fsm_done; -logic ud_out; logic adder_left; logic adder_right; logic adder_out; -logic ud0_out; logic adder0_left; logic adder0_right; logic adder0_out; -logic ud1_out; logic adder1_left; logic adder1_right; logic adder1_out; -logic ud2_out; logic adder2_left; logic adder2_right; logic adder2_out; +logic ud_out; +logic ud0_out; +logic ud1_out; +logic ud2_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; @@ -2367,11 +2392,6 @@ std_reg # ( .reset(fsm_reset), .write_en(fsm_write_en) ); -undef # ( - .WIDTH(1) -) ud ( - .out(ud_out) -); std_add # ( .WIDTH(1) ) adder ( @@ -2379,11 +2399,6 @@ std_add # ( .out(adder_out), .right(adder_right) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); std_add # ( .WIDTH(1) ) adder0 ( @@ -2391,11 +2406,6 @@ std_add # ( .out(adder0_out), .right(adder0_right) ); -undef # ( - .WIDTH(1) -) ud1 ( - .out(ud1_out) -); std_add # ( .WIDTH(1) ) adder1 ( @@ -2403,11 +2413,6 @@ std_add # ( .out(adder1_out), .right(adder1_right) ); -undef # ( - .WIDTH(1) -) ud2 ( - .out(ud2_out) -); std_add # ( .WIDTH(1) ) adder2 ( @@ -2415,6 +2420,26 @@ std_add # ( .out(adder2_out), .right(adder2_right) ); +undef # ( + .WIDTH(1) +) ud ( + .out(ud_out) +); +undef # ( + .WIDTH(1) +) ud0 ( + .out(ud0_out) +); +undef # ( + .WIDTH(1) +) ud1 ( + .out(ud1_out) +); +undef # ( + .WIDTH(1) +) ud2 ( + .out(ud2_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -2573,328 +2598,332 @@ wire _guard14 = early_reset_static_par0_go_out; wire _guard15 = _guard13 | _guard14; wire _guard16 = early_reset_static_par1_go_out; wire _guard17 = _guard15 | _guard16; -wire _guard18 = fsm_out != 1'd0; -wire _guard19 = early_reset_static_par0_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = fsm_out != 1'd0; -wire _guard22 = early_reset_perform_writes_group0_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = fsm_out != 1'd0; -wire _guard25 = early_reset_static_par1_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = fsm_out == 1'd0; -wire _guard28 = early_reset_perform_writes_group0_go_out; +wire _guard18 = fsm_out == 1'd0; +wire _guard19 = ~_guard18; +wire _guard20 = early_reset_static_par0_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 1'd0; +wire _guard23 = ~_guard22; +wire _guard24 = early_reset_perform_writes_group0_go_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = fsm_out == 1'd0; +wire _guard27 = ~_guard26; +wire _guard28 = early_reset_static_par1_go_out; wire _guard29 = _guard27 & _guard28; wire _guard30 = fsm_out == 1'd0; -wire _guard31 = early_reset_static_par_go_out; +wire _guard31 = early_reset_perform_writes_group0_go_out; wire _guard32 = _guard30 & _guard31; -wire _guard33 = _guard29 | _guard32; -wire _guard34 = fsm_out == 1'd0; -wire _guard35 = early_reset_static_par0_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = _guard33 | _guard36; -wire _guard38 = fsm_out == 1'd0; -wire _guard39 = early_reset_static_par1_go_out; -wire _guard40 = _guard38 & _guard39; -wire _guard41 = _guard37 | _guard40; -wire _guard42 = fsm_out != 1'd0; -wire _guard43 = early_reset_static_par_go_out; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = early_reset_perform_writes_group0_go_out; -wire _guard46 = early_reset_perform_writes_group0_go_out; -wire _guard47 = wrapper_early_reset_static_par0_go_out; -wire _guard48 = fsm_out == 1'd0; -wire _guard49 = signal_reg_out; -wire _guard50 = _guard48 & _guard49; -wire _guard51 = early_reset_perform_writes_group0_go_out; -wire _guard52 = early_reset_perform_writes_group0_go_out; -wire _guard53 = wrapper_early_reset_static_par1_go_out; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = ~_guard54; -wire _guard56 = fsm0_out == 3'd0; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = tdcc_go_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = early_reset_static_par_go_out; -wire _guard61 = early_reset_static_par1_go_out; -wire _guard62 = _guard60 | _guard61; -wire _guard63 = early_reset_static_par_go_out; -wire _guard64 = early_reset_static_par1_go_out; -wire _guard65 = fsm_out == 1'd0; -wire _guard66 = signal_reg_out; -wire _guard67 = _guard65 & _guard66; +wire _guard33 = fsm_out == 1'd0; +wire _guard34 = early_reset_static_par_go_out; +wire _guard35 = _guard33 & _guard34; +wire _guard36 = _guard32 | _guard35; +wire _guard37 = fsm_out == 1'd0; +wire _guard38 = early_reset_static_par0_go_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = _guard36 | _guard39; +wire _guard41 = fsm_out == 1'd0; +wire _guard42 = early_reset_static_par1_go_out; +wire _guard43 = _guard41 & _guard42; +wire _guard44 = _guard40 | _guard43; +wire _guard45 = fsm_out == 1'd0; +wire _guard46 = ~_guard45; +wire _guard47 = early_reset_static_par_go_out; +wire _guard48 = _guard46 & _guard47; +wire _guard49 = early_reset_perform_writes_group0_go_out; +wire _guard50 = early_reset_perform_writes_group0_go_out; +wire _guard51 = wrapper_early_reset_static_par0_go_out; +wire _guard52 = fsm_out == 1'd0; +wire _guard53 = signal_reg_out; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = early_reset_perform_writes_group0_go_out; +wire _guard56 = early_reset_perform_writes_group0_go_out; +wire _guard57 = wrapper_early_reset_static_par1_go_out; +wire _guard58 = wrapper_early_reset_static_par_done_out; +wire _guard59 = ~_guard58; +wire _guard60 = fsm0_out == 3'd0; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = tdcc_go_out; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = early_reset_static_par_go_out; +wire _guard65 = early_reset_static_par1_go_out; +wire _guard66 = _guard64 | _guard65; +wire _guard67 = early_reset_static_par_go_out; wire _guard68 = early_reset_static_par1_go_out; -wire _guard69 = early_reset_static_par1_go_out; -wire _guard70 = fsm0_out == 3'd6; -wire _guard71 = fsm0_out == 3'd0; -wire _guard72 = wrapper_early_reset_static_par_done_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = tdcc_go_out; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = _guard70 | _guard75; -wire _guard77 = fsm0_out == 3'd1; -wire _guard78 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard79 = comb_reg_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = _guard77 & _guard80; -wire _guard82 = tdcc_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = _guard76 | _guard83; -wire _guard85 = fsm0_out == 3'd5; -wire _guard86 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard87 = comb_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = _guard85 & _guard88; -wire _guard90 = tdcc_go_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = _guard84 | _guard91; -wire _guard93 = fsm0_out == 3'd2; -wire _guard94 = wrapper_early_reset_static_par0_done_out; +wire _guard69 = fsm_out == 1'd0; +wire _guard70 = signal_reg_out; +wire _guard71 = _guard69 & _guard70; +wire _guard72 = early_reset_static_par1_go_out; +wire _guard73 = early_reset_static_par1_go_out; +wire _guard74 = fsm0_out == 3'd6; +wire _guard75 = fsm0_out == 3'd0; +wire _guard76 = wrapper_early_reset_static_par_done_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = tdcc_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard74 | _guard79; +wire _guard81 = fsm0_out == 3'd1; +wire _guard82 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard83 = comb_reg_out; +wire _guard84 = _guard82 & _guard83; +wire _guard85 = _guard81 & _guard84; +wire _guard86 = tdcc_go_out; +wire _guard87 = _guard85 & _guard86; +wire _guard88 = _guard80 | _guard87; +wire _guard89 = fsm0_out == 3'd5; +wire _guard90 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard91 = comb_reg_out; +wire _guard92 = _guard90 & _guard91; +wire _guard93 = _guard89 & _guard92; +wire _guard94 = tdcc_go_out; wire _guard95 = _guard93 & _guard94; -wire _guard96 = tdcc_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard92 | _guard97; -wire _guard99 = fsm0_out == 3'd3; -wire _guard100 = do_aw_transfer_done_out; +wire _guard96 = _guard88 | _guard95; +wire _guard97 = fsm0_out == 3'd2; +wire _guard98 = wrapper_early_reset_static_par0_done_out; +wire _guard99 = _guard97 & _guard98; +wire _guard100 = tdcc_go_out; wire _guard101 = _guard99 & _guard100; -wire _guard102 = tdcc_go_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = _guard98 | _guard103; -wire _guard105 = fsm0_out == 3'd4; -wire _guard106 = wrapper_early_reset_static_par1_done_out; +wire _guard102 = _guard96 | _guard101; +wire _guard103 = fsm0_out == 3'd3; +wire _guard104 = do_aw_transfer_done_out; +wire _guard105 = _guard103 & _guard104; +wire _guard106 = tdcc_go_out; wire _guard107 = _guard105 & _guard106; -wire _guard108 = tdcc_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard104 | _guard109; -wire _guard111 = fsm0_out == 3'd1; -wire _guard112 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard113 = comb_reg_out; -wire _guard114 = ~_guard113; -wire _guard115 = _guard112 & _guard114; -wire _guard116 = _guard111 & _guard115; -wire _guard117 = tdcc_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard110 | _guard118; -wire _guard120 = fsm0_out == 3'd5; -wire _guard121 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard122 = comb_reg_out; -wire _guard123 = ~_guard122; -wire _guard124 = _guard121 & _guard123; -wire _guard125 = _guard120 & _guard124; -wire _guard126 = tdcc_go_out; -wire _guard127 = _guard125 & _guard126; -wire _guard128 = _guard119 | _guard127; -wire _guard129 = fsm0_out == 3'd1; -wire _guard130 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard131 = comb_reg_out; -wire _guard132 = ~_guard131; -wire _guard133 = _guard130 & _guard132; -wire _guard134 = _guard129 & _guard133; -wire _guard135 = tdcc_go_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = fsm0_out == 3'd5; -wire _guard138 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard139 = comb_reg_out; -wire _guard140 = ~_guard139; -wire _guard141 = _guard138 & _guard140; -wire _guard142 = _guard137 & _guard141; -wire _guard143 = tdcc_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = _guard136 | _guard144; -wire _guard146 = fsm0_out == 3'd4; -wire _guard147 = wrapper_early_reset_static_par1_done_out; +wire _guard108 = _guard102 | _guard107; +wire _guard109 = fsm0_out == 3'd4; +wire _guard110 = wrapper_early_reset_static_par1_done_out; +wire _guard111 = _guard109 & _guard110; +wire _guard112 = tdcc_go_out; +wire _guard113 = _guard111 & _guard112; +wire _guard114 = _guard108 | _guard113; +wire _guard115 = fsm0_out == 3'd1; +wire _guard116 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard117 = comb_reg_out; +wire _guard118 = ~_guard117; +wire _guard119 = _guard116 & _guard118; +wire _guard120 = _guard115 & _guard119; +wire _guard121 = tdcc_go_out; +wire _guard122 = _guard120 & _guard121; +wire _guard123 = _guard114 | _guard122; +wire _guard124 = fsm0_out == 3'd5; +wire _guard125 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard126 = comb_reg_out; +wire _guard127 = ~_guard126; +wire _guard128 = _guard125 & _guard127; +wire _guard129 = _guard124 & _guard128; +wire _guard130 = tdcc_go_out; +wire _guard131 = _guard129 & _guard130; +wire _guard132 = _guard123 | _guard131; +wire _guard133 = fsm0_out == 3'd1; +wire _guard134 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard135 = comb_reg_out; +wire _guard136 = ~_guard135; +wire _guard137 = _guard134 & _guard136; +wire _guard138 = _guard133 & _guard137; +wire _guard139 = tdcc_go_out; +wire _guard140 = _guard138 & _guard139; +wire _guard141 = fsm0_out == 3'd5; +wire _guard142 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard143 = comb_reg_out; +wire _guard144 = ~_guard143; +wire _guard145 = _guard142 & _guard144; +wire _guard146 = _guard141 & _guard145; +wire _guard147 = tdcc_go_out; wire _guard148 = _guard146 & _guard147; -wire _guard149 = tdcc_go_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = fsm0_out == 3'd1; -wire _guard152 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard153 = comb_reg_out; +wire _guard149 = _guard140 | _guard148; +wire _guard150 = fsm0_out == 3'd4; +wire _guard151 = wrapper_early_reset_static_par1_done_out; +wire _guard152 = _guard150 & _guard151; +wire _guard153 = tdcc_go_out; wire _guard154 = _guard152 & _guard153; -wire _guard155 = _guard151 & _guard154; -wire _guard156 = tdcc_go_out; -wire _guard157 = _guard155 & _guard156; -wire _guard158 = fsm0_out == 3'd5; -wire _guard159 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard160 = comb_reg_out; +wire _guard155 = fsm0_out == 3'd1; +wire _guard156 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard157 = comb_reg_out; +wire _guard158 = _guard156 & _guard157; +wire _guard159 = _guard155 & _guard158; +wire _guard160 = tdcc_go_out; wire _guard161 = _guard159 & _guard160; -wire _guard162 = _guard158 & _guard161; -wire _guard163 = tdcc_go_out; -wire _guard164 = _guard162 & _guard163; -wire _guard165 = _guard157 | _guard164; -wire _guard166 = fsm0_out == 3'd3; -wire _guard167 = do_aw_transfer_done_out; +wire _guard162 = fsm0_out == 3'd5; +wire _guard163 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard164 = comb_reg_out; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard162 & _guard165; +wire _guard167 = tdcc_go_out; wire _guard168 = _guard166 & _guard167; -wire _guard169 = tdcc_go_out; -wire _guard170 = _guard168 & _guard169; -wire _guard171 = fsm0_out == 3'd0; -wire _guard172 = wrapper_early_reset_static_par_done_out; -wire _guard173 = _guard171 & _guard172; -wire _guard174 = tdcc_go_out; -wire _guard175 = _guard173 & _guard174; -wire _guard176 = fsm0_out == 3'd6; -wire _guard177 = fsm0_out == 3'd2; -wire _guard178 = wrapper_early_reset_static_par0_done_out; +wire _guard169 = _guard161 | _guard168; +wire _guard170 = fsm0_out == 3'd3; +wire _guard171 = do_aw_transfer_done_out; +wire _guard172 = _guard170 & _guard171; +wire _guard173 = tdcc_go_out; +wire _guard174 = _guard172 & _guard173; +wire _guard175 = fsm0_out == 3'd0; +wire _guard176 = wrapper_early_reset_static_par_done_out; +wire _guard177 = _guard175 & _guard176; +wire _guard178 = tdcc_go_out; wire _guard179 = _guard177 & _guard178; -wire _guard180 = tdcc_go_out; -wire _guard181 = _guard179 & _guard180; -wire _guard182 = do_aw_transfer_done_out; -wire _guard183 = ~_guard182; -wire _guard184 = fsm0_out == 3'd3; +wire _guard180 = fsm0_out == 3'd6; +wire _guard181 = fsm0_out == 3'd2; +wire _guard182 = wrapper_early_reset_static_par0_done_out; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = tdcc_go_out; wire _guard185 = _guard183 & _guard184; -wire _guard186 = tdcc_go_out; -wire _guard187 = _guard185 & _guard186; -wire _guard188 = early_reset_perform_writes_group0_go_out; -wire _guard189 = early_reset_perform_writes_group0_go_out; -wire _guard190 = early_reset_static_par_go_out; -wire _guard191 = early_reset_static_par_go_out; -wire _guard192 = fsm_out == 1'd0; -wire _guard193 = signal_reg_out; -wire _guard194 = _guard192 & _guard193; -wire _guard195 = do_aw_transfer_go_out; -wire _guard196 = early_reset_static_par0_go_out; -wire _guard197 = _guard195 | _guard196; -wire _guard198 = AWREADY; -wire _guard199 = awvalid_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = do_aw_transfer_go_out; -wire _guard202 = _guard200 & _guard201; -wire _guard203 = AWREADY; -wire _guard204 = awvalid_out; -wire _guard205 = _guard203 & _guard204; -wire _guard206 = ~_guard205; -wire _guard207 = do_aw_transfer_go_out; -wire _guard208 = _guard206 & _guard207; -wire _guard209 = early_reset_static_par0_go_out; -wire _guard210 = _guard208 | _guard209; -wire _guard211 = early_reset_static_par_go_out; -wire _guard212 = early_reset_static_par_go_out; -wire _guard213 = fsm_out == 1'd0; -wire _guard214 = signal_reg_out; -wire _guard215 = _guard213 & _guard214; -wire _guard216 = fsm_out == 1'd0; -wire _guard217 = signal_reg_out; -wire _guard218 = ~_guard217; -wire _guard219 = _guard216 & _guard218; -wire _guard220 = wrapper_early_reset_static_par_go_out; -wire _guard221 = _guard219 & _guard220; -wire _guard222 = _guard215 | _guard221; -wire _guard223 = fsm_out == 1'd0; -wire _guard224 = signal_reg_out; -wire _guard225 = ~_guard224; -wire _guard226 = _guard223 & _guard225; -wire _guard227 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard228 = _guard226 & _guard227; -wire _guard229 = _guard222 | _guard228; -wire _guard230 = fsm_out == 1'd0; -wire _guard231 = signal_reg_out; -wire _guard232 = ~_guard231; -wire _guard233 = _guard230 & _guard232; -wire _guard234 = wrapper_early_reset_static_par0_go_out; -wire _guard235 = _guard233 & _guard234; -wire _guard236 = _guard229 | _guard235; -wire _guard237 = fsm_out == 1'd0; -wire _guard238 = signal_reg_out; -wire _guard239 = ~_guard238; -wire _guard240 = _guard237 & _guard239; -wire _guard241 = wrapper_early_reset_static_par1_go_out; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = _guard236 | _guard242; -wire _guard244 = fsm_out == 1'd0; -wire _guard245 = signal_reg_out; -wire _guard246 = ~_guard245; -wire _guard247 = _guard244 & _guard246; -wire _guard248 = wrapper_early_reset_static_par_go_out; -wire _guard249 = _guard247 & _guard248; -wire _guard250 = fsm_out == 1'd0; -wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = _guard249 | _guard255; -wire _guard257 = fsm_out == 1'd0; -wire _guard258 = signal_reg_out; -wire _guard259 = ~_guard258; -wire _guard260 = _guard257 & _guard259; -wire _guard261 = wrapper_early_reset_static_par0_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = _guard256 | _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = ~_guard265; -wire _guard267 = _guard264 & _guard266; -wire _guard268 = wrapper_early_reset_static_par1_go_out; -wire _guard269 = _guard267 & _guard268; -wire _guard270 = _guard263 | _guard269; -wire _guard271 = fsm_out == 1'd0; -wire _guard272 = signal_reg_out; +wire _guard186 = do_aw_transfer_done_out; +wire _guard187 = ~_guard186; +wire _guard188 = fsm0_out == 3'd3; +wire _guard189 = _guard187 & _guard188; +wire _guard190 = tdcc_go_out; +wire _guard191 = _guard189 & _guard190; +wire _guard192 = early_reset_perform_writes_group0_go_out; +wire _guard193 = early_reset_perform_writes_group0_go_out; +wire _guard194 = early_reset_static_par_go_out; +wire _guard195 = early_reset_static_par_go_out; +wire _guard196 = fsm_out == 1'd0; +wire _guard197 = signal_reg_out; +wire _guard198 = _guard196 & _guard197; +wire _guard199 = do_aw_transfer_go_out; +wire _guard200 = early_reset_static_par0_go_out; +wire _guard201 = _guard199 | _guard200; +wire _guard202 = AWREADY; +wire _guard203 = awvalid_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = do_aw_transfer_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = AWREADY; +wire _guard208 = awvalid_out; +wire _guard209 = _guard207 & _guard208; +wire _guard210 = ~_guard209; +wire _guard211 = do_aw_transfer_go_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = early_reset_static_par0_go_out; +wire _guard214 = _guard212 | _guard213; +wire _guard215 = early_reset_static_par_go_out; +wire _guard216 = early_reset_static_par_go_out; +wire _guard217 = fsm_out == 1'd0; +wire _guard218 = signal_reg_out; +wire _guard219 = _guard217 & _guard218; +wire _guard220 = fsm_out == 1'd0; +wire _guard221 = signal_reg_out; +wire _guard222 = ~_guard221; +wire _guard223 = _guard220 & _guard222; +wire _guard224 = wrapper_early_reset_static_par_go_out; +wire _guard225 = _guard223 & _guard224; +wire _guard226 = _guard219 | _guard225; +wire _guard227 = fsm_out == 1'd0; +wire _guard228 = signal_reg_out; +wire _guard229 = ~_guard228; +wire _guard230 = _guard227 & _guard229; +wire _guard231 = wrapper_early_reset_perform_writes_group0_go_out; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = _guard226 | _guard232; +wire _guard234 = fsm_out == 1'd0; +wire _guard235 = signal_reg_out; +wire _guard236 = ~_guard235; +wire _guard237 = _guard234 & _guard236; +wire _guard238 = wrapper_early_reset_static_par0_go_out; +wire _guard239 = _guard237 & _guard238; +wire _guard240 = _guard233 | _guard239; +wire _guard241 = fsm_out == 1'd0; +wire _guard242 = signal_reg_out; +wire _guard243 = ~_guard242; +wire _guard244 = _guard241 & _guard243; +wire _guard245 = wrapper_early_reset_static_par1_go_out; +wire _guard246 = _guard244 & _guard245; +wire _guard247 = _guard240 | _guard246; +wire _guard248 = fsm_out == 1'd0; +wire _guard249 = signal_reg_out; +wire _guard250 = ~_guard249; +wire _guard251 = _guard248 & _guard250; +wire _guard252 = wrapper_early_reset_static_par_go_out; +wire _guard253 = _guard251 & _guard252; +wire _guard254 = fsm_out == 1'd0; +wire _guard255 = signal_reg_out; +wire _guard256 = ~_guard255; +wire _guard257 = _guard254 & _guard256; +wire _guard258 = wrapper_early_reset_perform_writes_group0_go_out; +wire _guard259 = _guard257 & _guard258; +wire _guard260 = _guard253 | _guard259; +wire _guard261 = fsm_out == 1'd0; +wire _guard262 = signal_reg_out; +wire _guard263 = ~_guard262; +wire _guard264 = _guard261 & _guard263; +wire _guard265 = wrapper_early_reset_static_par0_go_out; +wire _guard266 = _guard264 & _guard265; +wire _guard267 = _guard260 | _guard266; +wire _guard268 = fsm_out == 1'd0; +wire _guard269 = signal_reg_out; +wire _guard270 = ~_guard269; +wire _guard271 = _guard268 & _guard270; +wire _guard272 = wrapper_early_reset_static_par1_go_out; wire _guard273 = _guard271 & _guard272; -wire _guard274 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard275 = early_reset_static_par1_go_out; -wire _guard276 = early_reset_static_par1_go_out; -wire _guard277 = aw_handshake_occurred_out; -wire _guard278 = ~_guard277; -wire _guard279 = do_aw_transfer_go_out; -wire _guard280 = _guard278 & _guard279; -wire _guard281 = early_reset_static_par0_go_out; -wire _guard282 = _guard280 | _guard281; -wire _guard283 = awvalid_out; -wire _guard284 = AWREADY; -wire _guard285 = _guard283 & _guard284; -wire _guard286 = do_aw_transfer_go_out; -wire _guard287 = _guard285 & _guard286; -wire _guard288 = early_reset_static_par0_go_out; -wire _guard289 = wrapper_early_reset_static_par0_done_out; -wire _guard290 = ~_guard289; -wire _guard291 = fsm0_out == 3'd2; -wire _guard292 = _guard290 & _guard291; -wire _guard293 = tdcc_go_out; -wire _guard294 = _guard292 & _guard293; -wire _guard295 = fsm_out == 1'd0; -wire _guard296 = signal_reg_out; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = wrapper_early_reset_static_par1_done_out; -wire _guard299 = ~_guard298; -wire _guard300 = fsm0_out == 3'd4; +wire _guard274 = _guard267 | _guard273; +wire _guard275 = fsm_out == 1'd0; +wire _guard276 = signal_reg_out; +wire _guard277 = _guard275 & _guard276; +wire _guard278 = wrapper_early_reset_perform_writes_group0_go_out; +wire _guard279 = early_reset_static_par1_go_out; +wire _guard280 = early_reset_static_par1_go_out; +wire _guard281 = aw_handshake_occurred_out; +wire _guard282 = ~_guard281; +wire _guard283 = do_aw_transfer_go_out; +wire _guard284 = _guard282 & _guard283; +wire _guard285 = early_reset_static_par0_go_out; +wire _guard286 = _guard284 | _guard285; +wire _guard287 = awvalid_out; +wire _guard288 = AWREADY; +wire _guard289 = _guard287 & _guard288; +wire _guard290 = do_aw_transfer_go_out; +wire _guard291 = _guard289 & _guard290; +wire _guard292 = early_reset_static_par0_go_out; +wire _guard293 = wrapper_early_reset_static_par0_done_out; +wire _guard294 = ~_guard293; +wire _guard295 = fsm0_out == 3'd2; +wire _guard296 = _guard294 & _guard295; +wire _guard297 = tdcc_go_out; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = fsm_out == 1'd0; +wire _guard300 = signal_reg_out; wire _guard301 = _guard299 & _guard300; -wire _guard302 = tdcc_go_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = fsm0_out == 3'd6; -wire _guard305 = do_aw_transfer_go_out; -wire _guard306 = early_reset_static_par1_go_out; -wire _guard307 = _guard305 | _guard306; -wire _guard308 = awvalid_out; -wire _guard309 = AWREADY; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = ~_guard310; -wire _guard312 = aw_handshake_occurred_out; -wire _guard313 = ~_guard312; -wire _guard314 = _guard311 & _guard313; -wire _guard315 = do_aw_transfer_go_out; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = awvalid_out; -wire _guard318 = AWREADY; -wire _guard319 = _guard317 & _guard318; -wire _guard320 = aw_handshake_occurred_out; -wire _guard321 = _guard319 | _guard320; -wire _guard322 = do_aw_transfer_go_out; +wire _guard302 = wrapper_early_reset_static_par1_done_out; +wire _guard303 = ~_guard302; +wire _guard304 = fsm0_out == 3'd4; +wire _guard305 = _guard303 & _guard304; +wire _guard306 = tdcc_go_out; +wire _guard307 = _guard305 & _guard306; +wire _guard308 = fsm0_out == 3'd6; +wire _guard309 = do_aw_transfer_go_out; +wire _guard310 = early_reset_static_par1_go_out; +wire _guard311 = _guard309 | _guard310; +wire _guard312 = awvalid_out; +wire _guard313 = AWREADY; +wire _guard314 = _guard312 & _guard313; +wire _guard315 = ~_guard314; +wire _guard316 = aw_handshake_occurred_out; +wire _guard317 = ~_guard316; +wire _guard318 = _guard315 & _guard317; +wire _guard319 = do_aw_transfer_go_out; +wire _guard320 = _guard318 & _guard319; +wire _guard321 = awvalid_out; +wire _guard322 = AWREADY; wire _guard323 = _guard321 & _guard322; -wire _guard324 = early_reset_static_par1_go_out; +wire _guard324 = aw_handshake_occurred_out; wire _guard325 = _guard323 | _guard324; -wire _guard326 = wrapper_early_reset_static_par_go_out; -wire _guard327 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard328 = ~_guard327; -wire _guard329 = fsm0_out == 3'd1; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = tdcc_go_out; -wire _guard332 = _guard330 & _guard331; -wire _guard333 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard334 = ~_guard333; -wire _guard335 = fsm0_out == 3'd5; +wire _guard326 = do_aw_transfer_go_out; +wire _guard327 = _guard325 & _guard326; +wire _guard328 = early_reset_static_par1_go_out; +wire _guard329 = _guard327 | _guard328; +wire _guard330 = wrapper_early_reset_static_par_go_out; +wire _guard331 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard332 = ~_guard331; +wire _guard333 = fsm0_out == 3'd1; +wire _guard334 = _guard332 & _guard333; +wire _guard335 = tdcc_go_out; wire _guard336 = _guard334 & _guard335; -wire _guard337 = tdcc_go_out; -wire _guard338 = _guard336 & _guard337; -wire _guard339 = _guard332 | _guard338; +wire _guard337 = wrapper_early_reset_perform_writes_group0_done_out; +wire _guard338 = ~_guard337; +wire _guard339 = fsm0_out == 3'd5; +wire _guard340 = _guard338 & _guard339; +wire _guard341 = tdcc_go_out; +wire _guard342 = _guard340 & _guard341; +wire _guard343 = _guard336 | _guard342; assign adder1_left = _guard1 ? fsm_out : 1'd0; @@ -2909,9 +2938,7 @@ assign AWPROT = assign AWSIZE = _guard6 ? 3'd2 : 3'd0; -assign max_transfers_in = - _guard7 ? 8'd7 : - 8'd0; +assign max_transfers_in = 8'd7; assign AWVALID = awvalid_out; assign AWBURST = _guard8 ? 2'd1 : @@ -2924,109 +2951,109 @@ assign fsm_write_en = _guard17; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard20 ? adder1_out : - _guard23 ? adder_out : - _guard26 ? adder2_out : - _guard41 ? 1'd0 : - _guard44 ? adder0_out : + _guard21 ? adder1_out : + _guard25 ? adder_out : + _guard29 ? adder2_out : + _guard44 ? 1'd0 : + _guard48 ? adder0_out : 1'd0; assign adder_left = - _guard45 ? fsm_out : + _guard49 ? fsm_out : 1'd0; -assign adder_right = _guard46; -assign early_reset_static_par0_go_in = _guard47; -assign wrapper_early_reset_static_par1_done_in = _guard50; -assign comb_reg_write_en = _guard51; +assign adder_right = _guard50; +assign early_reset_static_par0_go_in = _guard51; +assign wrapper_early_reset_static_par1_done_in = _guard54; +assign comb_reg_write_en = _guard55; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard52 ? perform_writes_out : + _guard56 ? perform_writes_out : 1'd0; -assign early_reset_static_par1_go_in = _guard53; -assign wrapper_early_reset_static_par_go_in = _guard59; +assign early_reset_static_par1_go_in = _guard57; +assign wrapper_early_reset_static_par_go_in = _guard63; assign early_reset_perform_writes_group0_done_in = ud_out; -assign txn_count_write_en = _guard62; +assign txn_count_write_en = _guard66; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard63 ? 32'd0 : - _guard64 ? txn_adder_out : + _guard67 ? 32'd0 : + _guard68 ? txn_adder_out : 'x; assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard67; +assign wrapper_early_reset_static_par_done_in = _guard71; assign tdcc_go_in = go; assign adder2_left = - _guard68 ? fsm_out : + _guard72 ? fsm_out : 1'd0; -assign adder2_right = _guard69; -assign fsm0_write_en = _guard128; +assign adder2_right = _guard73; +assign fsm0_write_en = _guard132; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard145 ? 3'd6 : - _guard150 ? 3'd5 : - _guard165 ? 3'd2 : - _guard170 ? 3'd4 : - _guard175 ? 3'd1 : - _guard176 ? 3'd0 : - _guard181 ? 3'd3 : + _guard149 ? 3'd6 : + _guard154 ? 3'd5 : + _guard169 ? 3'd2 : + _guard174 ? 3'd4 : + _guard179 ? 3'd1 : + _guard180 ? 3'd0 : + _guard185 ? 3'd3 : 3'd0; -assign do_aw_transfer_go_in = _guard187; +assign do_aw_transfer_go_in = _guard191; assign do_aw_transfer_done_in = bt_reg_out; assign perform_writes_left = - _guard188 ? txn_count_out : + _guard192 ? txn_count_out : 32'd0; assign perform_writes_right = - _guard189 ? txn_n_out : + _guard193 ? txn_n_out : 32'd0; assign adder0_left = - _guard190 ? fsm_out : + _guard194 ? fsm_out : 1'd0; -assign adder0_right = _guard191; +assign adder0_right = _guard195; assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_writes_group0_done_in = _guard194; -assign bt_reg_write_en = _guard197; +assign wrapper_early_reset_perform_writes_group0_done_in = _guard198; +assign bt_reg_write_en = _guard201; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard202 ? 1'd1 : - _guard210 ? 1'd0 : + _guard206 ? 1'd1 : + _guard214 ? 1'd0 : 'x; -assign awlen_write_en = _guard211; +assign awlen_write_en = _guard215; assign awlen_clk = clk; assign awlen_reset = reset; assign awlen_in = 8'd7; -assign signal_reg_write_en = _guard243; +assign signal_reg_write_en = _guard247; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard270 ? 1'd1 : - _guard273 ? 1'd0 : + _guard274 ? 1'd1 : + _guard277 ? 1'd0 : 1'd0; -assign early_reset_perform_writes_group0_go_in = _guard274; +assign early_reset_perform_writes_group0_go_in = _guard278; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign aw_handshake_occurred_write_en = _guard282; +assign aw_handshake_occurred_write_en = _guard286; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard287 ? 1'd1 : - _guard288 ? 1'd0 : + _guard291 ? 1'd1 : + _guard292 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par0_go_in = _guard294; -assign wrapper_early_reset_static_par0_done_in = _guard297; -assign wrapper_early_reset_static_par1_go_in = _guard303; -assign tdcc_done_in = _guard304; -assign awvalid_write_en = _guard307; +assign wrapper_early_reset_static_par0_go_in = _guard298; +assign wrapper_early_reset_static_par0_done_in = _guard301; +assign wrapper_early_reset_static_par1_go_in = _guard307; +assign tdcc_done_in = _guard308; +assign awvalid_write_en = _guard311; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard316 ? 1'd1 : - _guard325 ? 1'd0 : + _guard320 ? 1'd1 : + _guard329 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard326; +assign early_reset_static_par_go_in = _guard330; assign early_reset_static_par1_done_in = ud2_out; -assign wrapper_early_reset_perform_writes_group0_go_in = _guard339; +assign wrapper_early_reset_perform_writes_group0_go_in = _guard343; // COMPONENT END: m_aw_channel endmodule module m_read_channel( @@ -3565,21 +3592,13 @@ assign curr_addr_internal_mem_incr_right = 3'd1; assign done = _guard9; assign mem_ref_content_en = _guard10; assign curr_addr_axi_write_en = _guard11; -assign curr_addr_axi_in = - _guard12 ? curr_addr_axi_incr_out : - 64'd0; +assign curr_addr_axi_in = curr_addr_axi_incr_out; assign RREADY = rready_out; assign curr_addr_internal_mem_write_en = _guard13; -assign mem_ref_write_data = - _guard14 ? read_data_reg_out : - 32'd0; +assign mem_ref_write_data = read_data_reg_out; assign mem_ref_write_en = _guard15; -assign mem_ref_addr0 = - _guard16 ? curr_addr_internal_mem_out : - 3'd0; -assign curr_addr_internal_mem_in = - _guard17 ? curr_addr_internal_mem_incr_out : - 3'd0; +assign mem_ref_addr0 = curr_addr_internal_mem_out; +assign curr_addr_internal_mem_in = curr_addr_internal_mem_incr_out; assign fsm_write_en = _guard70; assign fsm_clk = clk; assign fsm_reset = reset; @@ -3727,10 +3746,10 @@ logic fsm_clk; logic fsm_reset; logic fsm_out; logic fsm_done; -logic ud_out; logic adder_left; logic adder_right; logic adder_out; +logic ud_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; @@ -3882,11 +3901,6 @@ std_reg # ( .reset(fsm_reset), .write_en(fsm_write_en) ); -undef # ( - .WIDTH(1) -) ud ( - .out(ud_out) -); std_add # ( .WIDTH(1) ) adder ( @@ -3894,6 +3908,11 @@ std_add # ( .out(adder_out), .right(adder_right) ); +undef # ( + .WIDTH(1) +) ud ( + .out(ud_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -4091,312 +4110,313 @@ wire _guard23 = service_write_transfer_go_out; wire _guard24 = curr_addr_internal_mem_incr_group_go_out; wire _guard25 = invoke0_go_out; wire _guard26 = early_reset_static_par_go_out; -wire _guard27 = fsm_out != 1'd0; -wire _guard28 = early_reset_static_par_go_out; -wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = early_reset_static_par_go_out; -wire _guard32 = _guard30 & _guard31; -wire _guard33 = early_reset_static_par_go_out; +wire _guard27 = fsm_out == 1'd0; +wire _guard28 = ~_guard27; +wire _guard29 = early_reset_static_par_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 1'd0; +wire _guard32 = early_reset_static_par_go_out; +wire _guard33 = _guard31 & _guard32; wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 3'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; -wire _guard40 = _guard38 & _guard39; -wire _guard41 = early_reset_static_par_go_out; +wire _guard35 = early_reset_static_par_go_out; +wire _guard36 = invoke2_done_out; +wire _guard37 = ~_guard36; +wire _guard38 = fsm0_out == 3'd2; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; +wire _guard41 = _guard39 & _guard40; wire _guard42 = early_reset_static_par_go_out; -wire _guard43 = service_write_transfer_go_out; -wire _guard44 = wvalid_out; -wire _guard45 = WREADY; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = ~_guard46; -wire _guard48 = w_handshake_occurred_out; -wire _guard49 = ~_guard48; -wire _guard50 = _guard47 & _guard49; -wire _guard51 = service_write_transfer_go_out; -wire _guard52 = _guard50 & _guard51; -wire _guard53 = wvalid_out; -wire _guard54 = WREADY; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = w_handshake_occurred_out; -wire _guard57 = _guard55 | _guard56; -wire _guard58 = service_write_transfer_go_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = pd_out; -wire _guard61 = wrapper_early_reset_static_par_done_out; -wire _guard62 = _guard60 | _guard61; -wire _guard63 = ~_guard62; -wire _guard64 = par0_go_out; -wire _guard65 = _guard63 & _guard64; -wire _guard66 = max_transfers_out == curr_transfer_count_out; -wire _guard67 = wvalid_out; -wire _guard68 = WREADY; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = _guard66 & _guard69; -wire _guard71 = service_write_transfer_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = invoke1_go_out; -wire _guard74 = _guard72 | _guard73; -wire _guard75 = invoke1_go_out; -wire _guard76 = max_transfers_out == curr_transfer_count_out; -wire _guard77 = wvalid_out; -wire _guard78 = WREADY; -wire _guard79 = _guard77 & _guard78; -wire _guard80 = _guard76 & _guard79; -wire _guard81 = service_write_transfer_go_out; -wire _guard82 = _guard80 & _guard81; -wire _guard83 = early_reset_static_par_go_out; +wire _guard43 = early_reset_static_par_go_out; +wire _guard44 = service_write_transfer_go_out; +wire _guard45 = wvalid_out; +wire _guard46 = WREADY; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ~_guard47; +wire _guard49 = w_handshake_occurred_out; +wire _guard50 = ~_guard49; +wire _guard51 = _guard48 & _guard50; +wire _guard52 = service_write_transfer_go_out; +wire _guard53 = _guard51 & _guard52; +wire _guard54 = wvalid_out; +wire _guard55 = WREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = w_handshake_occurred_out; +wire _guard58 = _guard56 | _guard57; +wire _guard59 = service_write_transfer_go_out; +wire _guard60 = _guard58 & _guard59; +wire _guard61 = pd_out; +wire _guard62 = wrapper_early_reset_static_par_done_out; +wire _guard63 = _guard61 | _guard62; +wire _guard64 = ~_guard63; +wire _guard65 = par0_go_out; +wire _guard66 = _guard64 & _guard65; +wire _guard67 = max_transfers_out == curr_transfer_count_out; +wire _guard68 = wvalid_out; +wire _guard69 = WREADY; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = _guard67 & _guard70; +wire _guard72 = service_write_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = invoke1_go_out; +wire _guard75 = _guard73 | _guard74; +wire _guard76 = invoke1_go_out; +wire _guard77 = max_transfers_out == curr_transfer_count_out; +wire _guard78 = wvalid_out; +wire _guard79 = WREADY; +wire _guard80 = _guard78 & _guard79; +wire _guard81 = _guard77 & _guard80; +wire _guard82 = service_write_transfer_go_out; +wire _guard83 = _guard81 & _guard82; wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = pd_out; -wire _guard86 = pd0_out; -wire _guard87 = _guard85 & _guard86; -wire _guard88 = pd1_out; -wire _guard89 = _guard87 & _guard88; -wire _guard90 = curr_addr_axi_incr_group_done_out; -wire _guard91 = par0_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = _guard89 | _guard92; -wire _guard94 = curr_addr_axi_incr_group_done_out; -wire _guard95 = par0_go_out; -wire _guard96 = _guard94 & _guard95; -wire _guard97 = pd_out; -wire _guard98 = pd0_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = pd1_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = invoke0_done_out; -wire _guard106 = ~_guard105; -wire _guard107 = fsm0_out == 3'd0; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = tdcc_go_out; -wire _guard110 = _guard108 & _guard109; -wire _guard111 = fsm0_out == 3'd5; -wire _guard112 = fsm0_out == 3'd0; -wire _guard113 = invoke0_done_out; -wire _guard114 = _guard112 & _guard113; -wire _guard115 = tdcc_go_out; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = _guard111 | _guard116; -wire _guard118 = fsm0_out == 3'd1; -wire _guard119 = invoke1_done_out; -wire _guard120 = n_finished_last_transfer_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = _guard118 & _guard121; -wire _guard123 = tdcc_go_out; -wire _guard124 = _guard122 & _guard123; -wire _guard125 = _guard117 | _guard124; -wire _guard126 = fsm0_out == 3'd4; -wire _guard127 = par0_done_out; -wire _guard128 = n_finished_last_transfer_out; -wire _guard129 = _guard127 & _guard128; -wire _guard130 = _guard126 & _guard129; -wire _guard131 = tdcc_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = _guard125 | _guard132; -wire _guard134 = fsm0_out == 3'd2; -wire _guard135 = invoke2_done_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = tdcc_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = _guard133 | _guard138; -wire _guard140 = fsm0_out == 3'd3; -wire _guard141 = service_write_transfer_done_out; -wire _guard142 = _guard140 & _guard141; -wire _guard143 = tdcc_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = _guard139 | _guard144; -wire _guard146 = fsm0_out == 3'd1; -wire _guard147 = invoke1_done_out; -wire _guard148 = n_finished_last_transfer_out; -wire _guard149 = ~_guard148; -wire _guard150 = _guard147 & _guard149; -wire _guard151 = _guard146 & _guard150; -wire _guard152 = tdcc_go_out; -wire _guard153 = _guard151 & _guard152; -wire _guard154 = _guard145 | _guard153; -wire _guard155 = fsm0_out == 3'd4; -wire _guard156 = par0_done_out; -wire _guard157 = n_finished_last_transfer_out; -wire _guard158 = ~_guard157; -wire _guard159 = _guard156 & _guard158; -wire _guard160 = _guard155 & _guard159; -wire _guard161 = tdcc_go_out; -wire _guard162 = _guard160 & _guard161; -wire _guard163 = _guard154 | _guard162; -wire _guard164 = fsm0_out == 3'd1; -wire _guard165 = invoke1_done_out; -wire _guard166 = n_finished_last_transfer_out; -wire _guard167 = ~_guard166; -wire _guard168 = _guard165 & _guard167; -wire _guard169 = _guard164 & _guard168; -wire _guard170 = tdcc_go_out; -wire _guard171 = _guard169 & _guard170; -wire _guard172 = fsm0_out == 3'd4; -wire _guard173 = par0_done_out; -wire _guard174 = n_finished_last_transfer_out; -wire _guard175 = ~_guard174; -wire _guard176 = _guard173 & _guard175; -wire _guard177 = _guard172 & _guard176; -wire _guard178 = tdcc_go_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = _guard171 | _guard179; -wire _guard181 = fsm0_out == 3'd1; -wire _guard182 = invoke1_done_out; -wire _guard183 = n_finished_last_transfer_out; -wire _guard184 = _guard182 & _guard183; -wire _guard185 = _guard181 & _guard184; -wire _guard186 = tdcc_go_out; -wire _guard187 = _guard185 & _guard186; -wire _guard188 = fsm0_out == 3'd4; -wire _guard189 = par0_done_out; -wire _guard190 = n_finished_last_transfer_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = _guard188 & _guard191; -wire _guard193 = tdcc_go_out; -wire _guard194 = _guard192 & _guard193; -wire _guard195 = _guard187 | _guard194; -wire _guard196 = fsm0_out == 3'd3; -wire _guard197 = service_write_transfer_done_out; -wire _guard198 = _guard196 & _guard197; -wire _guard199 = tdcc_go_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = fsm0_out == 3'd0; -wire _guard202 = invoke0_done_out; -wire _guard203 = _guard201 & _guard202; -wire _guard204 = tdcc_go_out; -wire _guard205 = _guard203 & _guard204; -wire _guard206 = fsm0_out == 3'd5; -wire _guard207 = fsm0_out == 3'd2; -wire _guard208 = invoke2_done_out; -wire _guard209 = _guard207 & _guard208; -wire _guard210 = tdcc_go_out; -wire _guard211 = _guard209 & _guard210; -wire _guard212 = curr_addr_axi_incr_group_go_out; +wire _guard85 = early_reset_static_par_go_out; +wire _guard86 = pd_out; +wire _guard87 = pd0_out; +wire _guard88 = _guard86 & _guard87; +wire _guard89 = pd1_out; +wire _guard90 = _guard88 & _guard89; +wire _guard91 = curr_addr_axi_incr_group_done_out; +wire _guard92 = par0_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = _guard90 | _guard93; +wire _guard95 = curr_addr_axi_incr_group_done_out; +wire _guard96 = par0_go_out; +wire _guard97 = _guard95 & _guard96; +wire _guard98 = pd_out; +wire _guard99 = pd0_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = pd1_out; +wire _guard102 = _guard100 & _guard101; +wire _guard103 = fsm_out == 1'd0; +wire _guard104 = signal_reg_out; +wire _guard105 = _guard103 & _guard104; +wire _guard106 = invoke0_done_out; +wire _guard107 = ~_guard106; +wire _guard108 = fsm0_out == 3'd0; +wire _guard109 = _guard107 & _guard108; +wire _guard110 = tdcc_go_out; +wire _guard111 = _guard109 & _guard110; +wire _guard112 = fsm0_out == 3'd5; +wire _guard113 = fsm0_out == 3'd0; +wire _guard114 = invoke0_done_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = tdcc_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = _guard112 | _guard117; +wire _guard119 = fsm0_out == 3'd1; +wire _guard120 = invoke1_done_out; +wire _guard121 = n_finished_last_transfer_out; +wire _guard122 = _guard120 & _guard121; +wire _guard123 = _guard119 & _guard122; +wire _guard124 = tdcc_go_out; +wire _guard125 = _guard123 & _guard124; +wire _guard126 = _guard118 | _guard125; +wire _guard127 = fsm0_out == 3'd4; +wire _guard128 = par0_done_out; +wire _guard129 = n_finished_last_transfer_out; +wire _guard130 = _guard128 & _guard129; +wire _guard131 = _guard127 & _guard130; +wire _guard132 = tdcc_go_out; +wire _guard133 = _guard131 & _guard132; +wire _guard134 = _guard126 | _guard133; +wire _guard135 = fsm0_out == 3'd2; +wire _guard136 = invoke2_done_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = tdcc_go_out; +wire _guard139 = _guard137 & _guard138; +wire _guard140 = _guard134 | _guard139; +wire _guard141 = fsm0_out == 3'd3; +wire _guard142 = service_write_transfer_done_out; +wire _guard143 = _guard141 & _guard142; +wire _guard144 = tdcc_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard140 | _guard145; +wire _guard147 = fsm0_out == 3'd1; +wire _guard148 = invoke1_done_out; +wire _guard149 = n_finished_last_transfer_out; +wire _guard150 = ~_guard149; +wire _guard151 = _guard148 & _guard150; +wire _guard152 = _guard147 & _guard151; +wire _guard153 = tdcc_go_out; +wire _guard154 = _guard152 & _guard153; +wire _guard155 = _guard146 | _guard154; +wire _guard156 = fsm0_out == 3'd4; +wire _guard157 = par0_done_out; +wire _guard158 = n_finished_last_transfer_out; +wire _guard159 = ~_guard158; +wire _guard160 = _guard157 & _guard159; +wire _guard161 = _guard156 & _guard160; +wire _guard162 = tdcc_go_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = _guard155 | _guard163; +wire _guard165 = fsm0_out == 3'd1; +wire _guard166 = invoke1_done_out; +wire _guard167 = n_finished_last_transfer_out; +wire _guard168 = ~_guard167; +wire _guard169 = _guard166 & _guard168; +wire _guard170 = _guard165 & _guard169; +wire _guard171 = tdcc_go_out; +wire _guard172 = _guard170 & _guard171; +wire _guard173 = fsm0_out == 3'd4; +wire _guard174 = par0_done_out; +wire _guard175 = n_finished_last_transfer_out; +wire _guard176 = ~_guard175; +wire _guard177 = _guard174 & _guard176; +wire _guard178 = _guard173 & _guard177; +wire _guard179 = tdcc_go_out; +wire _guard180 = _guard178 & _guard179; +wire _guard181 = _guard172 | _guard180; +wire _guard182 = fsm0_out == 3'd1; +wire _guard183 = invoke1_done_out; +wire _guard184 = n_finished_last_transfer_out; +wire _guard185 = _guard183 & _guard184; +wire _guard186 = _guard182 & _guard185; +wire _guard187 = tdcc_go_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = fsm0_out == 3'd4; +wire _guard190 = par0_done_out; +wire _guard191 = n_finished_last_transfer_out; +wire _guard192 = _guard190 & _guard191; +wire _guard193 = _guard189 & _guard192; +wire _guard194 = tdcc_go_out; +wire _guard195 = _guard193 & _guard194; +wire _guard196 = _guard188 | _guard195; +wire _guard197 = fsm0_out == 3'd3; +wire _guard198 = service_write_transfer_done_out; +wire _guard199 = _guard197 & _guard198; +wire _guard200 = tdcc_go_out; +wire _guard201 = _guard199 & _guard200; +wire _guard202 = fsm0_out == 3'd0; +wire _guard203 = invoke0_done_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = tdcc_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = fsm0_out == 3'd5; +wire _guard208 = fsm0_out == 3'd2; +wire _guard209 = invoke2_done_out; +wire _guard210 = _guard208 & _guard209; +wire _guard211 = tdcc_go_out; +wire _guard212 = _guard210 & _guard211; wire _guard213 = curr_addr_axi_incr_group_go_out; -wire _guard214 = pd_out; -wire _guard215 = pd0_out; -wire _guard216 = _guard214 & _guard215; -wire _guard217 = pd1_out; -wire _guard218 = _guard216 & _guard217; -wire _guard219 = service_write_transfer_done_out; -wire _guard220 = ~_guard219; -wire _guard221 = fsm0_out == 3'd3; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = tdcc_go_out; -wire _guard224 = _guard222 & _guard223; -wire _guard225 = invoke1_done_out; -wire _guard226 = ~_guard225; -wire _guard227 = fsm0_out == 3'd1; -wire _guard228 = _guard226 & _guard227; -wire _guard229 = tdcc_go_out; -wire _guard230 = _guard228 & _guard229; -wire _guard231 = service_write_transfer_go_out; -wire _guard232 = invoke2_go_out; -wire _guard233 = _guard231 | _guard232; -wire _guard234 = wvalid_out; -wire _guard235 = WREADY; -wire _guard236 = _guard234 & _guard235; -wire _guard237 = service_write_transfer_go_out; -wire _guard238 = _guard236 & _guard237; -wire _guard239 = wvalid_out; -wire _guard240 = WREADY; -wire _guard241 = _guard239 & _guard240; -wire _guard242 = ~_guard241; -wire _guard243 = service_write_transfer_go_out; -wire _guard244 = _guard242 & _guard243; -wire _guard245 = invoke2_go_out; -wire _guard246 = _guard244 | _guard245; -wire _guard247 = fsm_out == 1'd0; -wire _guard248 = signal_reg_out; -wire _guard249 = _guard247 & _guard248; -wire _guard250 = fsm_out == 1'd0; -wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_static_par_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = _guard249 | _guard255; -wire _guard257 = fsm_out == 1'd0; -wire _guard258 = signal_reg_out; -wire _guard259 = ~_guard258; -wire _guard260 = _guard257 & _guard259; -wire _guard261 = wrapper_early_reset_static_par_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = fsm_out == 1'd0; -wire _guard264 = signal_reg_out; -wire _guard265 = _guard263 & _guard264; -wire _guard266 = pd_out; -wire _guard267 = pd0_out; -wire _guard268 = _guard266 & _guard267; -wire _guard269 = pd1_out; -wire _guard270 = _guard268 & _guard269; -wire _guard271 = wrapper_early_reset_static_par_done_out; -wire _guard272 = par0_go_out; -wire _guard273 = _guard271 & _guard272; -wire _guard274 = _guard270 | _guard273; -wire _guard275 = wrapper_early_reset_static_par_done_out; -wire _guard276 = par0_go_out; -wire _guard277 = _guard275 & _guard276; -wire _guard278 = pd_out; -wire _guard279 = pd0_out; -wire _guard280 = _guard278 & _guard279; -wire _guard281 = pd1_out; -wire _guard282 = _guard280 & _guard281; -wire _guard283 = pd_out; -wire _guard284 = pd0_out; -wire _guard285 = _guard283 & _guard284; -wire _guard286 = pd1_out; -wire _guard287 = _guard285 & _guard286; -wire _guard288 = curr_addr_internal_mem_incr_group_done_out; -wire _guard289 = par0_go_out; -wire _guard290 = _guard288 & _guard289; -wire _guard291 = _guard287 | _guard290; -wire _guard292 = curr_addr_internal_mem_incr_group_done_out; -wire _guard293 = par0_go_out; -wire _guard294 = _guard292 & _guard293; -wire _guard295 = pd_out; -wire _guard296 = pd0_out; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = pd1_out; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = w_handshake_occurred_out; -wire _guard301 = ~_guard300; -wire _guard302 = service_write_transfer_go_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = early_reset_static_par_go_out; -wire _guard305 = _guard303 | _guard304; -wire _guard306 = wvalid_out; -wire _guard307 = WREADY; -wire _guard308 = _guard306 & _guard307; -wire _guard309 = service_write_transfer_go_out; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = wvalid_out; -wire _guard312 = WREADY; -wire _guard313 = _guard311 & _guard312; -wire _guard314 = ~_guard313; -wire _guard315 = service_write_transfer_go_out; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = early_reset_static_par_go_out; -wire _guard318 = _guard316 | _guard317; -wire _guard319 = fsm0_out == 3'd5; -wire _guard320 = wrapper_early_reset_static_par_go_out; -wire _guard321 = pd0_out; -wire _guard322 = curr_addr_internal_mem_incr_group_done_out; -wire _guard323 = _guard321 | _guard322; -wire _guard324 = ~_guard323; -wire _guard325 = par0_go_out; -wire _guard326 = _guard324 & _guard325; -wire _guard327 = par0_done_out; -wire _guard328 = ~_guard327; -wire _guard329 = fsm0_out == 3'd4; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = tdcc_go_out; -wire _guard332 = _guard330 & _guard331; +wire _guard214 = curr_addr_axi_incr_group_go_out; +wire _guard215 = pd_out; +wire _guard216 = pd0_out; +wire _guard217 = _guard215 & _guard216; +wire _guard218 = pd1_out; +wire _guard219 = _guard217 & _guard218; +wire _guard220 = service_write_transfer_done_out; +wire _guard221 = ~_guard220; +wire _guard222 = fsm0_out == 3'd3; +wire _guard223 = _guard221 & _guard222; +wire _guard224 = tdcc_go_out; +wire _guard225 = _guard223 & _guard224; +wire _guard226 = invoke1_done_out; +wire _guard227 = ~_guard226; +wire _guard228 = fsm0_out == 3'd1; +wire _guard229 = _guard227 & _guard228; +wire _guard230 = tdcc_go_out; +wire _guard231 = _guard229 & _guard230; +wire _guard232 = service_write_transfer_go_out; +wire _guard233 = invoke2_go_out; +wire _guard234 = _guard232 | _guard233; +wire _guard235 = wvalid_out; +wire _guard236 = WREADY; +wire _guard237 = _guard235 & _guard236; +wire _guard238 = service_write_transfer_go_out; +wire _guard239 = _guard237 & _guard238; +wire _guard240 = wvalid_out; +wire _guard241 = WREADY; +wire _guard242 = _guard240 & _guard241; +wire _guard243 = ~_guard242; +wire _guard244 = service_write_transfer_go_out; +wire _guard245 = _guard243 & _guard244; +wire _guard246 = invoke2_go_out; +wire _guard247 = _guard245 | _guard246; +wire _guard248 = fsm_out == 1'd0; +wire _guard249 = signal_reg_out; +wire _guard250 = _guard248 & _guard249; +wire _guard251 = fsm_out == 1'd0; +wire _guard252 = signal_reg_out; +wire _guard253 = ~_guard252; +wire _guard254 = _guard251 & _guard253; +wire _guard255 = wrapper_early_reset_static_par_go_out; +wire _guard256 = _guard254 & _guard255; +wire _guard257 = _guard250 | _guard256; +wire _guard258 = fsm_out == 1'd0; +wire _guard259 = signal_reg_out; +wire _guard260 = ~_guard259; +wire _guard261 = _guard258 & _guard260; +wire _guard262 = wrapper_early_reset_static_par_go_out; +wire _guard263 = _guard261 & _guard262; +wire _guard264 = fsm_out == 1'd0; +wire _guard265 = signal_reg_out; +wire _guard266 = _guard264 & _guard265; +wire _guard267 = pd_out; +wire _guard268 = pd0_out; +wire _guard269 = _guard267 & _guard268; +wire _guard270 = pd1_out; +wire _guard271 = _guard269 & _guard270; +wire _guard272 = wrapper_early_reset_static_par_done_out; +wire _guard273 = par0_go_out; +wire _guard274 = _guard272 & _guard273; +wire _guard275 = _guard271 | _guard274; +wire _guard276 = wrapper_early_reset_static_par_done_out; +wire _guard277 = par0_go_out; +wire _guard278 = _guard276 & _guard277; +wire _guard279 = pd_out; +wire _guard280 = pd0_out; +wire _guard281 = _guard279 & _guard280; +wire _guard282 = pd1_out; +wire _guard283 = _guard281 & _guard282; +wire _guard284 = pd_out; +wire _guard285 = pd0_out; +wire _guard286 = _guard284 & _guard285; +wire _guard287 = pd1_out; +wire _guard288 = _guard286 & _guard287; +wire _guard289 = curr_addr_internal_mem_incr_group_done_out; +wire _guard290 = par0_go_out; +wire _guard291 = _guard289 & _guard290; +wire _guard292 = _guard288 | _guard291; +wire _guard293 = curr_addr_internal_mem_incr_group_done_out; +wire _guard294 = par0_go_out; +wire _guard295 = _guard293 & _guard294; +wire _guard296 = pd_out; +wire _guard297 = pd0_out; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = pd1_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = w_handshake_occurred_out; +wire _guard302 = ~_guard301; +wire _guard303 = service_write_transfer_go_out; +wire _guard304 = _guard302 & _guard303; +wire _guard305 = early_reset_static_par_go_out; +wire _guard306 = _guard304 | _guard305; +wire _guard307 = wvalid_out; +wire _guard308 = WREADY; +wire _guard309 = _guard307 & _guard308; +wire _guard310 = service_write_transfer_go_out; +wire _guard311 = _guard309 & _guard310; +wire _guard312 = wvalid_out; +wire _guard313 = WREADY; +wire _guard314 = _guard312 & _guard313; +wire _guard315 = ~_guard314; +wire _guard316 = service_write_transfer_go_out; +wire _guard317 = _guard315 & _guard316; +wire _guard318 = early_reset_static_par_go_out; +wire _guard319 = _guard317 | _guard318; +wire _guard320 = fsm0_out == 3'd5; +wire _guard321 = wrapper_early_reset_static_par_go_out; +wire _guard322 = pd0_out; +wire _guard323 = curr_addr_internal_mem_incr_group_done_out; +wire _guard324 = _guard322 | _guard323; +wire _guard325 = ~_guard324; +wire _guard326 = par0_go_out; +wire _guard327 = _guard325 & _guard326; +wire _guard328 = par0_done_out; +wire _guard329 = ~_guard328; +wire _guard330 = fsm0_out == 3'd4; +wire _guard331 = _guard329 & _guard330; +wire _guard332 = tdcc_go_out; +wire _guard333 = _guard331 & _guard332; assign curr_addr_axi_incr_group_go_in = _guard6; assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; assign curr_addr_internal_mem_incr_right = 3'd1; @@ -4407,127 +4427,123 @@ assign WVALID = wvalid_out; assign WDATA = _guard12 ? mem_ref_read_data : 32'd0; -assign curr_addr_axi_in = - _guard13 ? curr_addr_axi_incr_out : - 64'd0; +assign curr_addr_axi_in = curr_addr_axi_incr_out; assign curr_addr_internal_mem_write_en = _guard16; assign mem_ref_write_en = 1'd0; assign WLAST = _guard19 ? 1'd1 : _guard22 ? 1'd0 : 1'd0; -assign mem_ref_addr0 = - _guard23 ? curr_addr_internal_mem_out : - 3'd0; +assign mem_ref_addr0 = curr_addr_internal_mem_out; assign curr_addr_internal_mem_in = _guard24 ? curr_addr_internal_mem_incr_out : _guard25 ? 3'd0 : - 3'd0; + 'x; assign fsm_write_en = _guard26; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard29 ? adder_out : - _guard32 ? 1'd0 : + _guard30 ? adder_out : + _guard33 ? 1'd0 : 1'd0; assign adder_left = - _guard33 ? fsm_out : + _guard34 ? fsm_out : 1'd0; -assign adder_right = _guard34; -assign invoke2_go_in = _guard40; -assign curr_transfer_count_write_en = _guard41; +assign adder_right = _guard35; +assign invoke2_go_in = _guard41; +assign curr_transfer_count_write_en = _guard42; assign curr_transfer_count_clk = clk; assign curr_transfer_count_reset = reset; assign curr_transfer_count_in = curr_transfer_count_incr_out; -assign wvalid_write_en = _guard43; +assign wvalid_write_en = _guard44; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard52 ? 1'd1 : - _guard59 ? 1'd0 : + _guard53 ? 1'd1 : + _guard60 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard65; -assign n_finished_last_transfer_write_en = _guard74; +assign wrapper_early_reset_static_par_go_in = _guard66; +assign n_finished_last_transfer_write_en = _guard75; assign n_finished_last_transfer_clk = clk; assign n_finished_last_transfer_reset = reset; assign n_finished_last_transfer_in = - _guard75 ? 1'd1 : - _guard82 ? 1'd0 : + _guard76 ? 1'd1 : + _guard83 ? 1'd0 : 'x; assign curr_transfer_count_incr_left = curr_transfer_count_out; assign curr_transfer_count_incr_right = 8'd1; -assign pd1_write_en = _guard93; +assign pd1_write_en = _guard94; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard96 ? 1'd1 : - _guard101 ? 1'd0 : + _guard97 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; -assign wrapper_early_reset_static_par_done_in = _guard104; +assign wrapper_early_reset_static_par_done_in = _guard105; assign tdcc_go_in = go; -assign invoke0_go_in = _guard110; +assign invoke0_go_in = _guard111; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard163; +assign fsm0_write_en = _guard164; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard180 ? 3'd5 : - _guard195 ? 3'd2 : - _guard200 ? 3'd4 : - _guard205 ? 3'd1 : - _guard206 ? 3'd0 : - _guard211 ? 3'd3 : + _guard181 ? 3'd5 : + _guard196 ? 3'd2 : + _guard201 ? 3'd4 : + _guard206 ? 3'd1 : + _guard207 ? 3'd0 : + _guard212 ? 3'd3 : 3'd0; assign curr_addr_axi_incr_left = curr_addr_axi_out; assign curr_addr_axi_incr_right = 64'd4; assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; -assign par0_done_in = _guard218; -assign service_write_transfer_go_in = _guard224; +assign par0_done_in = _guard219; +assign service_write_transfer_go_in = _guard225; assign early_reset_static_par_done_in = ud_out; assign invoke0_done_in = curr_addr_internal_mem_done; -assign invoke1_go_in = _guard230; -assign bt_reg_write_en = _guard233; +assign invoke1_go_in = _guard231; +assign bt_reg_write_en = _guard234; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard238 ? 1'd1 : - _guard246 ? 1'd0 : + _guard239 ? 1'd1 : + _guard247 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard256; +assign signal_reg_write_en = _guard257; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard262 ? 1'd1 : - _guard265 ? 1'd0 : + _guard263 ? 1'd1 : + _guard266 ? 1'd0 : 1'd0; assign invoke2_done_in = bt_reg_done; -assign pd_write_en = _guard274; +assign pd_write_en = _guard275; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard277 ? 1'd1 : - _guard282 ? 1'd0 : + _guard278 ? 1'd1 : + _guard283 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard291; +assign pd0_write_en = _guard292; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard294 ? 1'd1 : - _guard299 ? 1'd0 : + _guard295 ? 1'd1 : + _guard300 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard305; +assign w_handshake_occurred_write_en = _guard306; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard310 ? 1'd1 : - _guard318 ? 1'd0 : + _guard311 ? 1'd1 : + _guard319 ? 1'd0 : 'x; -assign tdcc_done_in = _guard319; -assign early_reset_static_par_go_in = _guard320; -assign curr_addr_internal_mem_incr_group_go_in = _guard326; +assign tdcc_done_in = _guard320; +assign early_reset_static_par_go_in = _guard321; +assign curr_addr_internal_mem_incr_group_go_in = _guard327; assign invoke1_done_in = n_finished_last_transfer_done; assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; -assign par0_go_in = _guard332; +assign par0_go_in = _guard333; // COMPONENT END: m_write_channel endmodule module m_bresp_channel( @@ -4842,24 +4858,24 @@ logic main_compute_go; logic main_compute_clk; logic main_compute_reset; logic main_compute_done; -logic main_compute_A0_done; logic [31:0] main_compute_A0_read_data; logic [31:0] main_compute_B0_read_data; +logic main_compute_B0_write_en; +logic main_compute_Sum0_done; +logic [31:0] main_compute_A0_write_data; logic [2:0] main_compute_Sum0_addr0; +logic main_compute_A0_write_en; +logic [2:0] main_compute_B0_addr0; +logic main_compute_B0_content_en; +logic main_compute_B0_done; logic [2:0] main_compute_A0_addr0; +logic main_compute_A0_done; logic main_compute_Sum0_write_en; -logic [31:0] main_compute_Sum0_write_data; -logic main_compute_A0_content_en; logic [31:0] main_compute_B0_write_data; -logic main_compute_B0_done; -logic [31:0] main_compute_Sum0_read_data; -logic [31:0] main_compute_A0_write_data; -logic main_compute_A0_write_en; -logic main_compute_B0_write_en; -logic main_compute_B0_content_en; logic main_compute_Sum0_content_en; -logic main_compute_Sum0_done; -logic [2:0] main_compute_B0_addr0; +logic [31:0] main_compute_Sum0_write_data; +logic [31:0] main_compute_Sum0_read_data; +logic main_compute_A0_content_en; logic [2:0] curr_addr_internal_mem_A0_in; logic curr_addr_internal_mem_A0_write_en; logic curr_addr_internal_mem_A0_clk; @@ -4884,9 +4900,9 @@ logic ar_channel_A0_go; logic ar_channel_A0_clk; logic ar_channel_A0_reset; logic ar_channel_A0_done; +logic [63:0] ar_channel_A0_curr_addr_axi_out; logic ar_channel_A0_curr_addr_axi_write_en; logic [63:0] ar_channel_A0_curr_addr_axi_in; -logic [63:0] ar_channel_A0_curr_addr_axi_out; logic ar_channel_A0_curr_addr_axi_done; logic read_channel_A0_ARESETn; logic read_channel_A0_RVALID; @@ -4898,20 +4914,20 @@ logic read_channel_A0_go; logic read_channel_A0_clk; logic read_channel_A0_reset; logic read_channel_A0_done; +logic read_channel_A0_mem_ref_content_en; +logic [2:0] read_channel_A0_curr_addr_internal_mem_out; logic [63:0] read_channel_A0_curr_addr_axi_out; -logic read_channel_A0_curr_addr_axi_done; -logic [31:0] read_channel_A0_mem_ref_read_data; +logic read_channel_A0_curr_addr_axi_write_en; +logic [63:0] read_channel_A0_curr_addr_axi_in; logic read_channel_A0_curr_addr_internal_mem_write_en; -logic read_channel_A0_mem_ref_done; logic [31:0] read_channel_A0_mem_ref_write_data; logic read_channel_A0_mem_ref_write_en; -logic read_channel_A0_curr_addr_axi_write_en; -logic read_channel_A0_mem_ref_content_en; -logic [2:0] read_channel_A0_curr_addr_internal_mem_out; +logic [31:0] read_channel_A0_mem_ref_read_data; +logic read_channel_A0_mem_ref_done; logic [2:0] read_channel_A0_mem_ref_addr0; -logic read_channel_A0_curr_addr_internal_mem_done; logic [2:0] read_channel_A0_curr_addr_internal_mem_in; -logic [63:0] read_channel_A0_curr_addr_axi_in; +logic read_channel_A0_curr_addr_internal_mem_done; +logic read_channel_A0_curr_addr_axi_done; logic internal_mem_A0_clk; logic internal_mem_A0_reset; logic [2:0] internal_mem_A0_addr0; @@ -4938,14 +4954,14 @@ logic aw_channel_A0_go; logic aw_channel_A0_clk; logic aw_channel_A0_reset; logic aw_channel_A0_done; -logic [63:0] aw_channel_A0_curr_addr_axi_in; +logic [63:0] aw_channel_A0_curr_addr_axi_out; +logic [7:0] aw_channel_A0_max_transfers_out; logic aw_channel_A0_curr_addr_axi_write_en; +logic [63:0] aw_channel_A0_curr_addr_axi_in; +logic aw_channel_A0_max_transfers_done; logic [7:0] aw_channel_A0_max_transfers_in; -logic [63:0] aw_channel_A0_curr_addr_axi_out; -logic aw_channel_A0_curr_addr_axi_done; logic aw_channel_A0_max_transfers_write_en; -logic aw_channel_A0_max_transfers_done; -logic [7:0] aw_channel_A0_max_transfers_out; +logic aw_channel_A0_curr_addr_axi_done; logic write_channel_A0_ARESETn; logic write_channel_A0_WREADY; logic write_channel_A0_WVALID; @@ -4955,24 +4971,24 @@ logic write_channel_A0_go; logic write_channel_A0_clk; logic write_channel_A0_reset; logic write_channel_A0_done; -logic write_channel_A0_mem_ref_write_en; -logic write_channel_A0_mem_ref_done; -logic [31:0] write_channel_A0_mem_ref_read_data; -logic write_channel_A0_curr_addr_internal_mem_write_en; +logic write_channel_A0_mem_ref_content_en; logic [2:0] write_channel_A0_curr_addr_internal_mem_out; -logic [7:0] write_channel_A0_max_transfers_in; -logic write_channel_A0_max_transfers_write_en; +logic [63:0] write_channel_A0_curr_addr_axi_out; +logic [7:0] write_channel_A0_max_transfers_out; +logic write_channel_A0_curr_addr_axi_write_en; logic [63:0] write_channel_A0_curr_addr_axi_in; +logic write_channel_A0_max_transfers_done; +logic write_channel_A0_curr_addr_internal_mem_write_en; logic [31:0] write_channel_A0_mem_ref_write_data; +logic write_channel_A0_mem_ref_write_en; +logic [31:0] write_channel_A0_mem_ref_read_data; +logic [7:0] write_channel_A0_max_transfers_in; +logic write_channel_A0_mem_ref_done; logic [2:0] write_channel_A0_mem_ref_addr0; logic [2:0] write_channel_A0_curr_addr_internal_mem_in; +logic write_channel_A0_max_transfers_write_en; logic write_channel_A0_curr_addr_internal_mem_done; -logic write_channel_A0_curr_addr_axi_write_en; -logic write_channel_A0_max_transfers_done; -logic [63:0] write_channel_A0_curr_addr_axi_out; logic write_channel_A0_curr_addr_axi_done; -logic [7:0] write_channel_A0_max_transfers_out; -logic write_channel_A0_mem_ref_content_en; logic bresp_channel_A0_ARESETn; logic bresp_channel_A0_BVALID; logic bresp_channel_A0_BREADY; @@ -5004,9 +5020,9 @@ logic ar_channel_B0_go; logic ar_channel_B0_clk; logic ar_channel_B0_reset; logic ar_channel_B0_done; +logic [63:0] ar_channel_B0_curr_addr_axi_out; logic ar_channel_B0_curr_addr_axi_write_en; logic [63:0] ar_channel_B0_curr_addr_axi_in; -logic [63:0] ar_channel_B0_curr_addr_axi_out; logic ar_channel_B0_curr_addr_axi_done; logic read_channel_B0_ARESETn; logic read_channel_B0_RVALID; @@ -5018,20 +5034,20 @@ logic read_channel_B0_go; logic read_channel_B0_clk; logic read_channel_B0_reset; logic read_channel_B0_done; +logic read_channel_B0_mem_ref_content_en; +logic [2:0] read_channel_B0_curr_addr_internal_mem_out; logic [63:0] read_channel_B0_curr_addr_axi_out; -logic read_channel_B0_curr_addr_axi_done; -logic [31:0] read_channel_B0_mem_ref_read_data; +logic read_channel_B0_curr_addr_axi_write_en; +logic [63:0] read_channel_B0_curr_addr_axi_in; logic read_channel_B0_curr_addr_internal_mem_write_en; -logic read_channel_B0_mem_ref_done; logic [31:0] read_channel_B0_mem_ref_write_data; logic read_channel_B0_mem_ref_write_en; -logic read_channel_B0_curr_addr_axi_write_en; -logic read_channel_B0_mem_ref_content_en; -logic [2:0] read_channel_B0_curr_addr_internal_mem_out; +logic [31:0] read_channel_B0_mem_ref_read_data; +logic read_channel_B0_mem_ref_done; logic [2:0] read_channel_B0_mem_ref_addr0; -logic read_channel_B0_curr_addr_internal_mem_done; logic [2:0] read_channel_B0_curr_addr_internal_mem_in; -logic [63:0] read_channel_B0_curr_addr_axi_in; +logic read_channel_B0_curr_addr_internal_mem_done; +logic read_channel_B0_curr_addr_axi_done; logic internal_mem_B0_clk; logic internal_mem_B0_reset; logic [2:0] internal_mem_B0_addr0; @@ -5058,14 +5074,14 @@ logic aw_channel_B0_go; logic aw_channel_B0_clk; logic aw_channel_B0_reset; logic aw_channel_B0_done; -logic [63:0] aw_channel_B0_curr_addr_axi_in; +logic [63:0] aw_channel_B0_curr_addr_axi_out; +logic [7:0] aw_channel_B0_max_transfers_out; logic aw_channel_B0_curr_addr_axi_write_en; +logic [63:0] aw_channel_B0_curr_addr_axi_in; +logic aw_channel_B0_max_transfers_done; logic [7:0] aw_channel_B0_max_transfers_in; -logic [63:0] aw_channel_B0_curr_addr_axi_out; -logic aw_channel_B0_curr_addr_axi_done; logic aw_channel_B0_max_transfers_write_en; -logic aw_channel_B0_max_transfers_done; -logic [7:0] aw_channel_B0_max_transfers_out; +logic aw_channel_B0_curr_addr_axi_done; logic write_channel_B0_ARESETn; logic write_channel_B0_WREADY; logic write_channel_B0_WVALID; @@ -5075,24 +5091,24 @@ logic write_channel_B0_go; logic write_channel_B0_clk; logic write_channel_B0_reset; logic write_channel_B0_done; -logic write_channel_B0_mem_ref_write_en; -logic write_channel_B0_mem_ref_done; -logic [31:0] write_channel_B0_mem_ref_read_data; -logic write_channel_B0_curr_addr_internal_mem_write_en; +logic write_channel_B0_mem_ref_content_en; logic [2:0] write_channel_B0_curr_addr_internal_mem_out; -logic [7:0] write_channel_B0_max_transfers_in; -logic write_channel_B0_max_transfers_write_en; +logic [63:0] write_channel_B0_curr_addr_axi_out; +logic [7:0] write_channel_B0_max_transfers_out; +logic write_channel_B0_curr_addr_axi_write_en; logic [63:0] write_channel_B0_curr_addr_axi_in; +logic write_channel_B0_max_transfers_done; +logic write_channel_B0_curr_addr_internal_mem_write_en; logic [31:0] write_channel_B0_mem_ref_write_data; +logic write_channel_B0_mem_ref_write_en; +logic [31:0] write_channel_B0_mem_ref_read_data; +logic [7:0] write_channel_B0_max_transfers_in; +logic write_channel_B0_mem_ref_done; logic [2:0] write_channel_B0_mem_ref_addr0; logic [2:0] write_channel_B0_curr_addr_internal_mem_in; +logic write_channel_B0_max_transfers_write_en; logic write_channel_B0_curr_addr_internal_mem_done; -logic write_channel_B0_curr_addr_axi_write_en; -logic write_channel_B0_max_transfers_done; -logic [63:0] write_channel_B0_curr_addr_axi_out; logic write_channel_B0_curr_addr_axi_done; -logic [7:0] write_channel_B0_max_transfers_out; -logic write_channel_B0_mem_ref_content_en; logic bresp_channel_B0_ARESETn; logic bresp_channel_B0_BVALID; logic bresp_channel_B0_BREADY; @@ -5124,9 +5140,9 @@ logic ar_channel_Sum0_go; logic ar_channel_Sum0_clk; logic ar_channel_Sum0_reset; logic ar_channel_Sum0_done; +logic [63:0] ar_channel_Sum0_curr_addr_axi_out; logic ar_channel_Sum0_curr_addr_axi_write_en; logic [63:0] ar_channel_Sum0_curr_addr_axi_in; -logic [63:0] ar_channel_Sum0_curr_addr_axi_out; logic ar_channel_Sum0_curr_addr_axi_done; logic read_channel_Sum0_ARESETn; logic read_channel_Sum0_RVALID; @@ -5138,20 +5154,20 @@ logic read_channel_Sum0_go; logic read_channel_Sum0_clk; logic read_channel_Sum0_reset; logic read_channel_Sum0_done; +logic read_channel_Sum0_mem_ref_content_en; +logic [2:0] read_channel_Sum0_curr_addr_internal_mem_out; logic [63:0] read_channel_Sum0_curr_addr_axi_out; -logic read_channel_Sum0_curr_addr_axi_done; -logic [31:0] read_channel_Sum0_mem_ref_read_data; +logic read_channel_Sum0_curr_addr_axi_write_en; +logic [63:0] read_channel_Sum0_curr_addr_axi_in; logic read_channel_Sum0_curr_addr_internal_mem_write_en; -logic read_channel_Sum0_mem_ref_done; logic [31:0] read_channel_Sum0_mem_ref_write_data; logic read_channel_Sum0_mem_ref_write_en; -logic read_channel_Sum0_curr_addr_axi_write_en; -logic read_channel_Sum0_mem_ref_content_en; -logic [2:0] read_channel_Sum0_curr_addr_internal_mem_out; +logic [31:0] read_channel_Sum0_mem_ref_read_data; +logic read_channel_Sum0_mem_ref_done; logic [2:0] read_channel_Sum0_mem_ref_addr0; -logic read_channel_Sum0_curr_addr_internal_mem_done; logic [2:0] read_channel_Sum0_curr_addr_internal_mem_in; -logic [63:0] read_channel_Sum0_curr_addr_axi_in; +logic read_channel_Sum0_curr_addr_internal_mem_done; +logic read_channel_Sum0_curr_addr_axi_done; logic internal_mem_Sum0_clk; logic internal_mem_Sum0_reset; logic [2:0] internal_mem_Sum0_addr0; @@ -5178,14 +5194,14 @@ logic aw_channel_Sum0_go; logic aw_channel_Sum0_clk; logic aw_channel_Sum0_reset; logic aw_channel_Sum0_done; -logic [63:0] aw_channel_Sum0_curr_addr_axi_in; +logic [63:0] aw_channel_Sum0_curr_addr_axi_out; +logic [7:0] aw_channel_Sum0_max_transfers_out; logic aw_channel_Sum0_curr_addr_axi_write_en; +logic [63:0] aw_channel_Sum0_curr_addr_axi_in; +logic aw_channel_Sum0_max_transfers_done; logic [7:0] aw_channel_Sum0_max_transfers_in; -logic [63:0] aw_channel_Sum0_curr_addr_axi_out; -logic aw_channel_Sum0_curr_addr_axi_done; logic aw_channel_Sum0_max_transfers_write_en; -logic aw_channel_Sum0_max_transfers_done; -logic [7:0] aw_channel_Sum0_max_transfers_out; +logic aw_channel_Sum0_curr_addr_axi_done; logic write_channel_Sum0_ARESETn; logic write_channel_Sum0_WREADY; logic write_channel_Sum0_WVALID; @@ -5195,24 +5211,24 @@ logic write_channel_Sum0_go; logic write_channel_Sum0_clk; logic write_channel_Sum0_reset; logic write_channel_Sum0_done; -logic write_channel_Sum0_mem_ref_write_en; -logic write_channel_Sum0_mem_ref_done; -logic [31:0] write_channel_Sum0_mem_ref_read_data; -logic write_channel_Sum0_curr_addr_internal_mem_write_en; +logic write_channel_Sum0_mem_ref_content_en; logic [2:0] write_channel_Sum0_curr_addr_internal_mem_out; -logic [7:0] write_channel_Sum0_max_transfers_in; -logic write_channel_Sum0_max_transfers_write_en; +logic [63:0] write_channel_Sum0_curr_addr_axi_out; +logic [7:0] write_channel_Sum0_max_transfers_out; +logic write_channel_Sum0_curr_addr_axi_write_en; logic [63:0] write_channel_Sum0_curr_addr_axi_in; +logic write_channel_Sum0_max_transfers_done; +logic write_channel_Sum0_curr_addr_internal_mem_write_en; logic [31:0] write_channel_Sum0_mem_ref_write_data; +logic write_channel_Sum0_mem_ref_write_en; +logic [31:0] write_channel_Sum0_mem_ref_read_data; +logic [7:0] write_channel_Sum0_max_transfers_in; +logic write_channel_Sum0_mem_ref_done; logic [2:0] write_channel_Sum0_mem_ref_addr0; logic [2:0] write_channel_Sum0_curr_addr_internal_mem_in; +logic write_channel_Sum0_max_transfers_write_en; logic write_channel_Sum0_curr_addr_internal_mem_done; -logic write_channel_Sum0_curr_addr_axi_write_en; -logic write_channel_Sum0_max_transfers_done; -logic [63:0] write_channel_Sum0_curr_addr_axi_out; logic write_channel_Sum0_curr_addr_axi_done; -logic [7:0] write_channel_Sum0_max_transfers_out; -logic write_channel_Sum0_mem_ref_content_en; logic bresp_channel_Sum0_ARESETn; logic bresp_channel_Sum0_BVALID; logic bresp_channel_Sum0_BREADY; @@ -5226,14 +5242,14 @@ logic fsm_clk; logic fsm_reset; logic fsm_out; logic fsm_done; -logic ud_out; logic adder_left; logic adder_right; logic adder_out; -logic ud0_out; logic adder0_left; logic adder0_right; logic adder0_out; +logic ud_out; +logic ud0_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; @@ -5912,11 +5928,6 @@ std_reg # ( .reset(fsm_reset), .write_en(fsm_write_en) ); -undef # ( - .WIDTH(1) -) ud ( - .out(ud_out) -); std_add # ( .WIDTH(1) ) adder ( @@ -5924,11 +5935,6 @@ std_add # ( .out(adder_out), .right(adder_right) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); std_add # ( .WIDTH(1) ) adder0 ( @@ -5936,6 +5942,16 @@ std_add # ( .out(adder0_out), .right(adder0_right) ); +undef # ( + .WIDTH(1) +) ud ( + .out(ud_out) +); +undef # ( + .WIDTH(1) +) ud0 ( + .out(ud0_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -6449,60 +6465,60 @@ wire _guard21 = invoke11_go_out; wire _guard22 = invoke11_go_out; wire _guard23 = invoke11_go_out; wire _guard24 = invoke11_go_out; -wire _guard25 = invoke11_go_out; -wire _guard26 = tdcc5_done_out; -wire _guard27 = invoke20_go_out; +wire _guard25 = tdcc5_done_out; +wire _guard26 = invoke20_go_out; +wire _guard27 = invoke10_go_out; wire _guard28 = invoke10_go_out; -wire _guard29 = invoke10_go_out; +wire _guard29 = invoke22_go_out; wire _guard30 = invoke22_go_out; -wire _guard31 = invoke22_go_out; -wire _guard32 = invoke6_go_out; -wire _guard33 = invoke16_go_out; -wire _guard34 = invoke19_go_out; -wire _guard35 = invoke23_go_out; -wire _guard36 = invoke18_go_out; -wire _guard37 = invoke19_go_out; -wire _guard38 = invoke11_go_out; -wire _guard39 = invoke8_go_out; -wire _guard40 = invoke19_go_out; -wire _guard41 = invoke20_go_out; -wire _guard42 = invoke22_go_out; -wire _guard43 = invoke16_go_out; -wire _guard44 = invoke8_go_out; -wire _guard45 = invoke17_go_out; -wire _guard46 = invoke8_go_out; -wire _guard47 = invoke19_go_out; -wire _guard48 = invoke22_go_out; -wire _guard49 = invoke6_go_out; -wire _guard50 = invoke16_go_out; -wire _guard51 = invoke23_go_out; -wire _guard52 = invoke24_go_out; -wire _guard53 = invoke17_go_out; -wire _guard54 = invoke6_go_out; -wire _guard55 = invoke17_go_out; -wire _guard56 = invoke10_go_out; -wire _guard57 = invoke22_go_out; -wire _guard58 = invoke23_go_out; -wire _guard59 = invoke7_go_out; -wire _guard60 = invoke9_go_out; -wire _guard61 = invoke20_go_out; -wire _guard62 = invoke21_go_out; -wire _guard63 = invoke16_go_out; -wire _guard64 = invoke8_go_out; -wire _guard65 = invoke16_go_out; -wire _guard66 = invoke8_go_out; +wire _guard31 = invoke6_go_out; +wire _guard32 = invoke16_go_out; +wire _guard33 = invoke19_go_out; +wire _guard34 = invoke23_go_out; +wire _guard35 = invoke18_go_out; +wire _guard36 = invoke19_go_out; +wire _guard37 = invoke11_go_out; +wire _guard38 = invoke8_go_out; +wire _guard39 = invoke19_go_out; +wire _guard40 = invoke20_go_out; +wire _guard41 = invoke22_go_out; +wire _guard42 = invoke16_go_out; +wire _guard43 = invoke8_go_out; +wire _guard44 = invoke17_go_out; +wire _guard45 = invoke8_go_out; +wire _guard46 = invoke19_go_out; +wire _guard47 = invoke22_go_out; +wire _guard48 = invoke6_go_out; +wire _guard49 = invoke16_go_out; +wire _guard50 = invoke23_go_out; +wire _guard51 = invoke24_go_out; +wire _guard52 = invoke17_go_out; +wire _guard53 = invoke6_go_out; +wire _guard54 = invoke17_go_out; +wire _guard55 = invoke10_go_out; +wire _guard56 = invoke22_go_out; +wire _guard57 = invoke23_go_out; +wire _guard58 = invoke7_go_out; +wire _guard59 = invoke9_go_out; +wire _guard60 = invoke20_go_out; +wire _guard61 = invoke21_go_out; +wire _guard62 = invoke16_go_out; +wire _guard63 = invoke8_go_out; +wire _guard64 = invoke16_go_out; +wire _guard65 = invoke8_go_out; +wire _guard66 = invoke10_go_out; wire _guard67 = invoke10_go_out; -wire _guard68 = invoke10_go_out; -wire _guard69 = invoke22_go_out; -wire _guard70 = invoke6_go_out; -wire _guard71 = invoke16_go_out; +wire _guard68 = invoke22_go_out; +wire _guard69 = invoke6_go_out; +wire _guard70 = invoke16_go_out; +wire _guard71 = invoke19_go_out; wire _guard72 = invoke19_go_out; -wire _guard73 = invoke19_go_out; -wire _guard74 = invoke6_go_out; -wire _guard75 = early_reset_static_par_go_out; -wire _guard76 = early_reset_static_par0_go_out; -wire _guard77 = _guard75 | _guard76; -wire _guard78 = fsm_out != 1'd0; +wire _guard73 = invoke6_go_out; +wire _guard74 = early_reset_static_par_go_out; +wire _guard75 = early_reset_static_par0_go_out; +wire _guard76 = _guard74 | _guard75; +wire _guard77 = fsm_out == 1'd0; +wire _guard78 = ~_guard77; wire _guard79 = early_reset_static_par_go_out; wire _guard80 = _guard78 & _guard79; wire _guard81 = fsm_out == 1'd0; @@ -6512,88 +6528,88 @@ wire _guard84 = fsm_out == 1'd0; wire _guard85 = early_reset_static_par0_go_out; wire _guard86 = _guard84 & _guard85; wire _guard87 = _guard83 | _guard86; -wire _guard88 = fsm_out != 1'd0; -wire _guard89 = early_reset_static_par0_go_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = early_reset_static_par_go_out; +wire _guard88 = fsm_out == 1'd0; +wire _guard89 = ~_guard88; +wire _guard90 = early_reset_static_par0_go_out; +wire _guard91 = _guard89 & _guard90; wire _guard92 = early_reset_static_par_go_out; -wire _guard93 = fsm6_out == 3'd5; -wire _guard94 = fsm6_out == 3'd0; -wire _guard95 = wrapper_early_reset_static_par_done_out; -wire _guard96 = _guard94 & _guard95; -wire _guard97 = tdcc5_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = _guard93 | _guard98; -wire _guard100 = fsm6_out == 3'd1; -wire _guard101 = par0_done_out; -wire _guard102 = _guard100 & _guard101; -wire _guard103 = tdcc5_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = _guard99 | _guard104; -wire _guard106 = fsm6_out == 3'd2; -wire _guard107 = invoke12_done_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = tdcc5_go_out; -wire _guard110 = _guard108 & _guard109; -wire _guard111 = _guard105 | _guard110; -wire _guard112 = fsm6_out == 3'd3; -wire _guard113 = wrapper_early_reset_static_par0_done_out; -wire _guard114 = _guard112 & _guard113; -wire _guard115 = tdcc5_go_out; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = _guard111 | _guard116; -wire _guard118 = fsm6_out == 3'd4; -wire _guard119 = par1_done_out; -wire _guard120 = _guard118 & _guard119; -wire _guard121 = tdcc5_go_out; -wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard117 | _guard122; -wire _guard124 = fsm6_out == 3'd4; -wire _guard125 = par1_done_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = tdcc5_go_out; -wire _guard128 = _guard126 & _guard127; -wire _guard129 = fsm6_out == 3'd1; -wire _guard130 = par0_done_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = tdcc5_go_out; -wire _guard133 = _guard131 & _guard132; -wire _guard134 = fsm6_out == 3'd3; -wire _guard135 = wrapper_early_reset_static_par0_done_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = tdcc5_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = fsm6_out == 3'd0; -wire _guard140 = wrapper_early_reset_static_par_done_out; -wire _guard141 = _guard139 & _guard140; -wire _guard142 = tdcc5_go_out; -wire _guard143 = _guard141 & _guard142; -wire _guard144 = fsm6_out == 3'd5; -wire _guard145 = fsm6_out == 3'd2; -wire _guard146 = invoke12_done_out; -wire _guard147 = _guard145 & _guard146; -wire _guard148 = tdcc5_go_out; -wire _guard149 = _guard147 & _guard148; -wire _guard150 = wrapper_early_reset_static_par0_go_out; -wire _guard151 = invoke18_done_out; -wire _guard152 = ~_guard151; -wire _guard153 = fsm3_out == 2'd2; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = tdcc2_go_out; -wire _guard156 = _guard154 & _guard155; -wire _guard157 = pd2_out; -wire _guard158 = tdcc2_done_out; -wire _guard159 = _guard157 | _guard158; -wire _guard160 = ~_guard159; -wire _guard161 = par1_go_out; -wire _guard162 = _guard160 & _guard161; -wire _guard163 = invoke9_go_out; -wire _guard164 = early_reset_static_par_go_out; -wire _guard165 = invoke20_go_out; -wire _guard166 = invoke9_go_out; -wire _guard167 = invoke20_go_out; -wire _guard168 = early_reset_static_par_go_out; -wire _guard169 = invoke9_go_out; +wire _guard93 = early_reset_static_par_go_out; +wire _guard94 = fsm6_out == 3'd5; +wire _guard95 = fsm6_out == 3'd0; +wire _guard96 = wrapper_early_reset_static_par_done_out; +wire _guard97 = _guard95 & _guard96; +wire _guard98 = tdcc5_go_out; +wire _guard99 = _guard97 & _guard98; +wire _guard100 = _guard94 | _guard99; +wire _guard101 = fsm6_out == 3'd1; +wire _guard102 = par0_done_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = tdcc5_go_out; +wire _guard105 = _guard103 & _guard104; +wire _guard106 = _guard100 | _guard105; +wire _guard107 = fsm6_out == 3'd2; +wire _guard108 = invoke12_done_out; +wire _guard109 = _guard107 & _guard108; +wire _guard110 = tdcc5_go_out; +wire _guard111 = _guard109 & _guard110; +wire _guard112 = _guard106 | _guard111; +wire _guard113 = fsm6_out == 3'd3; +wire _guard114 = wrapper_early_reset_static_par0_done_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = tdcc5_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = _guard112 | _guard117; +wire _guard119 = fsm6_out == 3'd4; +wire _guard120 = par1_done_out; +wire _guard121 = _guard119 & _guard120; +wire _guard122 = tdcc5_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = _guard118 | _guard123; +wire _guard125 = fsm6_out == 3'd4; +wire _guard126 = par1_done_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = tdcc5_go_out; +wire _guard129 = _guard127 & _guard128; +wire _guard130 = fsm6_out == 3'd1; +wire _guard131 = par0_done_out; +wire _guard132 = _guard130 & _guard131; +wire _guard133 = tdcc5_go_out; +wire _guard134 = _guard132 & _guard133; +wire _guard135 = fsm6_out == 3'd3; +wire _guard136 = wrapper_early_reset_static_par0_done_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = tdcc5_go_out; +wire _guard139 = _guard137 & _guard138; +wire _guard140 = fsm6_out == 3'd0; +wire _guard141 = wrapper_early_reset_static_par_done_out; +wire _guard142 = _guard140 & _guard141; +wire _guard143 = tdcc5_go_out; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = fsm6_out == 3'd5; +wire _guard146 = fsm6_out == 3'd2; +wire _guard147 = invoke12_done_out; +wire _guard148 = _guard146 & _guard147; +wire _guard149 = tdcc5_go_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = wrapper_early_reset_static_par0_go_out; +wire _guard152 = invoke18_done_out; +wire _guard153 = ~_guard152; +wire _guard154 = fsm3_out == 2'd2; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = tdcc2_go_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = pd2_out; +wire _guard159 = tdcc2_done_out; +wire _guard160 = _guard158 | _guard159; +wire _guard161 = ~_guard160; +wire _guard162 = par1_go_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = invoke9_go_out; +wire _guard165 = early_reset_static_par_go_out; +wire _guard166 = invoke20_go_out; +wire _guard167 = invoke9_go_out; +wire _guard168 = invoke20_go_out; +wire _guard169 = early_reset_static_par_go_out; wire _guard170 = invoke9_go_out; wire _guard171 = invoke9_go_out; wire _guard172 = invoke9_go_out; @@ -6615,661 +6631,618 @@ wire _guard187 = invoke9_go_out; wire _guard188 = invoke12_go_out; wire _guard189 = invoke20_go_out; wire _guard190 = invoke9_go_out; -wire _guard191 = invoke12_go_out; -wire _guard192 = invoke20_go_out; -wire _guard193 = invoke24_go_out; -wire _guard194 = invoke24_go_out; -wire _guard195 = fsm3_out == 2'd3; -wire _guard196 = fsm3_out == 2'd0; -wire _guard197 = invoke16_done_out; +wire _guard191 = invoke24_go_out; +wire _guard192 = invoke24_go_out; +wire _guard193 = fsm3_out == 2'd3; +wire _guard194 = fsm3_out == 2'd0; +wire _guard195 = invoke16_done_out; +wire _guard196 = _guard194 & _guard195; +wire _guard197 = tdcc2_go_out; wire _guard198 = _guard196 & _guard197; -wire _guard199 = tdcc2_go_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = _guard195 | _guard200; -wire _guard202 = fsm3_out == 2'd1; -wire _guard203 = invoke17_done_out; +wire _guard199 = _guard193 | _guard198; +wire _guard200 = fsm3_out == 2'd1; +wire _guard201 = invoke17_done_out; +wire _guard202 = _guard200 & _guard201; +wire _guard203 = tdcc2_go_out; wire _guard204 = _guard202 & _guard203; -wire _guard205 = tdcc2_go_out; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = _guard201 | _guard206; -wire _guard208 = fsm3_out == 2'd2; -wire _guard209 = invoke18_done_out; +wire _guard205 = _guard199 | _guard204; +wire _guard206 = fsm3_out == 2'd2; +wire _guard207 = invoke18_done_out; +wire _guard208 = _guard206 & _guard207; +wire _guard209 = tdcc2_go_out; wire _guard210 = _guard208 & _guard209; -wire _guard211 = tdcc2_go_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = _guard207 | _guard212; -wire _guard214 = fsm3_out == 2'd0; -wire _guard215 = invoke16_done_out; +wire _guard211 = _guard205 | _guard210; +wire _guard212 = fsm3_out == 2'd0; +wire _guard213 = invoke16_done_out; +wire _guard214 = _guard212 & _guard213; +wire _guard215 = tdcc2_go_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = tdcc2_go_out; -wire _guard218 = _guard216 & _guard217; -wire _guard219 = fsm3_out == 2'd3; -wire _guard220 = fsm3_out == 2'd2; -wire _guard221 = invoke18_done_out; +wire _guard217 = fsm3_out == 2'd3; +wire _guard218 = fsm3_out == 2'd2; +wire _guard219 = invoke18_done_out; +wire _guard220 = _guard218 & _guard219; +wire _guard221 = tdcc2_go_out; wire _guard222 = _guard220 & _guard221; -wire _guard223 = tdcc2_go_out; -wire _guard224 = _guard222 & _guard223; -wire _guard225 = fsm3_out == 2'd1; -wire _guard226 = invoke17_done_out; +wire _guard223 = fsm3_out == 2'd1; +wire _guard224 = invoke17_done_out; +wire _guard225 = _guard223 & _guard224; +wire _guard226 = tdcc2_go_out; wire _guard227 = _guard225 & _guard226; -wire _guard228 = tdcc2_go_out; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = fsm5_out == 2'd3; -wire _guard231 = fsm5_out == 2'd0; -wire _guard232 = invoke22_done_out; +wire _guard228 = fsm5_out == 2'd3; +wire _guard229 = fsm5_out == 2'd0; +wire _guard230 = invoke22_done_out; +wire _guard231 = _guard229 & _guard230; +wire _guard232 = tdcc4_go_out; wire _guard233 = _guard231 & _guard232; -wire _guard234 = tdcc4_go_out; -wire _guard235 = _guard233 & _guard234; -wire _guard236 = _guard230 | _guard235; -wire _guard237 = fsm5_out == 2'd1; -wire _guard238 = invoke23_done_out; +wire _guard234 = _guard228 | _guard233; +wire _guard235 = fsm5_out == 2'd1; +wire _guard236 = invoke23_done_out; +wire _guard237 = _guard235 & _guard236; +wire _guard238 = tdcc4_go_out; wire _guard239 = _guard237 & _guard238; -wire _guard240 = tdcc4_go_out; -wire _guard241 = _guard239 & _guard240; -wire _guard242 = _guard236 | _guard241; -wire _guard243 = fsm5_out == 2'd2; -wire _guard244 = invoke24_done_out; +wire _guard240 = _guard234 | _guard239; +wire _guard241 = fsm5_out == 2'd2; +wire _guard242 = invoke24_done_out; +wire _guard243 = _guard241 & _guard242; +wire _guard244 = tdcc4_go_out; wire _guard245 = _guard243 & _guard244; -wire _guard246 = tdcc4_go_out; -wire _guard247 = _guard245 & _guard246; -wire _guard248 = _guard242 | _guard247; -wire _guard249 = fsm5_out == 2'd0; -wire _guard250 = invoke22_done_out; +wire _guard246 = _guard240 | _guard245; +wire _guard247 = fsm5_out == 2'd0; +wire _guard248 = invoke22_done_out; +wire _guard249 = _guard247 & _guard248; +wire _guard250 = tdcc4_go_out; wire _guard251 = _guard249 & _guard250; -wire _guard252 = tdcc4_go_out; -wire _guard253 = _guard251 & _guard252; -wire _guard254 = fsm5_out == 2'd3; -wire _guard255 = fsm5_out == 2'd2; -wire _guard256 = invoke24_done_out; +wire _guard252 = fsm5_out == 2'd3; +wire _guard253 = fsm5_out == 2'd2; +wire _guard254 = invoke24_done_out; +wire _guard255 = _guard253 & _guard254; +wire _guard256 = tdcc4_go_out; wire _guard257 = _guard255 & _guard256; -wire _guard258 = tdcc4_go_out; -wire _guard259 = _guard257 & _guard258; -wire _guard260 = fsm5_out == 2'd1; -wire _guard261 = invoke23_done_out; +wire _guard258 = fsm5_out == 2'd1; +wire _guard259 = invoke23_done_out; +wire _guard260 = _guard258 & _guard259; +wire _guard261 = tdcc4_go_out; wire _guard262 = _guard260 & _guard261; -wire _guard263 = tdcc4_go_out; -wire _guard264 = _guard262 & _guard263; -wire _guard265 = fsm1_out == 2'd2; -wire _guard266 = invoke9_go_out; -wire _guard267 = early_reset_static_par_go_out; -wire _guard268 = early_reset_static_par0_go_out; -wire _guard269 = _guard267 | _guard268; +wire _guard263 = fsm1_out == 2'd2; +wire _guard264 = invoke9_go_out; +wire _guard265 = early_reset_static_par_go_out; +wire _guard266 = early_reset_static_par0_go_out; +wire _guard267 = _guard265 | _guard266; +wire _guard268 = invoke20_go_out; +wire _guard269 = invoke9_go_out; wire _guard270 = invoke20_go_out; -wire _guard271 = invoke19_go_out; -wire _guard272 = invoke8_go_out; -wire _guard273 = invoke9_go_out; -wire _guard274 = invoke20_go_out; -wire _guard275 = invoke19_go_out; -wire _guard276 = early_reset_static_par_go_out; -wire _guard277 = early_reset_static_par0_go_out; -wire _guard278 = _guard276 | _guard277; -wire _guard279 = invoke8_go_out; -wire _guard280 = invoke22_go_out; -wire _guard281 = invoke23_go_out; -wire _guard282 = invoke22_go_out; -wire _guard283 = invoke23_go_out; -wire _guard284 = invoke12_go_out; -wire _guard285 = invoke12_go_out; -wire _guard286 = invoke12_go_out; -wire _guard287 = invoke12_go_out; -wire _guard288 = invoke12_go_out; -wire _guard289 = invoke12_go_out; -wire _guard290 = invoke12_go_out; -wire _guard291 = fsm1_out == 2'd2; -wire _guard292 = fsm1_out == 2'd0; -wire _guard293 = invoke8_done_out; -wire _guard294 = _guard292 & _guard293; -wire _guard295 = tdcc0_go_out; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = _guard291 | _guard296; -wire _guard298 = fsm1_out == 2'd1; -wire _guard299 = invoke9_done_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = tdcc0_go_out; -wire _guard302 = _guard300 & _guard301; -wire _guard303 = _guard297 | _guard302; -wire _guard304 = fsm1_out == 2'd0; -wire _guard305 = invoke8_done_out; -wire _guard306 = _guard304 & _guard305; -wire _guard307 = tdcc0_go_out; -wire _guard308 = _guard306 & _guard307; -wire _guard309 = fsm1_out == 2'd2; -wire _guard310 = fsm1_out == 2'd1; -wire _guard311 = invoke9_done_out; -wire _guard312 = _guard310 & _guard311; -wire _guard313 = tdcc0_go_out; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = fsm4_out == 2'd3; -wire _guard316 = fsm4_out == 2'd0; -wire _guard317 = invoke19_done_out; -wire _guard318 = _guard316 & _guard317; -wire _guard319 = tdcc3_go_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = _guard315 | _guard320; -wire _guard322 = fsm4_out == 2'd1; -wire _guard323 = invoke20_done_out; -wire _guard324 = _guard322 & _guard323; -wire _guard325 = tdcc3_go_out; -wire _guard326 = _guard324 & _guard325; -wire _guard327 = _guard321 | _guard326; -wire _guard328 = fsm4_out == 2'd2; -wire _guard329 = invoke21_done_out; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = tdcc3_go_out; -wire _guard332 = _guard330 & _guard331; -wire _guard333 = _guard327 | _guard332; -wire _guard334 = fsm4_out == 2'd0; -wire _guard335 = invoke19_done_out; -wire _guard336 = _guard334 & _guard335; -wire _guard337 = tdcc3_go_out; +wire _guard271 = early_reset_static_par_go_out; +wire _guard272 = early_reset_static_par0_go_out; +wire _guard273 = _guard271 | _guard272; +wire _guard274 = invoke22_go_out; +wire _guard275 = invoke22_go_out; +wire _guard276 = invoke12_go_out; +wire _guard277 = invoke12_go_out; +wire _guard278 = invoke12_go_out; +wire _guard279 = invoke12_go_out; +wire _guard280 = invoke12_go_out; +wire _guard281 = invoke12_go_out; +wire _guard282 = fsm1_out == 2'd2; +wire _guard283 = fsm1_out == 2'd0; +wire _guard284 = invoke8_done_out; +wire _guard285 = _guard283 & _guard284; +wire _guard286 = tdcc0_go_out; +wire _guard287 = _guard285 & _guard286; +wire _guard288 = _guard282 | _guard287; +wire _guard289 = fsm1_out == 2'd1; +wire _guard290 = invoke9_done_out; +wire _guard291 = _guard289 & _guard290; +wire _guard292 = tdcc0_go_out; +wire _guard293 = _guard291 & _guard292; +wire _guard294 = _guard288 | _guard293; +wire _guard295 = fsm1_out == 2'd0; +wire _guard296 = invoke8_done_out; +wire _guard297 = _guard295 & _guard296; +wire _guard298 = tdcc0_go_out; +wire _guard299 = _guard297 & _guard298; +wire _guard300 = fsm1_out == 2'd2; +wire _guard301 = fsm1_out == 2'd1; +wire _guard302 = invoke9_done_out; +wire _guard303 = _guard301 & _guard302; +wire _guard304 = tdcc0_go_out; +wire _guard305 = _guard303 & _guard304; +wire _guard306 = fsm4_out == 2'd3; +wire _guard307 = fsm4_out == 2'd0; +wire _guard308 = invoke19_done_out; +wire _guard309 = _guard307 & _guard308; +wire _guard310 = tdcc3_go_out; +wire _guard311 = _guard309 & _guard310; +wire _guard312 = _guard306 | _guard311; +wire _guard313 = fsm4_out == 2'd1; +wire _guard314 = invoke20_done_out; +wire _guard315 = _guard313 & _guard314; +wire _guard316 = tdcc3_go_out; +wire _guard317 = _guard315 & _guard316; +wire _guard318 = _guard312 | _guard317; +wire _guard319 = fsm4_out == 2'd2; +wire _guard320 = invoke21_done_out; +wire _guard321 = _guard319 & _guard320; +wire _guard322 = tdcc3_go_out; +wire _guard323 = _guard321 & _guard322; +wire _guard324 = _guard318 | _guard323; +wire _guard325 = fsm4_out == 2'd0; +wire _guard326 = invoke19_done_out; +wire _guard327 = _guard325 & _guard326; +wire _guard328 = tdcc3_go_out; +wire _guard329 = _guard327 & _guard328; +wire _guard330 = fsm4_out == 2'd3; +wire _guard331 = fsm4_out == 2'd2; +wire _guard332 = invoke21_done_out; +wire _guard333 = _guard331 & _guard332; +wire _guard334 = tdcc3_go_out; +wire _guard335 = _guard333 & _guard334; +wire _guard336 = fsm4_out == 2'd1; +wire _guard337 = invoke20_done_out; wire _guard338 = _guard336 & _guard337; -wire _guard339 = fsm4_out == 2'd3; -wire _guard340 = fsm4_out == 2'd2; -wire _guard341 = invoke21_done_out; -wire _guard342 = _guard340 & _guard341; -wire _guard343 = tdcc3_go_out; +wire _guard339 = tdcc3_go_out; +wire _guard340 = _guard338 & _guard339; +wire _guard341 = wrapper_early_reset_static_par_done_out; +wire _guard342 = ~_guard341; +wire _guard343 = fsm6_out == 3'd0; wire _guard344 = _guard342 & _guard343; -wire _guard345 = fsm4_out == 2'd1; -wire _guard346 = invoke20_done_out; -wire _guard347 = _guard345 & _guard346; -wire _guard348 = tdcc3_go_out; -wire _guard349 = _guard347 & _guard348; -wire _guard350 = wrapper_early_reset_static_par_done_out; -wire _guard351 = ~_guard350; -wire _guard352 = fsm6_out == 3'd0; -wire _guard353 = _guard351 & _guard352; -wire _guard354 = tdcc5_go_out; -wire _guard355 = _guard353 & _guard354; -wire _guard356 = invoke11_done_out; -wire _guard357 = ~_guard356; -wire _guard358 = fsm2_out == 2'd1; -wire _guard359 = _guard357 & _guard358; -wire _guard360 = tdcc1_go_out; -wire _guard361 = _guard359 & _guard360; -wire _guard362 = invoke23_done_out; -wire _guard363 = ~_guard362; -wire _guard364 = fsm5_out == 2'd1; -wire _guard365 = _guard363 & _guard364; -wire _guard366 = tdcc4_go_out; -wire _guard367 = _guard365 & _guard366; -wire _guard368 = par1_done_out; -wire _guard369 = ~_guard368; -wire _guard370 = fsm6_out == 3'd4; -wire _guard371 = _guard369 & _guard370; -wire _guard372 = tdcc5_go_out; -wire _guard373 = _guard371 & _guard372; -wire _guard374 = early_reset_static_par_go_out; -wire _guard375 = early_reset_static_par0_go_out; -wire _guard376 = _guard374 | _guard375; +wire _guard345 = tdcc5_go_out; +wire _guard346 = _guard344 & _guard345; +wire _guard347 = invoke11_done_out; +wire _guard348 = ~_guard347; +wire _guard349 = fsm2_out == 2'd1; +wire _guard350 = _guard348 & _guard349; +wire _guard351 = tdcc1_go_out; +wire _guard352 = _guard350 & _guard351; +wire _guard353 = invoke23_done_out; +wire _guard354 = ~_guard353; +wire _guard355 = fsm5_out == 2'd1; +wire _guard356 = _guard354 & _guard355; +wire _guard357 = tdcc4_go_out; +wire _guard358 = _guard356 & _guard357; +wire _guard359 = par1_done_out; +wire _guard360 = ~_guard359; +wire _guard361 = fsm6_out == 3'd4; +wire _guard362 = _guard360 & _guard361; +wire _guard363 = tdcc5_go_out; +wire _guard364 = _guard362 & _guard363; +wire _guard365 = early_reset_static_par_go_out; +wire _guard366 = early_reset_static_par0_go_out; +wire _guard367 = _guard365 | _guard366; +wire _guard368 = invoke7_go_out; +wire _guard369 = invoke17_go_out; +wire _guard370 = invoke7_go_out; +wire _guard371 = early_reset_static_par_go_out; +wire _guard372 = early_reset_static_par0_go_out; +wire _guard373 = _guard371 | _guard372; +wire _guard374 = invoke17_go_out; +wire _guard375 = invoke7_go_out; +wire _guard376 = invoke7_go_out; wire _guard377 = invoke7_go_out; -wire _guard378 = invoke6_go_out; -wire _guard379 = invoke16_go_out; -wire _guard380 = invoke17_go_out; +wire _guard378 = invoke7_go_out; +wire _guard379 = invoke7_go_out; +wire _guard380 = invoke7_go_out; wire _guard381 = invoke7_go_out; -wire _guard382 = invoke6_go_out; -wire _guard383 = invoke16_go_out; -wire _guard384 = early_reset_static_par_go_out; -wire _guard385 = early_reset_static_par0_go_out; -wire _guard386 = _guard384 | _guard385; -wire _guard387 = invoke17_go_out; -wire _guard388 = invoke7_go_out; -wire _guard389 = invoke7_go_out; +wire _guard382 = invoke7_go_out; +wire _guard383 = invoke7_go_out; +wire _guard384 = invoke7_go_out; +wire _guard385 = invoke7_go_out; +wire _guard386 = invoke12_go_out; +wire _guard387 = invoke7_go_out; +wire _guard388 = invoke17_go_out; +wire _guard389 = invoke12_go_out; wire _guard390 = invoke7_go_out; -wire _guard391 = invoke7_go_out; -wire _guard392 = invoke7_go_out; +wire _guard391 = invoke17_go_out; +wire _guard392 = invoke12_go_out; wire _guard393 = invoke7_go_out; -wire _guard394 = invoke7_go_out; +wire _guard394 = invoke17_go_out; wire _guard395 = invoke7_go_out; -wire _guard396 = invoke7_go_out; -wire _guard397 = invoke7_go_out; -wire _guard398 = invoke7_go_out; -wire _guard399 = invoke7_go_out; -wire _guard400 = invoke12_go_out; -wire _guard401 = invoke7_go_out; -wire _guard402 = invoke17_go_out; -wire _guard403 = invoke12_go_out; -wire _guard404 = invoke7_go_out; -wire _guard405 = invoke17_go_out; -wire _guard406 = invoke12_go_out; -wire _guard407 = invoke7_go_out; -wire _guard408 = invoke17_go_out; -wire _guard409 = invoke12_go_out; -wire _guard410 = invoke7_go_out; -wire _guard411 = invoke17_go_out; -wire _guard412 = invoke20_go_out; -wire _guard413 = invoke20_go_out; -wire _guard414 = invoke20_go_out; -wire _guard415 = invoke20_go_out; -wire _guard416 = invoke20_go_out; -wire _guard417 = invoke20_go_out; -wire _guard418 = invoke20_go_out; -wire _guard419 = invoke20_go_out; -wire _guard420 = invoke20_go_out; -wire _guard421 = invoke20_go_out; -wire _guard422 = invoke20_go_out; -wire _guard423 = invoke11_go_out; -wire _guard424 = early_reset_static_par_go_out; -wire _guard425 = early_reset_static_par0_go_out; -wire _guard426 = _guard424 | _guard425; -wire _guard427 = invoke10_go_out; -wire _guard428 = invoke22_go_out; -wire _guard429 = invoke23_go_out; -wire _guard430 = invoke11_go_out; -wire _guard431 = invoke10_go_out; -wire _guard432 = early_reset_static_par_go_out; -wire _guard433 = early_reset_static_par0_go_out; -wire _guard434 = _guard432 | _guard433; -wire _guard435 = invoke22_go_out; -wire _guard436 = invoke23_go_out; -wire _guard437 = invoke10_go_out; -wire _guard438 = invoke10_go_out; -wire _guard439 = invoke10_go_out; -wire _guard440 = invoke10_go_out; -wire _guard441 = invoke10_go_out; -wire _guard442 = pd_out; -wire _guard443 = pd0_out; +wire _guard396 = invoke20_go_out; +wire _guard397 = invoke20_go_out; +wire _guard398 = invoke20_go_out; +wire _guard399 = invoke20_go_out; +wire _guard400 = invoke20_go_out; +wire _guard401 = invoke20_go_out; +wire _guard402 = invoke20_go_out; +wire _guard403 = invoke20_go_out; +wire _guard404 = invoke20_go_out; +wire _guard405 = invoke11_go_out; +wire _guard406 = early_reset_static_par_go_out; +wire _guard407 = early_reset_static_par0_go_out; +wire _guard408 = _guard406 | _guard407; +wire _guard409 = invoke23_go_out; +wire _guard410 = invoke11_go_out; +wire _guard411 = early_reset_static_par_go_out; +wire _guard412 = early_reset_static_par0_go_out; +wire _guard413 = _guard411 | _guard412; +wire _guard414 = invoke23_go_out; +wire _guard415 = invoke10_go_out; +wire _guard416 = invoke10_go_out; +wire _guard417 = invoke10_go_out; +wire _guard418 = invoke10_go_out; +wire _guard419 = pd_out; +wire _guard420 = pd0_out; +wire _guard421 = _guard419 & _guard420; +wire _guard422 = pd1_out; +wire _guard423 = _guard421 & _guard422; +wire _guard424 = tdcc1_done_out; +wire _guard425 = par0_go_out; +wire _guard426 = _guard424 & _guard425; +wire _guard427 = _guard423 | _guard426; +wire _guard428 = tdcc1_done_out; +wire _guard429 = par0_go_out; +wire _guard430 = _guard428 & _guard429; +wire _guard431 = pd_out; +wire _guard432 = pd0_out; +wire _guard433 = _guard431 & _guard432; +wire _guard434 = pd1_out; +wire _guard435 = _guard433 & _guard434; +wire _guard436 = fsm_out == 1'd0; +wire _guard437 = signal_reg_out; +wire _guard438 = _guard436 & _guard437; +wire _guard439 = pd_out; +wire _guard440 = tdcc_done_out; +wire _guard441 = _guard439 | _guard440; +wire _guard442 = ~_guard441; +wire _guard443 = par0_go_out; wire _guard444 = _guard442 & _guard443; -wire _guard445 = pd1_out; -wire _guard446 = _guard444 & _guard445; -wire _guard447 = tdcc1_done_out; -wire _guard448 = par0_go_out; -wire _guard449 = _guard447 & _guard448; -wire _guard450 = _guard446 | _guard449; -wire _guard451 = tdcc1_done_out; -wire _guard452 = par0_go_out; -wire _guard453 = _guard451 & _guard452; -wire _guard454 = pd_out; -wire _guard455 = pd0_out; +wire _guard445 = invoke12_done_out; +wire _guard446 = ~_guard445; +wire _guard447 = fsm6_out == 3'd2; +wire _guard448 = _guard446 & _guard447; +wire _guard449 = tdcc5_go_out; +wire _guard450 = _guard448 & _guard449; +wire _guard451 = pd3_out; +wire _guard452 = tdcc3_done_out; +wire _guard453 = _guard451 | _guard452; +wire _guard454 = ~_guard453; +wire _guard455 = par1_go_out; wire _guard456 = _guard454 & _guard455; -wire _guard457 = pd1_out; -wire _guard458 = _guard456 & _guard457; -wire _guard459 = fsm_out == 1'd0; -wire _guard460 = signal_reg_out; -wire _guard461 = _guard459 & _guard460; -wire _guard462 = pd_out; -wire _guard463 = tdcc_done_out; -wire _guard464 = _guard462 | _guard463; -wire _guard465 = ~_guard464; -wire _guard466 = par0_go_out; +wire _guard457 = fsm4_out == 2'd3; +wire _guard458 = invoke19_go_out; +wire _guard459 = invoke19_go_out; +wire _guard460 = invoke19_go_out; +wire _guard461 = invoke19_go_out; +wire _guard462 = fsm0_out == 2'd2; +wire _guard463 = fsm0_out == 2'd0; +wire _guard464 = invoke6_done_out; +wire _guard465 = _guard463 & _guard464; +wire _guard466 = tdcc_go_out; wire _guard467 = _guard465 & _guard466; -wire _guard468 = invoke12_done_out; -wire _guard469 = ~_guard468; -wire _guard470 = fsm6_out == 3'd2; +wire _guard468 = _guard462 | _guard467; +wire _guard469 = fsm0_out == 2'd1; +wire _guard470 = invoke7_done_out; wire _guard471 = _guard469 & _guard470; -wire _guard472 = tdcc5_go_out; +wire _guard472 = tdcc_go_out; wire _guard473 = _guard471 & _guard472; -wire _guard474 = pd3_out; -wire _guard475 = tdcc3_done_out; -wire _guard476 = _guard474 | _guard475; -wire _guard477 = ~_guard476; -wire _guard478 = par1_go_out; +wire _guard474 = _guard468 | _guard473; +wire _guard475 = fsm0_out == 2'd0; +wire _guard476 = invoke6_done_out; +wire _guard477 = _guard475 & _guard476; +wire _guard478 = tdcc_go_out; wire _guard479 = _guard477 & _guard478; -wire _guard480 = fsm4_out == 2'd3; -wire _guard481 = invoke19_go_out; -wire _guard482 = invoke19_go_out; -wire _guard483 = invoke19_go_out; -wire _guard484 = invoke19_go_out; -wire _guard485 = invoke19_go_out; -wire _guard486 = invoke19_go_out; -wire _guard487 = invoke19_go_out; -wire _guard488 = fsm0_out == 2'd2; -wire _guard489 = fsm0_out == 2'd0; -wire _guard490 = invoke6_done_out; +wire _guard480 = fsm0_out == 2'd2; +wire _guard481 = fsm0_out == 2'd1; +wire _guard482 = invoke7_done_out; +wire _guard483 = _guard481 & _guard482; +wire _guard484 = tdcc_go_out; +wire _guard485 = _guard483 & _guard484; +wire _guard486 = fsm2_out == 2'd2; +wire _guard487 = fsm2_out == 2'd0; +wire _guard488 = invoke10_done_out; +wire _guard489 = _guard487 & _guard488; +wire _guard490 = tdcc1_go_out; wire _guard491 = _guard489 & _guard490; -wire _guard492 = tdcc_go_out; -wire _guard493 = _guard491 & _guard492; -wire _guard494 = _guard488 | _guard493; -wire _guard495 = fsm0_out == 2'd1; -wire _guard496 = invoke7_done_out; +wire _guard492 = _guard486 | _guard491; +wire _guard493 = fsm2_out == 2'd1; +wire _guard494 = invoke11_done_out; +wire _guard495 = _guard493 & _guard494; +wire _guard496 = tdcc1_go_out; wire _guard497 = _guard495 & _guard496; -wire _guard498 = tdcc_go_out; -wire _guard499 = _guard497 & _guard498; -wire _guard500 = _guard494 | _guard499; -wire _guard501 = fsm0_out == 2'd0; -wire _guard502 = invoke6_done_out; +wire _guard498 = _guard492 | _guard497; +wire _guard499 = fsm2_out == 2'd0; +wire _guard500 = invoke10_done_out; +wire _guard501 = _guard499 & _guard500; +wire _guard502 = tdcc1_go_out; wire _guard503 = _guard501 & _guard502; -wire _guard504 = tdcc_go_out; -wire _guard505 = _guard503 & _guard504; -wire _guard506 = fsm0_out == 2'd2; -wire _guard507 = fsm0_out == 2'd1; -wire _guard508 = invoke7_done_out; +wire _guard504 = fsm2_out == 2'd2; +wire _guard505 = fsm2_out == 2'd1; +wire _guard506 = invoke11_done_out; +wire _guard507 = _guard505 & _guard506; +wire _guard508 = tdcc1_go_out; wire _guard509 = _guard507 & _guard508; -wire _guard510 = tdcc_go_out; -wire _guard511 = _guard509 & _guard510; -wire _guard512 = fsm2_out == 2'd2; -wire _guard513 = fsm2_out == 2'd0; -wire _guard514 = invoke10_done_out; +wire _guard510 = invoke8_done_out; +wire _guard511 = ~_guard510; +wire _guard512 = fsm1_out == 2'd0; +wire _guard513 = _guard511 & _guard512; +wire _guard514 = tdcc0_go_out; wire _guard515 = _guard513 & _guard514; -wire _guard516 = tdcc1_go_out; -wire _guard517 = _guard515 & _guard516; -wire _guard518 = _guard512 | _guard517; -wire _guard519 = fsm2_out == 2'd1; -wire _guard520 = invoke11_done_out; +wire _guard516 = pd0_out; +wire _guard517 = tdcc0_done_out; +wire _guard518 = _guard516 | _guard517; +wire _guard519 = ~_guard518; +wire _guard520 = par0_go_out; wire _guard521 = _guard519 & _guard520; -wire _guard522 = tdcc1_go_out; -wire _guard523 = _guard521 & _guard522; -wire _guard524 = _guard518 | _guard523; -wire _guard525 = fsm2_out == 2'd0; -wire _guard526 = invoke10_done_out; -wire _guard527 = _guard525 & _guard526; -wire _guard528 = tdcc1_go_out; -wire _guard529 = _guard527 & _guard528; -wire _guard530 = fsm2_out == 2'd2; -wire _guard531 = fsm2_out == 2'd1; -wire _guard532 = invoke11_done_out; -wire _guard533 = _guard531 & _guard532; -wire _guard534 = tdcc1_go_out; -wire _guard535 = _guard533 & _guard534; -wire _guard536 = invoke8_done_out; -wire _guard537 = ~_guard536; -wire _guard538 = fsm1_out == 2'd0; -wire _guard539 = _guard537 & _guard538; -wire _guard540 = tdcc0_go_out; -wire _guard541 = _guard539 & _guard540; -wire _guard542 = pd0_out; -wire _guard543 = tdcc0_done_out; -wire _guard544 = _guard542 | _guard543; -wire _guard545 = ~_guard544; -wire _guard546 = par0_go_out; -wire _guard547 = _guard545 & _guard546; -wire _guard548 = invoke6_go_out; -wire _guard549 = invoke6_go_out; -wire _guard550 = invoke6_go_out; -wire _guard551 = invoke6_go_out; -wire _guard552 = invoke6_go_out; -wire _guard553 = invoke16_go_out; -wire _guard554 = invoke16_go_out; -wire _guard555 = invoke16_go_out; -wire _guard556 = invoke16_go_out; -wire _guard557 = invoke16_go_out; -wire _guard558 = invoke16_go_out; -wire _guard559 = invoke16_go_out; -wire _guard560 = pd_out; -wire _guard561 = pd0_out; -wire _guard562 = _guard560 & _guard561; -wire _guard563 = pd1_out; -wire _guard564 = _guard562 & _guard563; -wire _guard565 = invoke17_done_out; -wire _guard566 = ~_guard565; -wire _guard567 = fsm3_out == 2'd1; -wire _guard568 = _guard566 & _guard567; -wire _guard569 = tdcc2_go_out; -wire _guard570 = _guard568 & _guard569; -wire _guard571 = invoke21_done_out; -wire _guard572 = ~_guard571; -wire _guard573 = fsm4_out == 2'd2; -wire _guard574 = _guard572 & _guard573; -wire _guard575 = tdcc3_go_out; -wire _guard576 = _guard574 & _guard575; -wire _guard577 = early_reset_static_par0_go_out; -wire _guard578 = early_reset_static_par0_go_out; -wire _guard579 = pd2_out; -wire _guard580 = pd3_out; -wire _guard581 = _guard579 & _guard580; -wire _guard582 = pd4_out; -wire _guard583 = _guard581 & _guard582; -wire _guard584 = tdcc2_done_out; -wire _guard585 = par1_go_out; -wire _guard586 = _guard584 & _guard585; -wire _guard587 = _guard583 | _guard586; -wire _guard588 = tdcc2_done_out; -wire _guard589 = par1_go_out; -wire _guard590 = _guard588 & _guard589; -wire _guard591 = pd2_out; -wire _guard592 = pd3_out; +wire _guard522 = invoke6_go_out; +wire _guard523 = invoke6_go_out; +wire _guard524 = invoke6_go_out; +wire _guard525 = invoke6_go_out; +wire _guard526 = invoke16_go_out; +wire _guard527 = invoke16_go_out; +wire _guard528 = invoke16_go_out; +wire _guard529 = invoke16_go_out; +wire _guard530 = pd_out; +wire _guard531 = pd0_out; +wire _guard532 = _guard530 & _guard531; +wire _guard533 = pd1_out; +wire _guard534 = _guard532 & _guard533; +wire _guard535 = invoke17_done_out; +wire _guard536 = ~_guard535; +wire _guard537 = fsm3_out == 2'd1; +wire _guard538 = _guard536 & _guard537; +wire _guard539 = tdcc2_go_out; +wire _guard540 = _guard538 & _guard539; +wire _guard541 = invoke21_done_out; +wire _guard542 = ~_guard541; +wire _guard543 = fsm4_out == 2'd2; +wire _guard544 = _guard542 & _guard543; +wire _guard545 = tdcc3_go_out; +wire _guard546 = _guard544 & _guard545; +wire _guard547 = early_reset_static_par0_go_out; +wire _guard548 = early_reset_static_par0_go_out; +wire _guard549 = pd2_out; +wire _guard550 = pd3_out; +wire _guard551 = _guard549 & _guard550; +wire _guard552 = pd4_out; +wire _guard553 = _guard551 & _guard552; +wire _guard554 = tdcc2_done_out; +wire _guard555 = par1_go_out; +wire _guard556 = _guard554 & _guard555; +wire _guard557 = _guard553 | _guard556; +wire _guard558 = tdcc2_done_out; +wire _guard559 = par1_go_out; +wire _guard560 = _guard558 & _guard559; +wire _guard561 = pd2_out; +wire _guard562 = pd3_out; +wire _guard563 = _guard561 & _guard562; +wire _guard564 = pd4_out; +wire _guard565 = _guard563 & _guard564; +wire _guard566 = invoke16_done_out; +wire _guard567 = ~_guard566; +wire _guard568 = fsm3_out == 2'd0; +wire _guard569 = _guard567 & _guard568; +wire _guard570 = tdcc2_go_out; +wire _guard571 = _guard569 & _guard570; +wire _guard572 = invoke17_go_out; +wire _guard573 = invoke17_go_out; +wire _guard574 = invoke17_go_out; +wire _guard575 = invoke17_go_out; +wire _guard576 = invoke17_go_out; +wire _guard577 = invoke17_go_out; +wire _guard578 = invoke17_go_out; +wire _guard579 = invoke17_go_out; +wire _guard580 = invoke17_go_out; +wire _guard581 = invoke8_go_out; +wire _guard582 = invoke8_go_out; +wire _guard583 = invoke8_go_out; +wire _guard584 = invoke8_go_out; +wire _guard585 = fsm_out == 1'd0; +wire _guard586 = signal_reg_out; +wire _guard587 = _guard585 & _guard586; +wire _guard588 = fsm_out == 1'd0; +wire _guard589 = signal_reg_out; +wire _guard590 = ~_guard589; +wire _guard591 = _guard588 & _guard590; +wire _guard592 = wrapper_early_reset_static_par_go_out; wire _guard593 = _guard591 & _guard592; -wire _guard594 = pd4_out; -wire _guard595 = _guard593 & _guard594; -wire _guard596 = invoke16_done_out; +wire _guard594 = _guard587 | _guard593; +wire _guard595 = fsm_out == 1'd0; +wire _guard596 = signal_reg_out; wire _guard597 = ~_guard596; -wire _guard598 = fsm3_out == 2'd0; -wire _guard599 = _guard597 & _guard598; -wire _guard600 = tdcc2_go_out; -wire _guard601 = _guard599 & _guard600; -wire _guard602 = invoke17_go_out; -wire _guard603 = invoke17_go_out; -wire _guard604 = invoke17_go_out; -wire _guard605 = invoke17_go_out; -wire _guard606 = invoke17_go_out; -wire _guard607 = invoke17_go_out; -wire _guard608 = invoke17_go_out; -wire _guard609 = invoke17_go_out; -wire _guard610 = invoke17_go_out; -wire _guard611 = invoke17_go_out; -wire _guard612 = invoke17_go_out; -wire _guard613 = invoke8_go_out; -wire _guard614 = invoke8_go_out; -wire _guard615 = invoke8_go_out; -wire _guard616 = invoke8_go_out; -wire _guard617 = invoke8_go_out; -wire _guard618 = fsm_out == 1'd0; -wire _guard619 = signal_reg_out; -wire _guard620 = _guard618 & _guard619; -wire _guard621 = fsm_out == 1'd0; -wire _guard622 = signal_reg_out; -wire _guard623 = ~_guard622; -wire _guard624 = _guard621 & _guard623; -wire _guard625 = wrapper_early_reset_static_par_go_out; -wire _guard626 = _guard624 & _guard625; -wire _guard627 = _guard620 | _guard626; -wire _guard628 = fsm_out == 1'd0; -wire _guard629 = signal_reg_out; -wire _guard630 = ~_guard629; -wire _guard631 = _guard628 & _guard630; -wire _guard632 = wrapper_early_reset_static_par0_go_out; -wire _guard633 = _guard631 & _guard632; -wire _guard634 = _guard627 | _guard633; -wire _guard635 = fsm_out == 1'd0; -wire _guard636 = signal_reg_out; -wire _guard637 = ~_guard636; -wire _guard638 = _guard635 & _guard637; -wire _guard639 = wrapper_early_reset_static_par_go_out; -wire _guard640 = _guard638 & _guard639; -wire _guard641 = fsm_out == 1'd0; -wire _guard642 = signal_reg_out; -wire _guard643 = ~_guard642; -wire _guard644 = _guard641 & _guard643; -wire _guard645 = wrapper_early_reset_static_par0_go_out; -wire _guard646 = _guard644 & _guard645; -wire _guard647 = _guard640 | _guard646; -wire _guard648 = fsm_out == 1'd0; -wire _guard649 = signal_reg_out; -wire _guard650 = _guard648 & _guard649; -wire _guard651 = fsm2_out == 2'd2; -wire _guard652 = pd2_out; -wire _guard653 = pd3_out; -wire _guard654 = _guard652 & _guard653; -wire _guard655 = pd4_out; +wire _guard598 = _guard595 & _guard597; +wire _guard599 = wrapper_early_reset_static_par0_go_out; +wire _guard600 = _guard598 & _guard599; +wire _guard601 = _guard594 | _guard600; +wire _guard602 = fsm_out == 1'd0; +wire _guard603 = signal_reg_out; +wire _guard604 = ~_guard603; +wire _guard605 = _guard602 & _guard604; +wire _guard606 = wrapper_early_reset_static_par_go_out; +wire _guard607 = _guard605 & _guard606; +wire _guard608 = fsm_out == 1'd0; +wire _guard609 = signal_reg_out; +wire _guard610 = ~_guard609; +wire _guard611 = _guard608 & _guard610; +wire _guard612 = wrapper_early_reset_static_par0_go_out; +wire _guard613 = _guard611 & _guard612; +wire _guard614 = _guard607 | _guard613; +wire _guard615 = fsm_out == 1'd0; +wire _guard616 = signal_reg_out; +wire _guard617 = _guard615 & _guard616; +wire _guard618 = fsm2_out == 2'd2; +wire _guard619 = pd2_out; +wire _guard620 = pd3_out; +wire _guard621 = _guard619 & _guard620; +wire _guard622 = pd4_out; +wire _guard623 = _guard621 & _guard622; +wire _guard624 = invoke21_go_out; +wire _guard625 = invoke21_go_out; +wire _guard626 = invoke11_go_out; +wire _guard627 = invoke12_go_out; +wire _guard628 = invoke23_go_out; +wire _guard629 = invoke11_go_out; +wire _guard630 = invoke12_go_out; +wire _guard631 = invoke23_go_out; +wire _guard632 = invoke11_go_out; +wire _guard633 = invoke12_go_out; +wire _guard634 = invoke23_go_out; +wire _guard635 = invoke11_go_out; +wire _guard636 = invoke12_go_out; +wire _guard637 = pd_out; +wire _guard638 = pd0_out; +wire _guard639 = _guard637 & _guard638; +wire _guard640 = pd1_out; +wire _guard641 = _guard639 & _guard640; +wire _guard642 = tdcc_done_out; +wire _guard643 = par0_go_out; +wire _guard644 = _guard642 & _guard643; +wire _guard645 = _guard641 | _guard644; +wire _guard646 = tdcc_done_out; +wire _guard647 = par0_go_out; +wire _guard648 = _guard646 & _guard647; +wire _guard649 = pd_out; +wire _guard650 = pd0_out; +wire _guard651 = _guard649 & _guard650; +wire _guard652 = pd1_out; +wire _guard653 = _guard651 & _guard652; +wire _guard654 = pd_out; +wire _guard655 = pd0_out; wire _guard656 = _guard654 & _guard655; -wire _guard657 = invoke21_go_out; -wire _guard658 = invoke21_go_out; -wire _guard659 = invoke11_go_out; -wire _guard660 = invoke12_go_out; -wire _guard661 = invoke23_go_out; -wire _guard662 = invoke11_go_out; -wire _guard663 = invoke12_go_out; -wire _guard664 = invoke23_go_out; -wire _guard665 = invoke11_go_out; -wire _guard666 = invoke12_go_out; -wire _guard667 = invoke23_go_out; -wire _guard668 = invoke11_go_out; -wire _guard669 = invoke12_go_out; -wire _guard670 = invoke23_go_out; -wire _guard671 = pd_out; -wire _guard672 = pd0_out; +wire _guard657 = pd1_out; +wire _guard658 = _guard656 & _guard657; +wire _guard659 = tdcc0_done_out; +wire _guard660 = par0_go_out; +wire _guard661 = _guard659 & _guard660; +wire _guard662 = _guard658 | _guard661; +wire _guard663 = tdcc0_done_out; +wire _guard664 = par0_go_out; +wire _guard665 = _guard663 & _guard664; +wire _guard666 = pd_out; +wire _guard667 = pd0_out; +wire _guard668 = _guard666 & _guard667; +wire _guard669 = pd1_out; +wire _guard670 = _guard668 & _guard669; +wire _guard671 = pd2_out; +wire _guard672 = pd3_out; wire _guard673 = _guard671 & _guard672; -wire _guard674 = pd1_out; +wire _guard674 = pd4_out; wire _guard675 = _guard673 & _guard674; -wire _guard676 = tdcc_done_out; -wire _guard677 = par0_go_out; +wire _guard676 = tdcc4_done_out; +wire _guard677 = par1_go_out; wire _guard678 = _guard676 & _guard677; wire _guard679 = _guard675 | _guard678; -wire _guard680 = tdcc_done_out; -wire _guard681 = par0_go_out; +wire _guard680 = tdcc4_done_out; +wire _guard681 = par1_go_out; wire _guard682 = _guard680 & _guard681; -wire _guard683 = pd_out; -wire _guard684 = pd0_out; +wire _guard683 = pd2_out; +wire _guard684 = pd3_out; wire _guard685 = _guard683 & _guard684; -wire _guard686 = pd1_out; +wire _guard686 = pd4_out; wire _guard687 = _guard685 & _guard686; -wire _guard688 = pd_out; -wire _guard689 = pd0_out; -wire _guard690 = _guard688 & _guard689; -wire _guard691 = pd1_out; -wire _guard692 = _guard690 & _guard691; -wire _guard693 = tdcc0_done_out; -wire _guard694 = par0_go_out; -wire _guard695 = _guard693 & _guard694; -wire _guard696 = _guard692 | _guard695; -wire _guard697 = tdcc0_done_out; -wire _guard698 = par0_go_out; +wire _guard688 = pd4_out; +wire _guard689 = tdcc4_done_out; +wire _guard690 = _guard688 | _guard689; +wire _guard691 = ~_guard690; +wire _guard692 = par1_go_out; +wire _guard693 = _guard691 & _guard692; +wire _guard694 = invoke18_go_out; +wire _guard695 = invoke18_go_out; +wire _guard696 = wrapper_early_reset_static_par0_done_out; +wire _guard697 = ~_guard696; +wire _guard698 = fsm6_out == 3'd3; wire _guard699 = _guard697 & _guard698; -wire _guard700 = pd_out; -wire _guard701 = pd0_out; -wire _guard702 = _guard700 & _guard701; -wire _guard703 = pd1_out; +wire _guard700 = tdcc5_go_out; +wire _guard701 = _guard699 & _guard700; +wire _guard702 = fsm_out == 1'd0; +wire _guard703 = signal_reg_out; wire _guard704 = _guard702 & _guard703; -wire _guard705 = pd2_out; -wire _guard706 = pd3_out; -wire _guard707 = _guard705 & _guard706; -wire _guard708 = pd4_out; +wire _guard705 = fsm0_out == 2'd2; +wire _guard706 = invoke19_done_out; +wire _guard707 = ~_guard706; +wire _guard708 = fsm4_out == 2'd0; wire _guard709 = _guard707 & _guard708; -wire _guard710 = tdcc4_done_out; -wire _guard711 = par1_go_out; -wire _guard712 = _guard710 & _guard711; -wire _guard713 = _guard709 | _guard712; -wire _guard714 = tdcc4_done_out; -wire _guard715 = par1_go_out; -wire _guard716 = _guard714 & _guard715; -wire _guard717 = pd2_out; -wire _guard718 = pd3_out; -wire _guard719 = _guard717 & _guard718; -wire _guard720 = pd4_out; -wire _guard721 = _guard719 & _guard720; -wire _guard722 = pd4_out; -wire _guard723 = tdcc4_done_out; -wire _guard724 = _guard722 | _guard723; -wire _guard725 = ~_guard724; -wire _guard726 = par1_go_out; -wire _guard727 = _guard725 & _guard726; -wire _guard728 = invoke18_go_out; -wire _guard729 = invoke18_go_out; -wire _guard730 = wrapper_early_reset_static_par0_done_out; -wire _guard731 = ~_guard730; -wire _guard732 = fsm6_out == 3'd3; -wire _guard733 = _guard731 & _guard732; -wire _guard734 = tdcc5_go_out; +wire _guard710 = tdcc3_go_out; +wire _guard711 = _guard709 & _guard710; +wire _guard712 = invoke20_done_out; +wire _guard713 = ~_guard712; +wire _guard714 = fsm4_out == 2'd1; +wire _guard715 = _guard713 & _guard714; +wire _guard716 = tdcc3_go_out; +wire _guard717 = _guard715 & _guard716; +wire _guard718 = invoke16_go_out; +wire _guard719 = invoke16_go_out; +wire _guard720 = invoke22_go_out; +wire _guard721 = invoke22_go_out; +wire _guard722 = invoke22_go_out; +wire _guard723 = invoke22_go_out; +wire _guard724 = invoke23_go_out; +wire _guard725 = invoke23_go_out; +wire _guard726 = invoke23_go_out; +wire _guard727 = invoke23_go_out; +wire _guard728 = invoke23_go_out; +wire _guard729 = invoke23_go_out; +wire _guard730 = invoke23_go_out; +wire _guard731 = invoke23_go_out; +wire _guard732 = invoke23_go_out; +wire _guard733 = pd2_out; +wire _guard734 = pd3_out; wire _guard735 = _guard733 & _guard734; -wire _guard736 = fsm_out == 1'd0; -wire _guard737 = signal_reg_out; -wire _guard738 = _guard736 & _guard737; -wire _guard739 = fsm0_out == 2'd2; -wire _guard740 = invoke19_done_out; -wire _guard741 = ~_guard740; -wire _guard742 = fsm4_out == 2'd0; -wire _guard743 = _guard741 & _guard742; -wire _guard744 = tdcc3_go_out; -wire _guard745 = _guard743 & _guard744; -wire _guard746 = invoke20_done_out; -wire _guard747 = ~_guard746; -wire _guard748 = fsm4_out == 2'd1; +wire _guard736 = pd4_out; +wire _guard737 = _guard735 & _guard736; +wire _guard738 = tdcc3_done_out; +wire _guard739 = par1_go_out; +wire _guard740 = _guard738 & _guard739; +wire _guard741 = _guard737 | _guard740; +wire _guard742 = tdcc3_done_out; +wire _guard743 = par1_go_out; +wire _guard744 = _guard742 & _guard743; +wire _guard745 = pd2_out; +wire _guard746 = pd3_out; +wire _guard747 = _guard745 & _guard746; +wire _guard748 = pd4_out; wire _guard749 = _guard747 & _guard748; -wire _guard750 = tdcc3_go_out; -wire _guard751 = _guard749 & _guard750; -wire _guard752 = invoke16_go_out; -wire _guard753 = invoke17_go_out; -wire _guard754 = invoke16_go_out; -wire _guard755 = invoke17_go_out; -wire _guard756 = invoke22_go_out; -wire _guard757 = invoke22_go_out; -wire _guard758 = invoke22_go_out; -wire _guard759 = invoke22_go_out; -wire _guard760 = invoke22_go_out; -wire _guard761 = invoke22_go_out; -wire _guard762 = invoke22_go_out; -wire _guard763 = invoke23_go_out; -wire _guard764 = invoke23_go_out; -wire _guard765 = invoke23_go_out; -wire _guard766 = invoke23_go_out; -wire _guard767 = invoke23_go_out; -wire _guard768 = invoke23_go_out; -wire _guard769 = invoke23_go_out; -wire _guard770 = invoke23_go_out; -wire _guard771 = invoke23_go_out; -wire _guard772 = invoke23_go_out; -wire _guard773 = invoke23_go_out; -wire _guard774 = pd2_out; -wire _guard775 = pd3_out; -wire _guard776 = _guard774 & _guard775; -wire _guard777 = pd4_out; -wire _guard778 = _guard776 & _guard777; -wire _guard779 = tdcc3_done_out; -wire _guard780 = par1_go_out; +wire _guard750 = wrapper_early_reset_static_par_go_out; +wire _guard751 = fsm5_out == 2'd3; +wire _guard752 = invoke19_go_out; +wire _guard753 = invoke19_go_out; +wire _guard754 = invoke11_go_out; +wire _guard755 = early_reset_static_par_go_out; +wire _guard756 = invoke23_go_out; +wire _guard757 = invoke11_go_out; +wire _guard758 = invoke23_go_out; +wire _guard759 = early_reset_static_par_go_out; +wire _guard760 = invoke6_done_out; +wire _guard761 = ~_guard760; +wire _guard762 = fsm0_out == 2'd0; +wire _guard763 = _guard761 & _guard762; +wire _guard764 = tdcc_go_out; +wire _guard765 = _guard763 & _guard764; +wire _guard766 = invoke24_done_out; +wire _guard767 = ~_guard766; +wire _guard768 = fsm5_out == 2'd2; +wire _guard769 = _guard767 & _guard768; +wire _guard770 = tdcc4_go_out; +wire _guard771 = _guard769 & _guard770; +wire _guard772 = pd1_out; +wire _guard773 = tdcc1_done_out; +wire _guard774 = _guard772 | _guard773; +wire _guard775 = ~_guard774; +wire _guard776 = par0_go_out; +wire _guard777 = _guard775 & _guard776; +wire _guard778 = par0_done_out; +wire _guard779 = ~_guard778; +wire _guard780 = fsm6_out == 3'd1; wire _guard781 = _guard779 & _guard780; -wire _guard782 = _guard778 | _guard781; -wire _guard783 = tdcc3_done_out; -wire _guard784 = par1_go_out; -wire _guard785 = _guard783 & _guard784; -wire _guard786 = pd2_out; -wire _guard787 = pd3_out; -wire _guard788 = _guard786 & _guard787; -wire _guard789 = pd4_out; -wire _guard790 = _guard788 & _guard789; -wire _guard791 = wrapper_early_reset_static_par_go_out; -wire _guard792 = fsm5_out == 2'd3; -wire _guard793 = invoke20_go_out; -wire _guard794 = invoke19_go_out; -wire _guard795 = invoke20_go_out; -wire _guard796 = invoke19_go_out; -wire _guard797 = invoke11_go_out; -wire _guard798 = early_reset_static_par_go_out; -wire _guard799 = invoke23_go_out; -wire _guard800 = invoke11_go_out; -wire _guard801 = invoke23_go_out; -wire _guard802 = early_reset_static_par_go_out; -wire _guard803 = invoke6_done_out; -wire _guard804 = ~_guard803; -wire _guard805 = fsm0_out == 2'd0; -wire _guard806 = _guard804 & _guard805; -wire _guard807 = tdcc_go_out; -wire _guard808 = _guard806 & _guard807; -wire _guard809 = invoke24_done_out; -wire _guard810 = ~_guard809; -wire _guard811 = fsm5_out == 2'd2; -wire _guard812 = _guard810 & _guard811; -wire _guard813 = tdcc4_go_out; -wire _guard814 = _guard812 & _guard813; -wire _guard815 = pd1_out; -wire _guard816 = tdcc1_done_out; -wire _guard817 = _guard815 | _guard816; -wire _guard818 = ~_guard817; -wire _guard819 = par0_go_out; -wire _guard820 = _guard818 & _guard819; -wire _guard821 = par0_done_out; -wire _guard822 = ~_guard821; -wire _guard823 = fsm6_out == 3'd1; -wire _guard824 = _guard822 & _guard823; -wire _guard825 = tdcc5_go_out; -wire _guard826 = _guard824 & _guard825; -wire _guard827 = invoke7_done_out; -wire _guard828 = ~_guard827; -wire _guard829 = fsm0_out == 2'd1; -wire _guard830 = _guard828 & _guard829; -wire _guard831 = tdcc_go_out; -wire _guard832 = _guard830 & _guard831; -wire _guard833 = invoke10_done_out; -wire _guard834 = ~_guard833; -wire _guard835 = fsm2_out == 2'd0; -wire _guard836 = _guard834 & _guard835; -wire _guard837 = tdcc1_go_out; -wire _guard838 = _guard836 & _guard837; -wire _guard839 = invoke22_done_out; -wire _guard840 = ~_guard839; -wire _guard841 = fsm5_out == 2'd0; -wire _guard842 = _guard840 & _guard841; -wire _guard843 = tdcc4_go_out; -wire _guard844 = _guard842 & _guard843; -wire _guard845 = fsm6_out == 3'd5; +wire _guard782 = tdcc5_go_out; +wire _guard783 = _guard781 & _guard782; +wire _guard784 = invoke7_done_out; +wire _guard785 = ~_guard784; +wire _guard786 = fsm0_out == 2'd1; +wire _guard787 = _guard785 & _guard786; +wire _guard788 = tdcc_go_out; +wire _guard789 = _guard787 & _guard788; +wire _guard790 = invoke10_done_out; +wire _guard791 = ~_guard790; +wire _guard792 = fsm2_out == 2'd0; +wire _guard793 = _guard791 & _guard792; +wire _guard794 = tdcc1_go_out; +wire _guard795 = _guard793 & _guard794; +wire _guard796 = invoke22_done_out; +wire _guard797 = ~_guard796; +wire _guard798 = fsm5_out == 2'd0; +wire _guard799 = _guard797 & _guard798; +wire _guard800 = tdcc4_go_out; +wire _guard801 = _guard799 & _guard800; +wire _guard802 = fsm6_out == 3'd5; assign curr_addr_internal_mem_A0_write_en = _guard1 ? 1'd1 : _guard2 ? read_channel_A0_curr_addr_internal_mem_write_en : @@ -7302,241 +7275,235 @@ assign read_channel_Sum0_RDATA = _guard18 ? Sum0_RDATA : 32'd0; assign read_channel_Sum0_clk = clk; -assign read_channel_Sum0_mem_ref_read_data = - _guard19 ? internal_mem_Sum0_read_data : - 32'd0; -assign read_channel_Sum0_go = _guard20; +assign read_channel_Sum0_go = _guard19; assign read_channel_Sum0_reset = reset; assign read_channel_Sum0_RRESP = - _guard21 ? Sum0_RRESP : + _guard20 ? Sum0_RRESP : 2'd0; assign read_channel_Sum0_mem_ref_done = - _guard22 ? internal_mem_Sum0_done : + _guard21 ? internal_mem_Sum0_done : 1'd0; assign read_channel_Sum0_ARESETn = - _guard23 ? Sum0_ARESETn : + _guard22 ? Sum0_ARESETn : 1'd0; assign read_channel_Sum0_curr_addr_internal_mem_done = - _guard24 ? curr_addr_internal_mem_Sum0_done : + _guard23 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign read_channel_Sum0_curr_addr_axi_done = - _guard25 ? curr_addr_axi_Sum0_done : + _guard24 ? curr_addr_axi_Sum0_done : 1'd0; -assign done = _guard26; +assign done = _guard25; assign B0_WLAST = - _guard27 ? write_channel_B0_WLAST : + _guard26 ? write_channel_B0_WLAST : 1'd0; assign Sum0_ARVALID = - _guard28 ? ar_channel_Sum0_ARVALID : + _guard27 ? ar_channel_Sum0_ARVALID : 1'd0; assign Sum0_ARBURST = - _guard29 ? ar_channel_Sum0_ARBURST : + _guard28 ? ar_channel_Sum0_ARBURST : 2'd0; assign Sum0_AWADDR = - _guard30 ? aw_channel_Sum0_AWADDR : + _guard29 ? aw_channel_Sum0_AWADDR : 64'd0; assign Sum0_AWSIZE = - _guard31 ? aw_channel_Sum0_AWSIZE : + _guard30 ? aw_channel_Sum0_AWSIZE : 3'd0; assign Sum0_ARID = 1'd0; assign A0_ARSIZE = - _guard32 ? ar_channel_A0_ARSIZE : + _guard31 ? ar_channel_A0_ARSIZE : 3'd0; assign A0_AWBURST = - _guard33 ? aw_channel_A0_AWBURST : + _guard32 ? aw_channel_A0_AWBURST : 2'd0; assign B0_AWBURST = - _guard34 ? aw_channel_B0_AWBURST : + _guard33 ? aw_channel_B0_AWBURST : 2'd0; assign Sum0_WDATA = - _guard35 ? write_channel_Sum0_WDATA : + _guard34 ? write_channel_Sum0_WDATA : 32'd0; assign A0_BREADY = - _guard36 ? bresp_channel_A0_BREADY : + _guard35 ? bresp_channel_A0_BREADY : 1'd0; assign B0_AWLEN = - _guard37 ? aw_channel_B0_AWLEN : + _guard36 ? aw_channel_B0_AWLEN : 8'd0; assign Sum0_RREADY = - _guard38 ? read_channel_Sum0_RREADY : + _guard37 ? read_channel_Sum0_RREADY : 1'd0; assign B0_ARID = 1'd0; assign B0_ARBURST = - _guard39 ? ar_channel_B0_ARBURST : + _guard38 ? ar_channel_B0_ARBURST : 2'd0; assign B0_AWVALID = - _guard40 ? aw_channel_B0_AWVALID : + _guard39 ? aw_channel_B0_AWVALID : 1'd0; assign B0_WVALID = - _guard41 ? write_channel_B0_WVALID : + _guard40 ? write_channel_B0_WVALID : 1'd0; assign Sum0_AWLEN = - _guard42 ? aw_channel_Sum0_AWLEN : + _guard41 ? aw_channel_Sum0_AWLEN : 8'd0; assign Sum0_BID = 1'd0; assign A0_AWSIZE = - _guard43 ? aw_channel_A0_AWSIZE : + _guard42 ? aw_channel_A0_AWSIZE : 3'd0; assign B0_ARLEN = - _guard44 ? ar_channel_B0_ARLEN : + _guard43 ? ar_channel_B0_ARLEN : 8'd0; assign B0_WID = 1'd0; assign B0_BID = 1'd0; assign A0_WLAST = - _guard45 ? write_channel_A0_WLAST : + _guard44 ? write_channel_A0_WLAST : 1'd0; assign B0_ARVALID = - _guard46 ? ar_channel_B0_ARVALID : + _guard45 ? ar_channel_B0_ARVALID : 1'd0; assign B0_AWPROT = - _guard47 ? aw_channel_B0_AWPROT : + _guard46 ? aw_channel_B0_AWPROT : 3'd0; assign Sum0_AWPROT = - _guard48 ? aw_channel_Sum0_AWPROT : + _guard47 ? aw_channel_Sum0_AWPROT : 3'd0; assign A0_ARBURST = - _guard49 ? ar_channel_A0_ARBURST : + _guard48 ? ar_channel_A0_ARBURST : 2'd0; assign A0_AWPROT = - _guard50 ? aw_channel_A0_AWPROT : + _guard49 ? aw_channel_A0_AWPROT : 3'd0; assign Sum0_WLAST = - _guard51 ? write_channel_Sum0_WLAST : + _guard50 ? write_channel_Sum0_WLAST : 1'd0; assign Sum0_BREADY = - _guard52 ? bresp_channel_Sum0_BREADY : + _guard51 ? bresp_channel_Sum0_BREADY : 1'd0; assign Sum0_AWID = 1'd0; assign A0_WVALID = - _guard53 ? write_channel_A0_WVALID : + _guard52 ? write_channel_A0_WVALID : 1'd0; assign A0_WID = 1'd0; assign B0_AWID = 1'd0; assign A0_ARADDR = - _guard54 ? ar_channel_A0_ARADDR : + _guard53 ? ar_channel_A0_ARADDR : 64'd0; assign A0_WDATA = - _guard55 ? write_channel_A0_WDATA : + _guard54 ? write_channel_A0_WDATA : 32'd0; assign Sum0_ARADDR = - _guard56 ? ar_channel_Sum0_ARADDR : + _guard55 ? ar_channel_Sum0_ARADDR : 64'd0; assign Sum0_AWBURST = - _guard57 ? aw_channel_Sum0_AWBURST : + _guard56 ? aw_channel_Sum0_AWBURST : 2'd0; assign Sum0_WVALID = - _guard58 ? write_channel_Sum0_WVALID : + _guard57 ? write_channel_Sum0_WVALID : 1'd0; assign A0_RREADY = - _guard59 ? read_channel_A0_RREADY : + _guard58 ? read_channel_A0_RREADY : 1'd0; assign A0_BID = 1'd0; assign B0_RREADY = - _guard60 ? read_channel_B0_RREADY : + _guard59 ? read_channel_B0_RREADY : 1'd0; assign B0_WDATA = - _guard61 ? write_channel_B0_WDATA : + _guard60 ? write_channel_B0_WDATA : 32'd0; assign B0_BREADY = - _guard62 ? bresp_channel_B0_BREADY : + _guard61 ? bresp_channel_B0_BREADY : 1'd0; assign A0_AWLEN = - _guard63 ? aw_channel_A0_AWLEN : + _guard62 ? aw_channel_A0_AWLEN : 8'd0; assign B0_ARSIZE = - _guard64 ? ar_channel_B0_ARSIZE : + _guard63 ? ar_channel_B0_ARSIZE : 3'd0; assign A0_AWADDR = - _guard65 ? aw_channel_A0_AWADDR : + _guard64 ? aw_channel_A0_AWADDR : 64'd0; assign B0_ARADDR = - _guard66 ? ar_channel_B0_ARADDR : + _guard65 ? ar_channel_B0_ARADDR : 64'd0; assign Sum0_ARSIZE = - _guard67 ? ar_channel_Sum0_ARSIZE : + _guard66 ? ar_channel_Sum0_ARSIZE : 3'd0; assign Sum0_ARLEN = - _guard68 ? ar_channel_Sum0_ARLEN : + _guard67 ? ar_channel_Sum0_ARLEN : 8'd0; assign Sum0_AWVALID = - _guard69 ? aw_channel_Sum0_AWVALID : + _guard68 ? aw_channel_Sum0_AWVALID : 1'd0; assign A0_ARVALID = - _guard70 ? ar_channel_A0_ARVALID : + _guard69 ? ar_channel_A0_ARVALID : 1'd0; assign A0_AWVALID = - _guard71 ? aw_channel_A0_AWVALID : + _guard70 ? aw_channel_A0_AWVALID : 1'd0; assign A0_ARID = 1'd0; assign B0_AWADDR = - _guard72 ? aw_channel_B0_AWADDR : + _guard71 ? aw_channel_B0_AWADDR : 64'd0; assign B0_AWSIZE = - _guard73 ? aw_channel_B0_AWSIZE : + _guard72 ? aw_channel_B0_AWSIZE : 3'd0; assign Sum0_WID = 1'd0; assign A0_ARLEN = - _guard74 ? ar_channel_A0_ARLEN : + _guard73 ? ar_channel_A0_ARLEN : 8'd0; assign A0_AWID = 1'd0; -assign fsm_write_en = _guard77; +assign fsm_write_en = _guard76; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = _guard80 ? adder_out : _guard87 ? 1'd0 : - _guard90 ? adder0_out : + _guard91 ? adder0_out : 1'd0; assign adder_left = - _guard91 ? fsm_out : + _guard92 ? fsm_out : 1'd0; -assign adder_right = _guard92; -assign fsm6_write_en = _guard123; +assign adder_right = _guard93; +assign fsm6_write_en = _guard124; assign fsm6_clk = clk; assign fsm6_reset = reset; assign fsm6_in = - _guard128 ? 3'd5 : - _guard133 ? 3'd2 : - _guard138 ? 3'd4 : - _guard143 ? 3'd1 : - _guard144 ? 3'd0 : - _guard149 ? 3'd3 : + _guard129 ? 3'd5 : + _guard134 ? 3'd2 : + _guard139 ? 3'd4 : + _guard144 ? 3'd1 : + _guard145 ? 3'd0 : + _guard150 ? 3'd3 : 3'd0; -assign early_reset_static_par0_go_in = _guard150; +assign early_reset_static_par0_go_in = _guard151; assign invoke11_done_in = read_channel_Sum0_done; -assign invoke18_go_in = _guard156; -assign tdcc2_go_in = _guard162; +assign invoke18_go_in = _guard157; +assign tdcc2_go_in = _guard163; assign curr_addr_internal_mem_B0_write_en = - _guard163 ? read_channel_B0_curr_addr_internal_mem_write_en : - _guard164 ? 1'd1 : - _guard165 ? write_channel_B0_curr_addr_internal_mem_write_en : + _guard164 ? read_channel_B0_curr_addr_internal_mem_write_en : + _guard165 ? 1'd1 : + _guard166 ? write_channel_B0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_B0_clk = clk; assign curr_addr_internal_mem_B0_reset = reset; assign curr_addr_internal_mem_B0_in = - _guard166 ? read_channel_B0_curr_addr_internal_mem_in : - _guard167 ? write_channel_B0_curr_addr_internal_mem_in : - _guard168 ? 3'd0 : + _guard167 ? read_channel_B0_curr_addr_internal_mem_in : + _guard168 ? write_channel_B0_curr_addr_internal_mem_in : + _guard169 ? 3'd0 : 'x; assign read_channel_B0_curr_addr_internal_mem_out = - _guard169 ? curr_addr_internal_mem_B0_out : + _guard170 ? curr_addr_internal_mem_B0_out : 3'd0; assign read_channel_B0_curr_addr_axi_out = - _guard170 ? curr_addr_axi_B0_out : + _guard171 ? curr_addr_axi_B0_out : 64'd0; assign read_channel_B0_RVALID = - _guard171 ? B0_RVALID : + _guard172 ? B0_RVALID : 1'd0; assign read_channel_B0_RLAST = - _guard172 ? B0_RLAST : + _guard173 ? B0_RLAST : 1'd0; assign read_channel_B0_RDATA = - _guard173 ? B0_RDATA : + _guard174 ? B0_RDATA : 32'd0; assign read_channel_B0_clk = clk; -assign read_channel_B0_mem_ref_read_data = - _guard174 ? internal_mem_B0_read_data : - 32'd0; assign read_channel_B0_go = _guard175; assign read_channel_B0_reset = reset; assign read_channel_B0_RRESP = @@ -7571,581 +7538,488 @@ assign internal_mem_B0_content_en = _guard189 ? write_channel_B0_mem_ref_content_en : 1'd0; assign internal_mem_B0_reset = reset; -assign internal_mem_B0_write_data = - _guard190 ? read_channel_B0_mem_ref_write_data : - _guard191 ? main_compute_B0_write_data : - _guard192 ? write_channel_B0_mem_ref_write_data : - 'x; +assign internal_mem_B0_write_data = read_channel_B0_mem_ref_write_data; assign bresp_channel_Sum0_clk = clk; -assign bresp_channel_Sum0_go = _guard193; +assign bresp_channel_Sum0_go = _guard191; assign bresp_channel_Sum0_reset = reset; assign bresp_channel_Sum0_BVALID = - _guard194 ? Sum0_BVALID : + _guard192 ? Sum0_BVALID : 1'd0; -assign fsm3_write_en = _guard213; +assign fsm3_write_en = _guard211; assign fsm3_clk = clk; assign fsm3_reset = reset; assign fsm3_in = - _guard218 ? 2'd1 : - _guard219 ? 2'd0 : - _guard224 ? 2'd3 : - _guard229 ? 2'd2 : + _guard216 ? 2'd1 : + _guard217 ? 2'd0 : + _guard222 ? 2'd3 : + _guard227 ? 2'd2 : 2'd0; -assign fsm5_write_en = _guard248; +assign fsm5_write_en = _guard246; assign fsm5_clk = clk; assign fsm5_reset = reset; assign fsm5_in = - _guard253 ? 2'd1 : - _guard254 ? 2'd0 : - _guard259 ? 2'd3 : - _guard264 ? 2'd2 : + _guard251 ? 2'd1 : + _guard252 ? 2'd0 : + _guard257 ? 2'd3 : + _guard262 ? 2'd2 : 2'd0; -assign tdcc0_done_in = _guard265; +assign tdcc0_done_in = _guard263; assign curr_addr_axi_B0_write_en = - _guard266 ? read_channel_B0_curr_addr_axi_write_en : - _guard269 ? 1'd1 : - _guard270 ? write_channel_B0_curr_addr_axi_write_en : - _guard271 ? aw_channel_B0_curr_addr_axi_write_en : - _guard272 ? ar_channel_B0_curr_addr_axi_write_en : + _guard264 ? read_channel_B0_curr_addr_axi_write_en : + _guard267 ? 1'd1 : + _guard268 ? write_channel_B0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_B0_clk = clk; assign curr_addr_axi_B0_reset = reset; assign curr_addr_axi_B0_in = - _guard273 ? read_channel_B0_curr_addr_axi_in : - _guard274 ? write_channel_B0_curr_addr_axi_in : - _guard275 ? aw_channel_B0_curr_addr_axi_in : - _guard278 ? 64'd4096 : - _guard279 ? ar_channel_B0_curr_addr_axi_in : + _guard269 ? read_channel_B0_curr_addr_axi_in : + _guard270 ? write_channel_B0_curr_addr_axi_in : + _guard273 ? 64'd4096 : 'x; assign max_transfers_Sum0_write_en = - _guard280 ? aw_channel_Sum0_max_transfers_write_en : - _guard281 ? write_channel_Sum0_max_transfers_write_en : + _guard274 ? aw_channel_Sum0_max_transfers_write_en : 1'd0; assign max_transfers_Sum0_clk = clk; assign max_transfers_Sum0_reset = reset; -assign max_transfers_Sum0_in = - _guard282 ? aw_channel_Sum0_max_transfers_in : - _guard283 ? write_channel_Sum0_max_transfers_in : - 'x; +assign max_transfers_Sum0_in = aw_channel_Sum0_max_transfers_in; assign main_compute_A0_read_data = - _guard284 ? internal_mem_A0_read_data : + _guard276 ? internal_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard285 ? internal_mem_B0_read_data : + _guard277 ? internal_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard286 ? internal_mem_Sum0_done : + _guard278 ? internal_mem_Sum0_done : 1'd0; assign main_compute_clk = clk; assign main_compute_B0_done = - _guard287 ? internal_mem_B0_done : + _guard279 ? internal_mem_B0_done : 1'd0; -assign main_compute_go = _guard288; +assign main_compute_go = _guard280; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard289 ? internal_mem_A0_done : + _guard281 ? internal_mem_A0_done : 1'd0; -assign main_compute_Sum0_read_data = - _guard290 ? internal_mem_Sum0_read_data : - 32'd0; -assign fsm1_write_en = _guard303; +assign fsm1_write_en = _guard294; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard308 ? 2'd1 : - _guard309 ? 2'd0 : - _guard314 ? 2'd2 : + _guard299 ? 2'd1 : + _guard300 ? 2'd0 : + _guard305 ? 2'd2 : 2'd0; -assign fsm4_write_en = _guard333; +assign fsm4_write_en = _guard324; assign fsm4_clk = clk; assign fsm4_reset = reset; assign fsm4_in = - _guard338 ? 2'd1 : - _guard339 ? 2'd0 : - _guard344 ? 2'd3 : - _guard349 ? 2'd2 : + _guard329 ? 2'd1 : + _guard330 ? 2'd0 : + _guard335 ? 2'd3 : + _guard340 ? 2'd2 : 2'd0; -assign wrapper_early_reset_static_par_go_in = _guard355; -assign invoke11_go_in = _guard361; +assign wrapper_early_reset_static_par_go_in = _guard346; +assign invoke11_go_in = _guard352; assign invoke20_done_in = write_channel_B0_done; -assign invoke23_go_in = _guard367; -assign par1_go_in = _guard373; +assign invoke23_go_in = _guard358; +assign par1_go_in = _guard364; assign curr_addr_axi_A0_write_en = - _guard376 ? 1'd1 : - _guard377 ? read_channel_A0_curr_addr_axi_write_en : - _guard378 ? ar_channel_A0_curr_addr_axi_write_en : - _guard379 ? aw_channel_A0_curr_addr_axi_write_en : - _guard380 ? write_channel_A0_curr_addr_axi_write_en : + _guard367 ? 1'd1 : + _guard368 ? read_channel_A0_curr_addr_axi_write_en : + _guard369 ? write_channel_A0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_A0_clk = clk; assign curr_addr_axi_A0_reset = reset; assign curr_addr_axi_A0_in = - _guard381 ? read_channel_A0_curr_addr_axi_in : - _guard382 ? ar_channel_A0_curr_addr_axi_in : - _guard383 ? aw_channel_A0_curr_addr_axi_in : - _guard386 ? 64'd4096 : - _guard387 ? write_channel_A0_curr_addr_axi_in : + _guard370 ? read_channel_A0_curr_addr_axi_in : + _guard373 ? 64'd4096 : + _guard374 ? write_channel_A0_curr_addr_axi_in : 'x; assign read_channel_A0_curr_addr_internal_mem_out = - _guard388 ? curr_addr_internal_mem_A0_out : + _guard375 ? curr_addr_internal_mem_A0_out : 3'd0; assign read_channel_A0_curr_addr_axi_out = - _guard389 ? curr_addr_axi_A0_out : + _guard376 ? curr_addr_axi_A0_out : 64'd0; assign read_channel_A0_RVALID = - _guard390 ? A0_RVALID : + _guard377 ? A0_RVALID : 1'd0; assign read_channel_A0_RLAST = - _guard391 ? A0_RLAST : + _guard378 ? A0_RLAST : 1'd0; assign read_channel_A0_RDATA = - _guard392 ? A0_RDATA : + _guard379 ? A0_RDATA : 32'd0; assign read_channel_A0_clk = clk; -assign read_channel_A0_mem_ref_read_data = - _guard393 ? internal_mem_A0_read_data : - 32'd0; -assign read_channel_A0_go = _guard394; +assign read_channel_A0_go = _guard380; assign read_channel_A0_reset = reset; assign read_channel_A0_RRESP = - _guard395 ? A0_RRESP : + _guard381 ? A0_RRESP : 2'd0; assign read_channel_A0_mem_ref_done = - _guard396 ? internal_mem_A0_done : + _guard382 ? internal_mem_A0_done : 1'd0; assign read_channel_A0_ARESETn = - _guard397 ? A0_ARESETn : + _guard383 ? A0_ARESETn : 1'd0; assign read_channel_A0_curr_addr_internal_mem_done = - _guard398 ? curr_addr_internal_mem_A0_done : + _guard384 ? curr_addr_internal_mem_A0_done : 1'd0; assign read_channel_A0_curr_addr_axi_done = - _guard399 ? curr_addr_axi_A0_done : + _guard385 ? curr_addr_axi_A0_done : 1'd0; assign internal_mem_A0_write_en = - _guard400 ? main_compute_A0_write_en : - _guard401 ? read_channel_A0_mem_ref_write_en : - _guard402 ? write_channel_A0_mem_ref_write_en : + _guard386 ? main_compute_A0_write_en : + _guard387 ? read_channel_A0_mem_ref_write_en : + _guard388 ? write_channel_A0_mem_ref_write_en : 1'd0; assign internal_mem_A0_clk = clk; assign internal_mem_A0_addr0 = - _guard403 ? main_compute_A0_addr0 : - _guard404 ? read_channel_A0_mem_ref_addr0 : - _guard405 ? write_channel_A0_mem_ref_addr0 : + _guard389 ? main_compute_A0_addr0 : + _guard390 ? read_channel_A0_mem_ref_addr0 : + _guard391 ? write_channel_A0_mem_ref_addr0 : 'x; assign internal_mem_A0_content_en = - _guard406 ? main_compute_A0_content_en : - _guard407 ? read_channel_A0_mem_ref_content_en : - _guard408 ? write_channel_A0_mem_ref_content_en : + _guard392 ? main_compute_A0_content_en : + _guard393 ? read_channel_A0_mem_ref_content_en : + _guard394 ? write_channel_A0_mem_ref_content_en : 1'd0; assign internal_mem_A0_reset = reset; -assign internal_mem_A0_write_data = - _guard409 ? main_compute_A0_write_data : - _guard410 ? read_channel_A0_mem_ref_write_data : - _guard411 ? write_channel_A0_mem_ref_write_data : - 'x; +assign internal_mem_A0_write_data = read_channel_A0_mem_ref_write_data; assign write_channel_B0_WREADY = - _guard412 ? B0_WREADY : + _guard396 ? B0_WREADY : 1'd0; assign write_channel_B0_curr_addr_internal_mem_out = - _guard413 ? curr_addr_internal_mem_B0_out : + _guard397 ? curr_addr_internal_mem_B0_out : 3'd0; assign write_channel_B0_curr_addr_axi_out = - _guard414 ? curr_addr_axi_B0_out : + _guard398 ? curr_addr_axi_B0_out : 64'd0; assign write_channel_B0_max_transfers_out = - _guard415 ? max_transfers_B0_out : + _guard399 ? max_transfers_B0_out : 8'd0; -assign write_channel_B0_max_transfers_done = - _guard416 ? max_transfers_B0_done : - 1'd0; assign write_channel_B0_clk = clk; assign write_channel_B0_mem_ref_read_data = - _guard417 ? internal_mem_B0_read_data : + _guard400 ? internal_mem_B0_read_data : 32'd0; -assign write_channel_B0_go = _guard418; +assign write_channel_B0_go = _guard401; assign write_channel_B0_reset = reset; -assign write_channel_B0_mem_ref_done = - _guard419 ? internal_mem_B0_done : - 1'd0; assign write_channel_B0_ARESETn = - _guard420 ? B0_ARESETn : + _guard402 ? B0_ARESETn : 1'd0; assign write_channel_B0_curr_addr_internal_mem_done = - _guard421 ? curr_addr_internal_mem_B0_done : + _guard403 ? curr_addr_internal_mem_B0_done : 1'd0; assign write_channel_B0_curr_addr_axi_done = - _guard422 ? curr_addr_axi_B0_done : + _guard404 ? curr_addr_axi_B0_done : 1'd0; assign curr_addr_axi_Sum0_write_en = - _guard423 ? read_channel_Sum0_curr_addr_axi_write_en : - _guard426 ? 1'd1 : - _guard427 ? ar_channel_Sum0_curr_addr_axi_write_en : - _guard428 ? aw_channel_Sum0_curr_addr_axi_write_en : - _guard429 ? write_channel_Sum0_curr_addr_axi_write_en : + _guard405 ? read_channel_Sum0_curr_addr_axi_write_en : + _guard408 ? 1'd1 : + _guard409 ? write_channel_Sum0_curr_addr_axi_write_en : 1'd0; assign curr_addr_axi_Sum0_clk = clk; assign curr_addr_axi_Sum0_reset = reset; assign curr_addr_axi_Sum0_in = - _guard430 ? read_channel_Sum0_curr_addr_axi_in : - _guard431 ? ar_channel_Sum0_curr_addr_axi_in : - _guard434 ? 64'd4096 : - _guard435 ? aw_channel_Sum0_curr_addr_axi_in : - _guard436 ? write_channel_Sum0_curr_addr_axi_in : + _guard410 ? read_channel_Sum0_curr_addr_axi_in : + _guard413 ? 64'd4096 : + _guard414 ? write_channel_Sum0_curr_addr_axi_in : 'x; assign ar_channel_Sum0_curr_addr_axi_out = - _guard437 ? curr_addr_axi_Sum0_out : + _guard415 ? curr_addr_axi_Sum0_out : 64'd0; assign ar_channel_Sum0_clk = clk; -assign ar_channel_Sum0_go = _guard438; +assign ar_channel_Sum0_go = _guard416; assign ar_channel_Sum0_reset = reset; assign ar_channel_Sum0_ARREADY = - _guard439 ? Sum0_ARREADY : + _guard417 ? Sum0_ARREADY : 1'd0; assign ar_channel_Sum0_ARESETn = - _guard440 ? Sum0_ARESETn : + _guard418 ? Sum0_ARESETn : 1'd0; -assign ar_channel_Sum0_curr_addr_axi_done = - _guard441 ? curr_addr_axi_Sum0_done : - 1'd0; -assign pd1_write_en = _guard450; +assign pd1_write_en = _guard427; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard453 ? 1'd1 : - _guard458 ? 1'd0 : + _guard430 ? 1'd1 : + _guard435 ? 1'd0 : 1'd0; assign early_reset_static_par0_done_in = ud0_out; -assign wrapper_early_reset_static_par_done_in = _guard461; -assign tdcc_go_in = _guard467; -assign invoke12_go_in = _guard473; +assign wrapper_early_reset_static_par_done_in = _guard438; +assign tdcc_go_in = _guard444; +assign invoke12_go_in = _guard450; assign invoke16_done_in = aw_channel_A0_done; assign invoke18_done_in = bresp_channel_A0_done; assign invoke23_done_in = write_channel_Sum0_done; -assign tdcc3_go_in = _guard479; -assign tdcc3_done_in = _guard480; +assign tdcc3_go_in = _guard456; +assign tdcc3_done_in = _guard457; assign aw_channel_B0_curr_addr_axi_out = - _guard481 ? curr_addr_axi_B0_out : + _guard458 ? curr_addr_axi_B0_out : 64'd0; -assign aw_channel_B0_max_transfers_out = - _guard482 ? max_transfers_B0_out : - 8'd0; -assign aw_channel_B0_max_transfers_done = - _guard483 ? max_transfers_B0_done : - 1'd0; assign aw_channel_B0_clk = clk; assign aw_channel_B0_AWREADY = - _guard484 ? B0_AWREADY : + _guard459 ? B0_AWREADY : 1'd0; -assign aw_channel_B0_go = _guard485; +assign aw_channel_B0_go = _guard460; assign aw_channel_B0_reset = reset; assign aw_channel_B0_ARESETn = - _guard486 ? B0_ARESETn : - 1'd0; -assign aw_channel_B0_curr_addr_axi_done = - _guard487 ? curr_addr_axi_B0_done : + _guard461 ? B0_ARESETn : 1'd0; -assign fsm0_write_en = _guard500; +assign fsm0_write_en = _guard474; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard505 ? 2'd1 : - _guard506 ? 2'd0 : - _guard511 ? 2'd2 : + _guard479 ? 2'd1 : + _guard480 ? 2'd0 : + _guard485 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard524; +assign fsm2_write_en = _guard498; assign fsm2_clk = clk; assign fsm2_reset = reset; assign fsm2_in = - _guard529 ? 2'd1 : - _guard530 ? 2'd0 : - _guard535 ? 2'd2 : + _guard503 ? 2'd1 : + _guard504 ? 2'd0 : + _guard509 ? 2'd2 : 2'd0; -assign invoke8_go_in = _guard541; +assign invoke8_go_in = _guard515; assign invoke10_done_in = ar_channel_Sum0_done; -assign tdcc0_go_in = _guard547; +assign tdcc0_go_in = _guard521; assign ar_channel_A0_curr_addr_axi_out = - _guard548 ? curr_addr_axi_A0_out : + _guard522 ? curr_addr_axi_A0_out : 64'd0; assign ar_channel_A0_clk = clk; -assign ar_channel_A0_go = _guard549; +assign ar_channel_A0_go = _guard523; assign ar_channel_A0_reset = reset; assign ar_channel_A0_ARREADY = - _guard550 ? A0_ARREADY : + _guard524 ? A0_ARREADY : 1'd0; assign ar_channel_A0_ARESETn = - _guard551 ? A0_ARESETn : - 1'd0; -assign ar_channel_A0_curr_addr_axi_done = - _guard552 ? curr_addr_axi_A0_done : + _guard525 ? A0_ARESETn : 1'd0; assign aw_channel_A0_curr_addr_axi_out = - _guard553 ? curr_addr_axi_A0_out : + _guard526 ? curr_addr_axi_A0_out : 64'd0; -assign aw_channel_A0_max_transfers_out = - _guard554 ? max_transfers_A0_out : - 8'd0; -assign aw_channel_A0_max_transfers_done = - _guard555 ? max_transfers_A0_done : - 1'd0; assign aw_channel_A0_clk = clk; assign aw_channel_A0_AWREADY = - _guard556 ? A0_AWREADY : + _guard527 ? A0_AWREADY : 1'd0; -assign aw_channel_A0_go = _guard557; +assign aw_channel_A0_go = _guard528; assign aw_channel_A0_reset = reset; assign aw_channel_A0_ARESETn = - _guard558 ? A0_ARESETn : - 1'd0; -assign aw_channel_A0_curr_addr_axi_done = - _guard559 ? curr_addr_axi_A0_done : + _guard529 ? A0_ARESETn : 1'd0; -assign par0_done_in = _guard564; +assign par0_done_in = _guard534; assign invoke8_done_in = ar_channel_B0_done; assign invoke12_done_in = main_compute_done; -assign invoke17_go_in = _guard570; -assign invoke21_go_in = _guard576; +assign invoke17_go_in = _guard540; +assign invoke21_go_in = _guard546; assign adder0_left = - _guard577 ? fsm_out : + _guard547 ? fsm_out : 1'd0; -assign adder0_right = _guard578; -assign pd2_write_en = _guard587; +assign adder0_right = _guard548; +assign pd2_write_en = _guard557; assign pd2_clk = clk; assign pd2_reset = reset; assign pd2_in = - _guard590 ? 1'd1 : - _guard595 ? 1'd0 : + _guard560 ? 1'd1 : + _guard565 ? 1'd0 : 1'd0; assign early_reset_static_par_done_in = ud_out; assign invoke6_done_in = ar_channel_A0_done; -assign invoke16_go_in = _guard601; +assign invoke16_go_in = _guard571; assign invoke19_done_in = aw_channel_B0_done; assign write_channel_A0_WREADY = - _guard602 ? A0_WREADY : + _guard572 ? A0_WREADY : 1'd0; assign write_channel_A0_curr_addr_internal_mem_out = - _guard603 ? curr_addr_internal_mem_A0_out : + _guard573 ? curr_addr_internal_mem_A0_out : 3'd0; assign write_channel_A0_curr_addr_axi_out = - _guard604 ? curr_addr_axi_A0_out : + _guard574 ? curr_addr_axi_A0_out : 64'd0; assign write_channel_A0_max_transfers_out = - _guard605 ? max_transfers_A0_out : + _guard575 ? max_transfers_A0_out : 8'd0; -assign write_channel_A0_max_transfers_done = - _guard606 ? max_transfers_A0_done : - 1'd0; assign write_channel_A0_clk = clk; assign write_channel_A0_mem_ref_read_data = - _guard607 ? internal_mem_A0_read_data : + _guard576 ? internal_mem_A0_read_data : 32'd0; -assign write_channel_A0_go = _guard608; +assign write_channel_A0_go = _guard577; assign write_channel_A0_reset = reset; -assign write_channel_A0_mem_ref_done = - _guard609 ? internal_mem_A0_done : - 1'd0; assign write_channel_A0_ARESETn = - _guard610 ? A0_ARESETn : + _guard578 ? A0_ARESETn : 1'd0; assign write_channel_A0_curr_addr_internal_mem_done = - _guard611 ? curr_addr_internal_mem_A0_done : + _guard579 ? curr_addr_internal_mem_A0_done : 1'd0; assign write_channel_A0_curr_addr_axi_done = - _guard612 ? curr_addr_axi_A0_done : + _guard580 ? curr_addr_axi_A0_done : 1'd0; assign ar_channel_B0_curr_addr_axi_out = - _guard613 ? curr_addr_axi_B0_out : + _guard581 ? curr_addr_axi_B0_out : 64'd0; assign ar_channel_B0_clk = clk; -assign ar_channel_B0_go = _guard614; +assign ar_channel_B0_go = _guard582; assign ar_channel_B0_reset = reset; assign ar_channel_B0_ARREADY = - _guard615 ? B0_ARREADY : + _guard583 ? B0_ARREADY : 1'd0; assign ar_channel_B0_ARESETn = - _guard616 ? B0_ARESETn : + _guard584 ? B0_ARESETn : 1'd0; -assign ar_channel_B0_curr_addr_axi_done = - _guard617 ? curr_addr_axi_B0_done : - 1'd0; -assign signal_reg_write_en = _guard634; +assign signal_reg_write_en = _guard601; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard647 ? 1'd1 : - _guard650 ? 1'd0 : + _guard614 ? 1'd1 : + _guard617 ? 1'd0 : 1'd0; assign invoke24_done_in = bresp_channel_Sum0_done; -assign tdcc1_done_in = _guard651; -assign par1_done_in = _guard656; +assign tdcc1_done_in = _guard618; +assign par1_done_in = _guard623; assign bresp_channel_B0_clk = clk; -assign bresp_channel_B0_go = _guard657; +assign bresp_channel_B0_go = _guard624; assign bresp_channel_B0_reset = reset; assign bresp_channel_B0_BVALID = - _guard658 ? B0_BVALID : + _guard625 ? B0_BVALID : 1'd0; assign internal_mem_Sum0_write_en = - _guard659 ? read_channel_Sum0_mem_ref_write_en : - _guard660 ? main_compute_Sum0_write_en : - _guard661 ? write_channel_Sum0_mem_ref_write_en : + _guard626 ? read_channel_Sum0_mem_ref_write_en : + _guard627 ? main_compute_Sum0_write_en : + _guard628 ? write_channel_Sum0_mem_ref_write_en : 1'd0; assign internal_mem_Sum0_clk = clk; assign internal_mem_Sum0_addr0 = - _guard662 ? read_channel_Sum0_mem_ref_addr0 : - _guard663 ? main_compute_Sum0_addr0 : - _guard664 ? write_channel_Sum0_mem_ref_addr0 : + _guard629 ? read_channel_Sum0_mem_ref_addr0 : + _guard630 ? main_compute_Sum0_addr0 : + _guard631 ? write_channel_Sum0_mem_ref_addr0 : 'x; assign internal_mem_Sum0_content_en = - _guard665 ? read_channel_Sum0_mem_ref_content_en : - _guard666 ? main_compute_Sum0_content_en : - _guard667 ? write_channel_Sum0_mem_ref_content_en : + _guard632 ? read_channel_Sum0_mem_ref_content_en : + _guard633 ? main_compute_Sum0_content_en : + _guard634 ? write_channel_Sum0_mem_ref_content_en : 1'd0; assign internal_mem_Sum0_reset = reset; assign internal_mem_Sum0_write_data = - _guard668 ? read_channel_Sum0_mem_ref_write_data : - _guard669 ? main_compute_Sum0_write_data : - _guard670 ? write_channel_Sum0_mem_ref_write_data : + _guard635 ? read_channel_Sum0_mem_ref_write_data : + _guard636 ? main_compute_Sum0_write_data : 'x; -assign pd_write_en = _guard679; +assign pd_write_en = _guard645; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard682 ? 1'd1 : - _guard687 ? 1'd0 : + _guard648 ? 1'd1 : + _guard653 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard696; +assign pd0_write_en = _guard662; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard699 ? 1'd1 : - _guard704 ? 1'd0 : + _guard665 ? 1'd1 : + _guard670 ? 1'd0 : 1'd0; -assign pd4_write_en = _guard713; +assign pd4_write_en = _guard679; assign pd4_clk = clk; assign pd4_reset = reset; assign pd4_in = - _guard716 ? 1'd1 : - _guard721 ? 1'd0 : + _guard682 ? 1'd1 : + _guard687 ? 1'd0 : 1'd0; assign invoke22_done_in = aw_channel_Sum0_done; -assign tdcc4_go_in = _guard727; +assign tdcc4_go_in = _guard693; assign bresp_channel_A0_clk = clk; -assign bresp_channel_A0_go = _guard728; +assign bresp_channel_A0_go = _guard694; assign bresp_channel_A0_reset = reset; assign bresp_channel_A0_BVALID = - _guard729 ? A0_BVALID : + _guard695 ? A0_BVALID : 1'd0; -assign wrapper_early_reset_static_par0_go_in = _guard735; -assign wrapper_early_reset_static_par0_done_in = _guard738; -assign tdcc_done_in = _guard739; +assign wrapper_early_reset_static_par0_go_in = _guard701; +assign wrapper_early_reset_static_par0_done_in = _guard704; +assign tdcc_done_in = _guard705; assign invoke17_done_in = write_channel_A0_done; -assign invoke19_go_in = _guard745; -assign invoke20_go_in = _guard751; +assign invoke19_go_in = _guard711; +assign invoke20_go_in = _guard717; assign invoke21_done_in = bresp_channel_B0_done; assign max_transfers_A0_write_en = - _guard752 ? aw_channel_A0_max_transfers_write_en : - _guard753 ? write_channel_A0_max_transfers_write_en : + _guard718 ? aw_channel_A0_max_transfers_write_en : 1'd0; assign max_transfers_A0_clk = clk; assign max_transfers_A0_reset = reset; -assign max_transfers_A0_in = - _guard754 ? aw_channel_A0_max_transfers_in : - _guard755 ? write_channel_A0_max_transfers_in : - 'x; +assign max_transfers_A0_in = aw_channel_A0_max_transfers_in; assign aw_channel_Sum0_curr_addr_axi_out = - _guard756 ? curr_addr_axi_Sum0_out : + _guard720 ? curr_addr_axi_Sum0_out : 64'd0; -assign aw_channel_Sum0_max_transfers_out = - _guard757 ? max_transfers_Sum0_out : - 8'd0; -assign aw_channel_Sum0_max_transfers_done = - _guard758 ? max_transfers_Sum0_done : - 1'd0; assign aw_channel_Sum0_clk = clk; assign aw_channel_Sum0_AWREADY = - _guard759 ? Sum0_AWREADY : + _guard721 ? Sum0_AWREADY : 1'd0; -assign aw_channel_Sum0_go = _guard760; +assign aw_channel_Sum0_go = _guard722; assign aw_channel_Sum0_reset = reset; assign aw_channel_Sum0_ARESETn = - _guard761 ? Sum0_ARESETn : - 1'd0; -assign aw_channel_Sum0_curr_addr_axi_done = - _guard762 ? curr_addr_axi_Sum0_done : + _guard723 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_WREADY = - _guard763 ? Sum0_WREADY : + _guard724 ? Sum0_WREADY : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_out = - _guard764 ? curr_addr_internal_mem_Sum0_out : + _guard725 ? curr_addr_internal_mem_Sum0_out : 3'd0; assign write_channel_Sum0_curr_addr_axi_out = - _guard765 ? curr_addr_axi_Sum0_out : + _guard726 ? curr_addr_axi_Sum0_out : 64'd0; assign write_channel_Sum0_max_transfers_out = - _guard766 ? max_transfers_Sum0_out : + _guard727 ? max_transfers_Sum0_out : 8'd0; -assign write_channel_Sum0_max_transfers_done = - _guard767 ? max_transfers_Sum0_done : - 1'd0; assign write_channel_Sum0_clk = clk; assign write_channel_Sum0_mem_ref_read_data = - _guard768 ? internal_mem_Sum0_read_data : + _guard728 ? internal_mem_Sum0_read_data : 32'd0; -assign write_channel_Sum0_go = _guard769; +assign write_channel_Sum0_go = _guard729; assign write_channel_Sum0_reset = reset; -assign write_channel_Sum0_mem_ref_done = - _guard770 ? internal_mem_Sum0_done : - 1'd0; assign write_channel_Sum0_ARESETn = - _guard771 ? Sum0_ARESETn : + _guard730 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_done = - _guard772 ? curr_addr_internal_mem_Sum0_done : + _guard731 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign write_channel_Sum0_curr_addr_axi_done = - _guard773 ? curr_addr_axi_Sum0_done : + _guard732 ? curr_addr_axi_Sum0_done : 1'd0; -assign pd3_write_en = _guard782; +assign pd3_write_en = _guard741; assign pd3_clk = clk; assign pd3_reset = reset; assign pd3_in = - _guard785 ? 1'd1 : - _guard790 ? 1'd0 : + _guard744 ? 1'd1 : + _guard749 ? 1'd0 : 1'd0; -assign early_reset_static_par_go_in = _guard791; -assign tdcc4_done_in = _guard792; +assign early_reset_static_par_go_in = _guard750; +assign tdcc4_done_in = _guard751; assign max_transfers_B0_write_en = - _guard793 ? write_channel_B0_max_transfers_write_en : - _guard794 ? aw_channel_B0_max_transfers_write_en : + _guard752 ? aw_channel_B0_max_transfers_write_en : 1'd0; assign max_transfers_B0_clk = clk; assign max_transfers_B0_reset = reset; -assign max_transfers_B0_in = - _guard795 ? write_channel_B0_max_transfers_in : - _guard796 ? aw_channel_B0_max_transfers_in : - 'x; +assign max_transfers_B0_in = aw_channel_B0_max_transfers_in; assign curr_addr_internal_mem_Sum0_write_en = - _guard797 ? read_channel_Sum0_curr_addr_internal_mem_write_en : - _guard798 ? 1'd1 : - _guard799 ? write_channel_Sum0_curr_addr_internal_mem_write_en : + _guard754 ? read_channel_Sum0_curr_addr_internal_mem_write_en : + _guard755 ? 1'd1 : + _guard756 ? write_channel_Sum0_curr_addr_internal_mem_write_en : 1'd0; assign curr_addr_internal_mem_Sum0_clk = clk; assign curr_addr_internal_mem_Sum0_reset = reset; assign curr_addr_internal_mem_Sum0_in = - _guard800 ? read_channel_Sum0_curr_addr_internal_mem_in : - _guard801 ? write_channel_Sum0_curr_addr_internal_mem_in : - _guard802 ? 3'd0 : + _guard757 ? read_channel_Sum0_curr_addr_internal_mem_in : + _guard758 ? write_channel_Sum0_curr_addr_internal_mem_in : + _guard759 ? 3'd0 : 'x; -assign invoke6_go_in = _guard808; -assign invoke24_go_in = _guard814; -assign tdcc1_go_in = _guard820; -assign par0_go_in = _guard826; -assign invoke7_go_in = _guard832; -assign invoke10_go_in = _guard838; -assign invoke22_go_in = _guard844; +assign invoke6_go_in = _guard765; +assign invoke24_go_in = _guard771; +assign tdcc1_go_in = _guard777; +assign par0_go_in = _guard783; +assign invoke7_go_in = _guard789; +assign invoke10_go_in = _guard795; +assign invoke22_go_in = _guard801; assign tdcc5_go_in = go; -assign tdcc5_done_in = _guard845; +assign tdcc5_done_in = _guard802; // COMPONENT END: wrapper endmodule module main( @@ -8217,10 +8091,10 @@ logic fsm_clk; logic fsm_reset; logic fsm_out; logic fsm_done; -logic ud_out; logic adder_left; logic adder_right; logic adder_out; +logic ud_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; @@ -8407,11 +8281,6 @@ std_reg # ( .reset(fsm_reset), .write_en(fsm_write_en) ); -undef # ( - .WIDTH(1) -) ud ( - .out(ud_out) -); std_add # ( .WIDTH(1) ) adder ( @@ -8419,6 +8288,11 @@ std_add # ( .out(adder_out), .right(adder_right) ); +undef # ( + .WIDTH(1) +) ud ( + .out(ud_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -8662,311 +8536,312 @@ wire _guard23 = beg_spl_upd0_go_out; wire _guard24 = upd2_go_out; wire _guard25 = _guard23 | _guard24; wire _guard26 = early_reset_cond00_go_out; -wire _guard27 = fsm_out != 1'd0; -wire _guard28 = early_reset_cond00_go_out; -wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = early_reset_cond00_go_out; -wire _guard32 = _guard30 & _guard31; -wire _guard33 = early_reset_cond00_go_out; +wire _guard27 = fsm_out == 1'd0; +wire _guard28 = ~_guard27; +wire _guard29 = early_reset_cond00_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 1'd0; +wire _guard32 = early_reset_cond00_go_out; +wire _guard33 = _guard31 & _guard32; wire _guard34 = early_reset_cond00_go_out; -wire _guard35 = beg_spl_upd0_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd0; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; -wire _guard40 = _guard38 & _guard39; -wire _guard41 = upd2_go_out; +wire _guard35 = early_reset_cond00_go_out; +wire _guard36 = beg_spl_upd0_done_out; +wire _guard37 = ~_guard36; +wire _guard38 = fsm0_out == 2'd0; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; +wire _guard41 = _guard39 & _guard40; wire _guard42 = upd2_go_out; -wire _guard43 = invoke2_done_out; -wire _guard44 = ~_guard43; -wire _guard45 = fsm1_out == 2'd1; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = tdcc0_go_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = fsm1_out == 2'd2; -wire _guard50 = early_reset_cond00_go_out; +wire _guard43 = upd2_go_out; +wire _guard44 = invoke2_done_out; +wire _guard45 = ~_guard44; +wire _guard46 = fsm1_out == 2'd1; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = tdcc0_go_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = fsm1_out == 2'd2; wire _guard51 = early_reset_cond00_go_out; -wire _guard52 = fsm1_out == 2'd2; -wire _guard53 = fsm1_out == 2'd0; -wire _guard54 = beg_spl_upd1_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc0_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = _guard52 | _guard57; -wire _guard59 = fsm1_out == 2'd1; -wire _guard60 = invoke2_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc0_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = _guard58 | _guard63; -wire _guard65 = fsm1_out == 2'd0; -wire _guard66 = beg_spl_upd1_done_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc0_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = fsm1_out == 2'd2; -wire _guard71 = fsm1_out == 2'd1; -wire _guard72 = invoke2_done_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = tdcc0_go_out; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = pd_out; -wire _guard77 = tdcc_done_out; -wire _guard78 = _guard76 | _guard77; -wire _guard79 = ~_guard78; -wire _guard80 = par0_go_out; -wire _guard81 = _guard79 & _guard80; -wire _guard82 = invoke0_done_out; -wire _guard83 = ~_guard82; -wire _guard84 = fsm2_out == 3'd0; -wire _guard85 = _guard83 & _guard84; -wire _guard86 = tdcc1_go_out; -wire _guard87 = _guard85 & _guard86; -wire _guard88 = fsm0_out == 2'd2; -wire _guard89 = fsm0_out == 2'd0; -wire _guard90 = beg_spl_upd0_done_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = tdcc_go_out; -wire _guard93 = _guard91 & _guard92; -wire _guard94 = _guard88 | _guard93; -wire _guard95 = fsm0_out == 2'd1; -wire _guard96 = invoke1_done_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = tdcc_go_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = _guard94 | _guard99; -wire _guard101 = fsm0_out == 2'd0; -wire _guard102 = beg_spl_upd0_done_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = tdcc_go_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = fsm0_out == 2'd2; -wire _guard107 = fsm0_out == 2'd1; -wire _guard108 = invoke1_done_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = tdcc_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = fsm2_out == 3'd6; -wire _guard113 = fsm2_out == 3'd0; -wire _guard114 = invoke0_done_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = tdcc1_go_out; -wire _guard117 = _guard115 & _guard116; -wire _guard118 = _guard112 | _guard117; -wire _guard119 = fsm2_out == 3'd1; -wire _guard120 = wrapper_early_reset_cond00_done_out; -wire _guard121 = comb_reg_out; -wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard119 & _guard122; -wire _guard124 = tdcc1_go_out; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = _guard118 | _guard125; -wire _guard127 = fsm2_out == 3'd5; -wire _guard128 = wrapper_early_reset_cond00_done_out; -wire _guard129 = comb_reg_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = _guard127 & _guard130; -wire _guard132 = tdcc1_go_out; -wire _guard133 = _guard131 & _guard132; -wire _guard134 = _guard126 | _guard133; -wire _guard135 = fsm2_out == 3'd2; -wire _guard136 = par0_done_out; -wire _guard137 = _guard135 & _guard136; -wire _guard138 = tdcc1_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = _guard134 | _guard139; -wire _guard141 = fsm2_out == 3'd3; -wire _guard142 = upd2_done_out; -wire _guard143 = _guard141 & _guard142; -wire _guard144 = tdcc1_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = _guard140 | _guard145; -wire _guard147 = fsm2_out == 3'd4; -wire _guard148 = invoke3_done_out; -wire _guard149 = _guard147 & _guard148; -wire _guard150 = tdcc1_go_out; -wire _guard151 = _guard149 & _guard150; -wire _guard152 = _guard146 | _guard151; -wire _guard153 = fsm2_out == 3'd1; -wire _guard154 = wrapper_early_reset_cond00_done_out; -wire _guard155 = comb_reg_out; -wire _guard156 = ~_guard155; -wire _guard157 = _guard154 & _guard156; -wire _guard158 = _guard153 & _guard157; -wire _guard159 = tdcc1_go_out; -wire _guard160 = _guard158 & _guard159; -wire _guard161 = _guard152 | _guard160; -wire _guard162 = fsm2_out == 3'd5; -wire _guard163 = wrapper_early_reset_cond00_done_out; -wire _guard164 = comb_reg_out; -wire _guard165 = ~_guard164; -wire _guard166 = _guard163 & _guard165; -wire _guard167 = _guard162 & _guard166; -wire _guard168 = tdcc1_go_out; -wire _guard169 = _guard167 & _guard168; -wire _guard170 = _guard161 | _guard169; -wire _guard171 = fsm2_out == 3'd1; -wire _guard172 = wrapper_early_reset_cond00_done_out; -wire _guard173 = comb_reg_out; -wire _guard174 = ~_guard173; -wire _guard175 = _guard172 & _guard174; -wire _guard176 = _guard171 & _guard175; -wire _guard177 = tdcc1_go_out; -wire _guard178 = _guard176 & _guard177; -wire _guard179 = fsm2_out == 3'd5; -wire _guard180 = wrapper_early_reset_cond00_done_out; -wire _guard181 = comb_reg_out; -wire _guard182 = ~_guard181; -wire _guard183 = _guard180 & _guard182; -wire _guard184 = _guard179 & _guard183; -wire _guard185 = tdcc1_go_out; -wire _guard186 = _guard184 & _guard185; -wire _guard187 = _guard178 | _guard186; -wire _guard188 = fsm2_out == 3'd4; -wire _guard189 = invoke3_done_out; -wire _guard190 = _guard188 & _guard189; -wire _guard191 = tdcc1_go_out; -wire _guard192 = _guard190 & _guard191; -wire _guard193 = fsm2_out == 3'd1; -wire _guard194 = wrapper_early_reset_cond00_done_out; -wire _guard195 = comb_reg_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = _guard193 & _guard196; -wire _guard198 = tdcc1_go_out; -wire _guard199 = _guard197 & _guard198; -wire _guard200 = fsm2_out == 3'd5; -wire _guard201 = wrapper_early_reset_cond00_done_out; -wire _guard202 = comb_reg_out; -wire _guard203 = _guard201 & _guard202; -wire _guard204 = _guard200 & _guard203; -wire _guard205 = tdcc1_go_out; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = _guard199 | _guard206; -wire _guard208 = fsm2_out == 3'd3; -wire _guard209 = upd2_done_out; -wire _guard210 = _guard208 & _guard209; -wire _guard211 = tdcc1_go_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = fsm2_out == 3'd0; -wire _guard214 = invoke0_done_out; -wire _guard215 = _guard213 & _guard214; -wire _guard216 = tdcc1_go_out; -wire _guard217 = _guard215 & _guard216; -wire _guard218 = fsm2_out == 3'd6; -wire _guard219 = fsm2_out == 3'd2; -wire _guard220 = par0_done_out; -wire _guard221 = _guard219 & _guard220; -wire _guard222 = tdcc1_go_out; -wire _guard223 = _guard221 & _guard222; -wire _guard224 = pd0_out; -wire _guard225 = tdcc0_done_out; -wire _guard226 = _guard224 | _guard225; -wire _guard227 = ~_guard226; -wire _guard228 = par0_go_out; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = pd_out; -wire _guard231 = pd0_out; -wire _guard232 = _guard230 & _guard231; -wire _guard233 = invoke1_done_out; -wire _guard234 = ~_guard233; -wire _guard235 = fsm0_out == 2'd1; -wire _guard236 = _guard234 & _guard235; -wire _guard237 = tdcc_go_out; -wire _guard238 = _guard236 & _guard237; -wire _guard239 = beg_spl_upd1_done_out; -wire _guard240 = ~_guard239; -wire _guard241 = fsm1_out == 2'd0; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = tdcc0_go_out; -wire _guard244 = _guard242 & _guard243; -wire _guard245 = early_reset_cond00_go_out; +wire _guard52 = early_reset_cond00_go_out; +wire _guard53 = fsm1_out == 2'd2; +wire _guard54 = fsm1_out == 2'd0; +wire _guard55 = beg_spl_upd1_done_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = tdcc0_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = _guard53 | _guard58; +wire _guard60 = fsm1_out == 2'd1; +wire _guard61 = invoke2_done_out; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = tdcc0_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = _guard59 | _guard64; +wire _guard66 = fsm1_out == 2'd0; +wire _guard67 = beg_spl_upd1_done_out; +wire _guard68 = _guard66 & _guard67; +wire _guard69 = tdcc0_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = fsm1_out == 2'd2; +wire _guard72 = fsm1_out == 2'd1; +wire _guard73 = invoke2_done_out; +wire _guard74 = _guard72 & _guard73; +wire _guard75 = tdcc0_go_out; +wire _guard76 = _guard74 & _guard75; +wire _guard77 = pd_out; +wire _guard78 = tdcc_done_out; +wire _guard79 = _guard77 | _guard78; +wire _guard80 = ~_guard79; +wire _guard81 = par0_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = invoke0_done_out; +wire _guard84 = ~_guard83; +wire _guard85 = fsm2_out == 3'd0; +wire _guard86 = _guard84 & _guard85; +wire _guard87 = tdcc1_go_out; +wire _guard88 = _guard86 & _guard87; +wire _guard89 = fsm0_out == 2'd2; +wire _guard90 = fsm0_out == 2'd0; +wire _guard91 = beg_spl_upd0_done_out; +wire _guard92 = _guard90 & _guard91; +wire _guard93 = tdcc_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard89 | _guard94; +wire _guard96 = fsm0_out == 2'd1; +wire _guard97 = invoke1_done_out; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = tdcc_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = _guard95 | _guard100; +wire _guard102 = fsm0_out == 2'd0; +wire _guard103 = beg_spl_upd0_done_out; +wire _guard104 = _guard102 & _guard103; +wire _guard105 = tdcc_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = fsm0_out == 2'd2; +wire _guard108 = fsm0_out == 2'd1; +wire _guard109 = invoke1_done_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = tdcc_go_out; +wire _guard112 = _guard110 & _guard111; +wire _guard113 = fsm2_out == 3'd6; +wire _guard114 = fsm2_out == 3'd0; +wire _guard115 = invoke0_done_out; +wire _guard116 = _guard114 & _guard115; +wire _guard117 = tdcc1_go_out; +wire _guard118 = _guard116 & _guard117; +wire _guard119 = _guard113 | _guard118; +wire _guard120 = fsm2_out == 3'd1; +wire _guard121 = wrapper_early_reset_cond00_done_out; +wire _guard122 = comb_reg_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = _guard120 & _guard123; +wire _guard125 = tdcc1_go_out; +wire _guard126 = _guard124 & _guard125; +wire _guard127 = _guard119 | _guard126; +wire _guard128 = fsm2_out == 3'd5; +wire _guard129 = wrapper_early_reset_cond00_done_out; +wire _guard130 = comb_reg_out; +wire _guard131 = _guard129 & _guard130; +wire _guard132 = _guard128 & _guard131; +wire _guard133 = tdcc1_go_out; +wire _guard134 = _guard132 & _guard133; +wire _guard135 = _guard127 | _guard134; +wire _guard136 = fsm2_out == 3'd2; +wire _guard137 = par0_done_out; +wire _guard138 = _guard136 & _guard137; +wire _guard139 = tdcc1_go_out; +wire _guard140 = _guard138 & _guard139; +wire _guard141 = _guard135 | _guard140; +wire _guard142 = fsm2_out == 3'd3; +wire _guard143 = upd2_done_out; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = tdcc1_go_out; +wire _guard146 = _guard144 & _guard145; +wire _guard147 = _guard141 | _guard146; +wire _guard148 = fsm2_out == 3'd4; +wire _guard149 = invoke3_done_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = tdcc1_go_out; +wire _guard152 = _guard150 & _guard151; +wire _guard153 = _guard147 | _guard152; +wire _guard154 = fsm2_out == 3'd1; +wire _guard155 = wrapper_early_reset_cond00_done_out; +wire _guard156 = comb_reg_out; +wire _guard157 = ~_guard156; +wire _guard158 = _guard155 & _guard157; +wire _guard159 = _guard154 & _guard158; +wire _guard160 = tdcc1_go_out; +wire _guard161 = _guard159 & _guard160; +wire _guard162 = _guard153 | _guard161; +wire _guard163 = fsm2_out == 3'd5; +wire _guard164 = wrapper_early_reset_cond00_done_out; +wire _guard165 = comb_reg_out; +wire _guard166 = ~_guard165; +wire _guard167 = _guard164 & _guard166; +wire _guard168 = _guard163 & _guard167; +wire _guard169 = tdcc1_go_out; +wire _guard170 = _guard168 & _guard169; +wire _guard171 = _guard162 | _guard170; +wire _guard172 = fsm2_out == 3'd1; +wire _guard173 = wrapper_early_reset_cond00_done_out; +wire _guard174 = comb_reg_out; +wire _guard175 = ~_guard174; +wire _guard176 = _guard173 & _guard175; +wire _guard177 = _guard172 & _guard176; +wire _guard178 = tdcc1_go_out; +wire _guard179 = _guard177 & _guard178; +wire _guard180 = fsm2_out == 3'd5; +wire _guard181 = wrapper_early_reset_cond00_done_out; +wire _guard182 = comb_reg_out; +wire _guard183 = ~_guard182; +wire _guard184 = _guard181 & _guard183; +wire _guard185 = _guard180 & _guard184; +wire _guard186 = tdcc1_go_out; +wire _guard187 = _guard185 & _guard186; +wire _guard188 = _guard179 | _guard187; +wire _guard189 = fsm2_out == 3'd4; +wire _guard190 = invoke3_done_out; +wire _guard191 = _guard189 & _guard190; +wire _guard192 = tdcc1_go_out; +wire _guard193 = _guard191 & _guard192; +wire _guard194 = fsm2_out == 3'd1; +wire _guard195 = wrapper_early_reset_cond00_done_out; +wire _guard196 = comb_reg_out; +wire _guard197 = _guard195 & _guard196; +wire _guard198 = _guard194 & _guard197; +wire _guard199 = tdcc1_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = fsm2_out == 3'd5; +wire _guard202 = wrapper_early_reset_cond00_done_out; +wire _guard203 = comb_reg_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = _guard201 & _guard204; +wire _guard206 = tdcc1_go_out; +wire _guard207 = _guard205 & _guard206; +wire _guard208 = _guard200 | _guard207; +wire _guard209 = fsm2_out == 3'd3; +wire _guard210 = upd2_done_out; +wire _guard211 = _guard209 & _guard210; +wire _guard212 = tdcc1_go_out; +wire _guard213 = _guard211 & _guard212; +wire _guard214 = fsm2_out == 3'd0; +wire _guard215 = invoke0_done_out; +wire _guard216 = _guard214 & _guard215; +wire _guard217 = tdcc1_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = fsm2_out == 3'd6; +wire _guard220 = fsm2_out == 3'd2; +wire _guard221 = par0_done_out; +wire _guard222 = _guard220 & _guard221; +wire _guard223 = tdcc1_go_out; +wire _guard224 = _guard222 & _guard223; +wire _guard225 = pd0_out; +wire _guard226 = tdcc0_done_out; +wire _guard227 = _guard225 | _guard226; +wire _guard228 = ~_guard227; +wire _guard229 = par0_go_out; +wire _guard230 = _guard228 & _guard229; +wire _guard231 = pd_out; +wire _guard232 = pd0_out; +wire _guard233 = _guard231 & _guard232; +wire _guard234 = invoke1_done_out; +wire _guard235 = ~_guard234; +wire _guard236 = fsm0_out == 2'd1; +wire _guard237 = _guard235 & _guard236; +wire _guard238 = tdcc_go_out; +wire _guard239 = _guard237 & _guard238; +wire _guard240 = beg_spl_upd1_done_out; +wire _guard241 = ~_guard240; +wire _guard242 = fsm1_out == 2'd0; +wire _guard243 = _guard241 & _guard242; +wire _guard244 = tdcc0_go_out; +wire _guard245 = _guard243 & _guard244; wire _guard246 = early_reset_cond00_go_out; -wire _guard247 = fsm_out == 1'd0; -wire _guard248 = signal_reg_out; -wire _guard249 = _guard247 & _guard248; -wire _guard250 = fsm_out == 1'd0; -wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_cond00_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = _guard249 | _guard255; -wire _guard257 = fsm_out == 1'd0; -wire _guard258 = signal_reg_out; -wire _guard259 = ~_guard258; -wire _guard260 = _guard257 & _guard259; -wire _guard261 = wrapper_early_reset_cond00_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = fsm_out == 1'd0; -wire _guard264 = signal_reg_out; -wire _guard265 = _guard263 & _guard264; -wire _guard266 = fsm2_out == 3'd6; -wire _guard267 = invoke2_go_out; +wire _guard247 = early_reset_cond00_go_out; +wire _guard248 = fsm_out == 1'd0; +wire _guard249 = signal_reg_out; +wire _guard250 = _guard248 & _guard249; +wire _guard251 = fsm_out == 1'd0; +wire _guard252 = signal_reg_out; +wire _guard253 = ~_guard252; +wire _guard254 = _guard251 & _guard253; +wire _guard255 = wrapper_early_reset_cond00_go_out; +wire _guard256 = _guard254 & _guard255; +wire _guard257 = _guard250 | _guard256; +wire _guard258 = fsm_out == 1'd0; +wire _guard259 = signal_reg_out; +wire _guard260 = ~_guard259; +wire _guard261 = _guard258 & _guard260; +wire _guard262 = wrapper_early_reset_cond00_go_out; +wire _guard263 = _guard261 & _guard262; +wire _guard264 = fsm_out == 1'd0; +wire _guard265 = signal_reg_out; +wire _guard266 = _guard264 & _guard265; +wire _guard267 = fsm2_out == 3'd6; wire _guard268 = invoke2_go_out; -wire _guard269 = pd_out; -wire _guard270 = pd0_out; -wire _guard271 = _guard269 & _guard270; -wire _guard272 = tdcc_done_out; -wire _guard273 = par0_go_out; -wire _guard274 = _guard272 & _guard273; -wire _guard275 = _guard271 | _guard274; -wire _guard276 = tdcc_done_out; -wire _guard277 = par0_go_out; -wire _guard278 = _guard276 & _guard277; -wire _guard279 = pd_out; -wire _guard280 = pd0_out; -wire _guard281 = _guard279 & _guard280; -wire _guard282 = pd_out; -wire _guard283 = pd0_out; -wire _guard284 = _guard282 & _guard283; -wire _guard285 = tdcc0_done_out; -wire _guard286 = par0_go_out; -wire _guard287 = _guard285 & _guard286; -wire _guard288 = _guard284 | _guard287; -wire _guard289 = tdcc0_done_out; -wire _guard290 = par0_go_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = pd_out; -wire _guard293 = pd0_out; -wire _guard294 = _guard292 & _guard293; -wire _guard295 = wrapper_early_reset_cond00_done_out; -wire _guard296 = ~_guard295; -wire _guard297 = fsm2_out == 3'd1; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = tdcc1_go_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = wrapper_early_reset_cond00_done_out; -wire _guard302 = ~_guard301; -wire _guard303 = fsm2_out == 3'd5; -wire _guard304 = _guard302 & _guard303; -wire _guard305 = tdcc1_go_out; -wire _guard306 = _guard304 & _guard305; -wire _guard307 = _guard300 | _guard306; -wire _guard308 = fsm_out == 1'd0; -wire _guard309 = signal_reg_out; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = fsm0_out == 2'd2; -wire _guard312 = upd2_done_out; -wire _guard313 = ~_guard312; -wire _guard314 = fsm2_out == 3'd3; -wire _guard315 = _guard313 & _guard314; -wire _guard316 = tdcc1_go_out; -wire _guard317 = _guard315 & _guard316; -wire _guard318 = invoke3_done_out; -wire _guard319 = ~_guard318; -wire _guard320 = fsm2_out == 3'd4; -wire _guard321 = _guard319 & _guard320; -wire _guard322 = tdcc1_go_out; -wire _guard323 = _guard321 & _guard322; -wire _guard324 = invoke1_go_out; +wire _guard269 = invoke2_go_out; +wire _guard270 = pd_out; +wire _guard271 = pd0_out; +wire _guard272 = _guard270 & _guard271; +wire _guard273 = tdcc_done_out; +wire _guard274 = par0_go_out; +wire _guard275 = _guard273 & _guard274; +wire _guard276 = _guard272 | _guard275; +wire _guard277 = tdcc_done_out; +wire _guard278 = par0_go_out; +wire _guard279 = _guard277 & _guard278; +wire _guard280 = pd_out; +wire _guard281 = pd0_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = pd_out; +wire _guard284 = pd0_out; +wire _guard285 = _guard283 & _guard284; +wire _guard286 = tdcc0_done_out; +wire _guard287 = par0_go_out; +wire _guard288 = _guard286 & _guard287; +wire _guard289 = _guard285 | _guard288; +wire _guard290 = tdcc0_done_out; +wire _guard291 = par0_go_out; +wire _guard292 = _guard290 & _guard291; +wire _guard293 = pd_out; +wire _guard294 = pd0_out; +wire _guard295 = _guard293 & _guard294; +wire _guard296 = wrapper_early_reset_cond00_done_out; +wire _guard297 = ~_guard296; +wire _guard298 = fsm2_out == 3'd1; +wire _guard299 = _guard297 & _guard298; +wire _guard300 = tdcc1_go_out; +wire _guard301 = _guard299 & _guard300; +wire _guard302 = wrapper_early_reset_cond00_done_out; +wire _guard303 = ~_guard302; +wire _guard304 = fsm2_out == 3'd5; +wire _guard305 = _guard303 & _guard304; +wire _guard306 = tdcc1_go_out; +wire _guard307 = _guard305 & _guard306; +wire _guard308 = _guard301 | _guard307; +wire _guard309 = fsm_out == 1'd0; +wire _guard310 = signal_reg_out; +wire _guard311 = _guard309 & _guard310; +wire _guard312 = fsm0_out == 2'd2; +wire _guard313 = upd2_done_out; +wire _guard314 = ~_guard313; +wire _guard315 = fsm2_out == 3'd3; +wire _guard316 = _guard314 & _guard315; +wire _guard317 = tdcc1_go_out; +wire _guard318 = _guard316 & _guard317; +wire _guard319 = invoke3_done_out; +wire _guard320 = ~_guard319; +wire _guard321 = fsm2_out == 3'd4; +wire _guard322 = _guard320 & _guard321; +wire _guard323 = tdcc1_go_out; +wire _guard324 = _guard322 & _guard323; wire _guard325 = invoke1_go_out; -wire _guard326 = par0_done_out; -wire _guard327 = ~_guard326; -wire _guard328 = fsm2_out == 3'd2; -wire _guard329 = _guard327 & _guard328; -wire _guard330 = tdcc1_go_out; -wire _guard331 = _guard329 & _guard330; +wire _guard326 = invoke1_go_out; +wire _guard327 = par0_done_out; +wire _guard328 = ~_guard327; +wire _guard329 = fsm2_out == 3'd2; +wire _guard330 = _guard328 & _guard329; +wire _guard331 = tdcc1_go_out; +wire _guard332 = _guard330 & _guard331; assign i0_write_en = _guard3; assign i0_clk = clk; assign i0_reset = reset; @@ -8980,129 +8855,121 @@ assign add1_left = i0_out; assign add1_right = const2_out; assign done = _guard9; assign B0_write_en = 1'd0; -assign Sum0_addr0 = - _guard10 ? bit_slice_out : - 3'd0; +assign Sum0_addr0 = bit_slice_out; assign A0_write_en = 1'd0; -assign B0_addr0 = - _guard13 ? bit_slice_out : - 3'd0; +assign B0_addr0 = bit_slice_out; assign B0_content_en = _guard16; -assign A0_addr0 = - _guard19 ? bit_slice_out : - 3'd0; +assign A0_addr0 = bit_slice_out; assign Sum0_write_en = _guard20; assign Sum0_content_en = _guard21; -assign Sum0_write_data = - _guard22 ? add0_out : - 32'd0; +assign Sum0_write_data = add0_out; assign A0_content_en = _guard25; assign fsm_write_en = _guard26; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard29 ? adder_out : - _guard32 ? 1'd0 : + _guard30 ? adder_out : + _guard33 ? 1'd0 : 1'd0; assign adder_left = - _guard33 ? fsm_out : + _guard34 ? fsm_out : 1'd0; -assign adder_right = _guard34; -assign beg_spl_upd0_go_in = _guard40; +assign adder_right = _guard35; +assign beg_spl_upd0_go_in = _guard41; assign add0_left = B_read0_0_out; assign add0_right = A_read0_0_out; -assign invoke2_go_in = _guard48; -assign tdcc0_done_in = _guard49; -assign comb_reg_write_en = _guard50; +assign invoke2_go_in = _guard49; +assign tdcc0_done_in = _guard50; +assign comb_reg_write_en = _guard51; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard51 ? le0_out : + _guard52 ? le0_out : 1'd0; assign early_reset_cond00_done_in = ud_out; -assign fsm1_write_en = _guard64; +assign fsm1_write_en = _guard65; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard69 ? 2'd1 : - _guard70 ? 2'd0 : - _guard75 ? 2'd2 : + _guard70 ? 2'd1 : + _guard71 ? 2'd0 : + _guard76 ? 2'd2 : 2'd0; -assign tdcc_go_in = _guard81; -assign invoke0_go_in = _guard87; +assign tdcc_go_in = _guard82; +assign invoke0_go_in = _guard88; assign beg_spl_upd0_done_in = A0_done; assign bit_slice_in = i0_out; -assign fsm0_write_en = _guard100; +assign fsm0_write_en = _guard101; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard105 ? 2'd1 : - _guard106 ? 2'd0 : - _guard111 ? 2'd2 : + _guard106 ? 2'd1 : + _guard107 ? 2'd0 : + _guard112 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard170; +assign fsm2_write_en = _guard171; assign fsm2_clk = clk; assign fsm2_reset = reset; assign fsm2_in = - _guard187 ? 3'd6 : - _guard192 ? 3'd5 : - _guard207 ? 3'd2 : - _guard212 ? 3'd4 : - _guard217 ? 3'd1 : - _guard218 ? 3'd0 : - _guard223 ? 3'd3 : + _guard188 ? 3'd6 : + _guard193 ? 3'd5 : + _guard208 ? 3'd2 : + _guard213 ? 3'd4 : + _guard218 ? 3'd1 : + _guard219 ? 3'd0 : + _guard224 ? 3'd3 : 3'd0; -assign tdcc0_go_in = _guard229; +assign tdcc0_go_in = _guard230; assign invoke3_done_in = i0_done; -assign par0_done_in = _guard232; +assign par0_done_in = _guard233; assign invoke0_done_in = i0_done; -assign invoke1_go_in = _guard238; -assign beg_spl_upd1_go_in = _guard244; +assign invoke1_go_in = _guard239; +assign beg_spl_upd1_go_in = _guard245; assign le0_left = - _guard245 ? i0_out : + _guard246 ? i0_out : 4'd0; assign le0_right = - _guard246 ? const1_out : + _guard247 ? const1_out : 4'd0; -assign signal_reg_write_en = _guard256; +assign signal_reg_write_en = _guard257; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard262 ? 1'd1 : - _guard265 ? 1'd0 : + _guard263 ? 1'd1 : + _guard266 ? 1'd0 : 1'd0; assign invoke2_done_in = B_read0_0_done; -assign tdcc1_done_in = _guard266; +assign tdcc1_done_in = _guard267; assign beg_spl_upd1_done_in = B0_done; -assign B_read0_0_write_en = _guard267; +assign B_read0_0_write_en = _guard268; assign B_read0_0_clk = clk; assign B_read0_0_reset = reset; assign B_read0_0_in = B0_read_data; -assign pd_write_en = _guard275; +assign pd_write_en = _guard276; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard278 ? 1'd1 : - _guard281 ? 1'd0 : + _guard279 ? 1'd1 : + _guard282 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard288; +assign pd0_write_en = _guard289; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard291 ? 1'd1 : - _guard294 ? 1'd0 : - 1'd0; -assign wrapper_early_reset_cond00_go_in = _guard307; -assign wrapper_early_reset_cond00_done_in = _guard310; -assign tdcc_done_in = _guard311; -assign upd2_go_in = _guard317; -assign invoke3_go_in = _guard323; + _guard292 ? 1'd1 : + _guard295 ? 1'd0 : + 1'd0; +assign wrapper_early_reset_cond00_go_in = _guard308; +assign wrapper_early_reset_cond00_done_in = _guard311; +assign tdcc_done_in = _guard312; +assign upd2_go_in = _guard318; +assign invoke3_go_in = _guard324; assign invoke1_done_in = A_read0_0_done; assign tdcc1_go_in = go; -assign A_read0_0_write_en = _guard324; +assign A_read0_0_write_en = _guard325; assign A_read0_0_clk = clk; assign A_read0_0_reset = reset; assign A_read0_0_in = A0_read_data; -assign par0_go_in = _guard331; +assign par0_go_in = _guard332; // COMPONENT END: main endmodule From 8f0f87870699e7c8a25a2596cca23eab9fd20dd9 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 12:33:55 -0400 Subject: [PATCH 30/66] fud2 formatting --- fud2/src/lib.rs | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs index ed32ec4972..0e0599f0e4 100644 --- a/fud2/src/lib.rs +++ b/fud2/src/lib.rs @@ -845,8 +845,7 @@ pub fn build_driver(bld: &mut DriverBuilder) { e.rule("iverilog-fst-sed", r#"sed '/\/\/ COMPONENT END: wrapper/c\`ifdef COCOTB_SIM\n initial begin\n \$$dumpfile ("$fst_file_name");\n \$$dumpvars (0, wrapper);\n #1;\n end\n`endif\n\/\/ COMPONENT END: wrapper' $in > $out"#)?; } - -e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; + e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; e.rule("make-cocotb", "make DATA_PATH=$sim_data VERILOG_SOURCE=$in COCOTB_LOG_LEVEL=CRITICAL $cocotb-args > $out")?; // This cleans up the extra `make` and `FST warning` cruft, leaving what is in between `{` and `}.` @@ -888,11 +887,11 @@ e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; let waves = FromStr::from_str(&waves) .expect("The 'waves' flag should be either 'true' or 'false'."); - let fst_file_name = format!("{}.fst", basename(input)); - let mut make_in = input; + let fst_file_name = format!("{}.fst", basename(input[0])); + let mut make_in = input[0]; if waves { make_in = "dumpvars.v"; - e.build_cmd(&[make_in], "iverilog-fst-sed", &[input], &[])?; + e.build_cmd(&[make_in], "iverilog-fst-sed", &[input[0]], &[])?; e.arg("fst_file_name", &fst_file_name)?; } e.build_cmd( From 92faa81229a17b7f795f0e708ad10be189a6b16d Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 12:34:19 -0400 Subject: [PATCH 31/66] add writes to base addresses (this means we need subordinate controller in all of our tests) --- yxi/axi-calyx/axi_controller_generator.py | 38 ++++++----------------- yxi/axi-calyx/cocotb/axi_test.py | 9 ++++-- 2 files changed, 15 insertions(+), 32 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 26066309a7..39ac56cdeb 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -519,43 +519,23 @@ def add_control_subordinate(prog, mems): xrt_control_reg.write_en = 1 check_ap_done.done = xrt_control_reg.done - # Ideally we would use the below to - # pass in the registers as ref cells, but because we want - # to invoke both controllers in parallel, we can't do this. - # To get around this we can manually hook up ports for registers - # ``` - # sub_controller_kwargs = {} - # for reg in control_regs: - # sub_controller_kwargs[f"ref_{reg.name}"] = reg - # # Control - # read_controller_invoke = invoke( - # read_controller, - # **sub_controller_kwargs - # ) - - # write_controller_invoke = invoke( - # write_controller, - # **sub_controller_kwargs - # ) - # ``` - - read_controller_kwargs = {} - write_controller_kwargs = {} + #Pass in the concrete cells as into our invokes + sub_controller_kwargs = {} for reg in control_regs: - read_controller_kwargs[f"in_{reg.name}_out"] = reg.out - write_controller_kwargs[f"out_{reg.name}_in"] = reg.in_ - write_controller_kwargs[f"out_{reg.name}_write_en"] = reg.write_en - n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) - + sub_controller_kwargs[f"ref_{reg.name}"] = reg + # Control read_controller_invoke = invoke( read_controller, - **read_controller_kwargs, + **sub_controller_kwargs ) + write_controller_invoke = invoke( write_controller, - **write_controller_kwargs, + **sub_controller_kwargs ) + + n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) control_subordinate.control += [ init_control_regs, while_with(n_ap_done, [par(write_controller_invoke, read_controller_invoke), check_ap_done]), diff --git a/yxi/axi-calyx/cocotb/axi_test.py b/yxi/axi-calyx/cocotb/axi_test.py index 2fc531b09c..63a2e5616c 100644 --- a/yxi/axi-calyx/cocotb/axi_test.py +++ b/yxi/axi-calyx/cocotb/axi_test.py @@ -90,7 +90,11 @@ async def run_kernel_test(toplevel, data_path: str): # Finish when ap_done is high or 100 us of simulation have passed. timeout = 5000 #Assert ap_start by writing 1 to 0x0000 - await tb.control_manager.write(0x0000, encode([1],1)) + await tb.control_manager.write(0x0000, encode([0],1)) + #Base addresses for memories + await tb.control_manager.write(0x0018, encode([0],8)) + await tb.control_manager.write(0x0020, encode([0],8)) + await tb.control_manager.write(0x0028, encode([0],8)) await with_timeout(RisingEdge(toplevel.done), timeout, "us") @@ -156,7 +160,6 @@ def encode( width, byteorder: Union[Literal["little"], Literal["big"]] = "little", signed: bool = False -) -> bytes: - + ) -> bytes: """Return the `width`-wide byte representation of lst with byteorder""" return b''.join(i.to_bytes(width, byteorder, signed=signed) for i in lst) From 274ff9c17ebf21b60141945e6fd9627c8704a3c7 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sun, 21 Jul 2024 12:42:12 -0400 Subject: [PATCH 32/66] get rid of added debug statements --- calyx-opt/src/passes/compile_invoke.rs | 105 ++----------------------- 1 file changed, 6 insertions(+), 99 deletions(-) diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index 513ecace67..42127846ae 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -159,25 +159,6 @@ impl CompileInvoke { unreachable!("component `{}` invoked but not already visited by the pass", inv_comp_id) }; - log::debug!( - "self.port_names: {} \n {}", - self.port_names.0.keys().join(", "), - self.port_names - .0 - .values() - .map(|m| m.keys().join(", ")) - .join(" :: ") - ); - - log::debug!( - "Comp ports: {} \n -> {}", - comp_ports.keys().join(", "), - comp_ports - .values() - .map(|p| p.borrow().canonical()) - .join(", ") - ); - //contains the newly added ports that result from ref cells removal/dump_ports let new_comp_ports = comp_ports .values() @@ -190,13 +171,6 @@ impl CompileInvoke { // we assume that all ports are used if let Some(invoked_comp) = invoked_comp { invoked_comp.iter_assignments(|a| { - // ref_reg_out for example - log::debug!( - "invoked_comp `{}` assignments: {} -> {}", - invoked_comp.name, - a.src.borrow().canonical(), - a.dst.borrow().canonical() - ); for port in a.iter_ports() { used_ports.insert(port.borrow().name); } @@ -210,24 +184,9 @@ impl CompileInvoke { used_ports.clone_from(&new_comp_ports); } - log::debug!("new_comp_ports: {}", new_comp_ports.iter().join(", ")); - log::debug!("used_ports: {}", used_ports.iter().join(", ")); - let to_assign: HashSet<&ir::Id> = new_comp_ports.intersection(&used_ports).collect(); - log::debug!("concrete_cell: {}", concrete_cell.borrow().name()); - log::debug!( - "concrete_cell ports: {}", - concrete_cell - .borrow() - .ports() - .iter() - .map(|p| p.borrow().get_parent_name()) - .join(", ") - ); - // let ref_cell_ports = concrete_cell - // We expect each canonical port in `comp_ports` to exactly match with a port in //`concrete_cell` based on well-formedness subtype checks. // `canon` is `ref_reg.in`, for example. @@ -237,12 +196,6 @@ impl CompileInvoke { continue; } - log::debug!( - "used ports: {}. new_sig_port is: {}", - used_ports.iter().join(", "), - new_sig_port.borrow().name - ); - // For example, if we have a reader component that only reads frmo a ref_reg, we will not have `ref_reg.in = ...`` in the invoke* group. if !to_assign.contains(&new_sig_port.borrow().name) { continue; @@ -406,24 +359,9 @@ impl Visitor for CompileInvoke { let invoke_group = builder.add_group("invoke"); //get iterator of comps of ref_cells used in the invoke - let invoked_comp: Option<&ir::Component> = comps.iter().find(|&c| { - log::debug!( - "invoke component: {}, c.name: {}", - s.comp.borrow().prototype.get_name().unwrap(), - comps.iter().map(|c| c.name).join(", ") - ); - s.comp.borrow().prototype.get_name().unwrap() == c.name - }); - - log::debug!( - "comps is: {}", - comps - .iter() - .map(|c| c.name) - .collect_vec() - .into_iter() - .join(", ") - ); + let invoked_comp: Option<&ir::Component> = comps + .iter() + .find(|&c| s.comp.borrow().prototype.get_name().unwrap() == c.name); // Assigns representing the ref cell connections invoke_group.borrow_mut().assignments.extend( @@ -461,20 +399,6 @@ impl Visitor for CompileInvoke { .assignments .extend(vec![go_assign, done_assign]); - log::debug!( - "invoke_group: `{}` has added assignments: {}", - invoke_group.borrow().name(), - invoke_group - .borrow() - .assignments - .iter() - .map(|a| format!( - "{} -> {}", - a.src.borrow().canonical(), - a.dst.borrow().canonical() - )) - .join(", ") - ); // Generate argument assignments let cell = &*s.comp.borrow(); let assigns = build_assignments( @@ -483,18 +407,6 @@ impl Visitor for CompileInvoke { &mut builder, cell, ); - log::debug!( - "assigns is: {}", - assigns - .clone() - .iter() - .map(|a| format!( - "{} -> {}", - a.src.borrow().canonical(), - a.dst.borrow().canonical() - )) - .join(", ") - ); invoke_group.borrow_mut().assignments.extend(assigns); // Add assignments from the attached combinational group if let Some(cgr) = &s.comb_group { @@ -535,14 +447,9 @@ impl Visitor for CompileInvoke { let invoke_group = builder.add_static_group("static_invoke", s.latency); //If the component is not a primitive, pass along the component to `ref_cells_to_ports`` - let invoked_comp: Option<&ir::Component> = comps.iter().find(|&c| { - log::debug!( - "invoke component: {}, c.name: {}", - s.comp.borrow().prototype.get_name().unwrap(), - c.name - ); - s.comp.borrow().prototype.get_name().unwrap() == c.name - }); + let invoked_comp: Option<&ir::Component> = comps + .iter() + .find(|&c| s.comp.borrow().prototype.get_name().unwrap() == c.name); invoke_group.borrow_mut().assignments.extend( self.ref_cells_to_ports_assignments( From b6aa6a68be1db03a2a9de04945d7167581ea2d44 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Mon, 22 Jul 2024 05:33:25 -0400 Subject: [PATCH 33/66] improve comments --- calyx-ir/src/structure.rs | 2 +- calyx-opt/src/passes/compile_invoke.rs | 24 ++++++++++++++---------- 2 files changed, 15 insertions(+), 11 deletions(-) diff --git a/calyx-ir/src/structure.rs b/calyx-ir/src/structure.rs index 8e320aaa68..cbf0d1d1b5 100644 --- a/calyx-ir/src/structure.rs +++ b/calyx-ir/src/structure.rs @@ -539,7 +539,7 @@ impl Assignment { self.guard.for_each(&mut |port| f(&port).map(Guard::port)) } - /// Reads through assignments unmutably + /// Iterate through all ports contained within the assignment. pub fn iter_ports(&self) -> impl Iterator> { self.guard .all_ports() diff --git a/calyx-opt/src/passes/compile_invoke.rs b/calyx-opt/src/passes/compile_invoke.rs index 42127846ae..54b9f6dff6 100644 --- a/calyx-opt/src/passes/compile_invoke.rs +++ b/calyx-opt/src/passes/compile_invoke.rs @@ -159,16 +159,8 @@ impl CompileInvoke { unreachable!("component `{}` invoked but not already visited by the pass", inv_comp_id) }; - //contains the newly added ports that result from ref cells removal/dump_ports - let new_comp_ports = comp_ports - .values() - .map(|p| p.borrow().name) - .collect::>(); - // tracks ports used in assigments of the invoked component let mut used_ports: HashSet = HashSet::new(); - // If `is_none()` then the invoked comp should be a primitive , and - // we assume that all ports are used if let Some(invoked_comp) = invoked_comp { invoked_comp.iter_assignments(|a| { for port in a.iter_ports() { @@ -180,10 +172,20 @@ impl CompileInvoke { used_ports.insert(port.borrow().name); } }); + // If the `invoked_comp` passed to the function is `None`, + // then the component being invoked is a primitive. } else { - used_ports.clone_from(&new_comp_ports); + unreachable!("Primitives should not have ref cells passed into them at invocation. However ref cells were found at the invocation of {}.", + inv_comp_id + ); } + //contains the newly added ports that result from ref cells removal/dump_ports + let new_comp_ports = comp_ports + .values() + .map(|p| p.borrow().name) + .collect::>(); + let to_assign: HashSet<&ir::Id> = new_comp_ports.intersection(&used_ports).collect(); @@ -196,7 +198,9 @@ impl CompileInvoke { continue; } - // For example, if we have a reader component that only reads frmo a ref_reg, we will not have `ref_reg.in = ...`` in the invoke* group. + // For example, if we have a reader component that only reads from a ref_reg, + // we will not have `ref_reg.in = ...` in the invoke* group because the + // reader component does not access `ref_reg.in`. if !to_assign.contains(&new_sig_port.borrow().name) { continue; } From 48e9e82a171934ac47e0ad58061a467e34d17383 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Mon, 22 Jul 2024 07:47:15 -0400 Subject: [PATCH 34/66] add nested while loops to subordinate controller Hopefully models daemons. --- yxi/axi-calyx/axi_controller_generator.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 39ac56cdeb..823445550f 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -513,8 +513,8 @@ def add_control_subordinate(prog, mems): with control_subordinate.group("check_ap_done") as check_ap_done: ap_done_or.left = xrt_control_reg.out - ap_done_or.right = ap_done_slice.out @ const(32, 0b10) - ap_done_or.right = ~ap_done_slice.out @ const(32, 0) + ap_done_or.right = this["ap_done_in"] @ const(32, 0b10) + ap_done_or.right = ~this["ap_done_in"] @ const(32, 0) xrt_control_reg.in_ = ap_done_or.out xrt_control_reg.write_en = 1 check_ap_done.done = xrt_control_reg.done @@ -538,7 +538,10 @@ def add_control_subordinate(prog, mems): n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) control_subordinate.control += [ init_control_regs, - while_with(n_ap_done, [par(write_controller_invoke, read_controller_invoke), check_ap_done]), + while_with(n_ap_done, [par( + while_with(n_ap_done, write_controller_invoke), + while_with(n_ap_done, read_controller_invoke), + ), check_ap_done]), ] From 69acafc7775f8e9aaadff118f31395c5320e9651 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 24 Jul 2024 06:02:24 -0400 Subject: [PATCH 35/66] Fix memory mapping addresses in axi_test Also change how ap_done is handled in controller. It short circuits off of the ap_done input instead of the control register output --- yxi/axi-calyx/axi_controller_generator.py | 30 ++++++++++++++--------- yxi/axi-calyx/cocotb/axi_test.py | 13 ++++++---- yxi/axi-calyx/dynamic_axi_generator.py | 20 +++++++++++---- 3 files changed, 41 insertions(+), 22 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 823445550f..054dc04557 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -1,4 +1,4 @@ -from calyx.builder import Builder, add_comp_ports, invoke, const, par, while_with, if_ +from calyx.builder import Builder, add_comp_ports, invoke, const, par, while_ from typing import Literal from math import log2 import json @@ -289,7 +289,7 @@ def add_write_controller(prog, mems): ("AWREADY", 1), ("WREADY", 1), ("BVALID", 1), - ("BRRESP", 2), + ("BRESP", 2), ] add_comp_ports(write_controller, write_controller_inputs, write_controller_outputs) @@ -334,7 +334,7 @@ def invoke_write_channel(reg): b_channel, in_BREADY=write_controller.this()["BREADY"], out_BVALID=write_controller.this()["BVALID"], - out_BRESP=write_controller.this()["BRRESP"], + out_BRESP=write_controller.this()["BRESP"], ), ] @@ -456,6 +456,11 @@ def add_control_subordinate(prog, mems): f"s_control_write_controller", prog.get_component("s_control_write_controller") ) + n_ap_done = control_subordinate.not_(1, "n_ap_done") + # Ideally this would be a comb group for analysis purposes, but this leadds to nested + # comb group activation, so this is continuous instead + # n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) + # Wires xrt_control_reg = control_subordinate.get_cell("control") @@ -491,7 +496,7 @@ def add_control_subordinate(prog, mems): this["AWREADY"] = write_controller["AWREADY"] this["WREADY"] = write_controller["WREADY"] this["BVALID"] = write_controller["BVALID"] - this["BRESP"] = write_controller["BRRESP"] + this["BRESP"] = write_controller["BRESP"] this["ARREADY"] = read_controller["ARREADY"] this["RDATA"] = read_controller["RDATA"] this["RRESP"] = read_controller["RRESP"] @@ -502,7 +507,7 @@ def add_control_subordinate(prog, mems): # XRT Wiring stuff ap_start_slice.in_ = xrt_control_reg.out ap_done_slice.in_ = xrt_control_reg.out - control_subordinate.this() + n_ap_done.in_ = this["ap_done_in"] with control_subordinate.group("init_control_regs") as init_control_regs: for reg in control_regs: @@ -511,13 +516,14 @@ def add_control_subordinate(prog, mems): init_control_regs.done = xrt_control_reg.done - with control_subordinate.group("check_ap_done") as check_ap_done: + # Writes to the control register if the input signal ap_done is high + with control_subordinate.group("write_ap_done") as write_ap_done: ap_done_or.left = xrt_control_reg.out ap_done_or.right = this["ap_done_in"] @ const(32, 0b10) ap_done_or.right = ~this["ap_done_in"] @ const(32, 0) xrt_control_reg.in_ = ap_done_or.out xrt_control_reg.write_en = 1 - check_ap_done.done = xrt_control_reg.done + write_ap_done.done = xrt_control_reg.done #Pass in the concrete cells as into our invokes sub_controller_kwargs = {} @@ -535,13 +541,13 @@ def add_control_subordinate(prog, mems): ) - n_ap_done = control_subordinate.not_use(ap_done_slice.out, "n_ap_done",width=1) control_subordinate.control += [ init_control_regs, - while_with(n_ap_done, [par( - while_with(n_ap_done, write_controller_invoke), - while_with(n_ap_done, read_controller_invoke), - ), check_ap_done]), + par( + while_(n_ap_done.out, write_controller_invoke), + while_(n_ap_done.out, read_controller_invoke), + ), + write_ap_done ] diff --git a/yxi/axi-calyx/cocotb/axi_test.py b/yxi/axi-calyx/cocotb/axi_test.py index 63a2e5616c..ec83c18db0 100644 --- a/yxi/axi-calyx/cocotb/axi_test.py +++ b/yxi/axi-calyx/cocotb/axi_test.py @@ -89,12 +89,15 @@ async def run_kernel_test(toplevel, data_path: str): # Finish when ap_done is high or 100 us of simulation have passed. timeout = 5000 - #Assert ap_start by writing 1 to 0x0000 - await tb.control_manager.write(0x0000, encode([0],1)) #Base addresses for memories - await tb.control_manager.write(0x0018, encode([0],8)) - await tb.control_manager.write(0x0020, encode([0],8)) - await tb.control_manager.write(0x0028, encode([0],8)) + await tb.control_manager.write(0x0010, encode([0x0],4)) + await tb.control_manager.write(0x0014, encode([0x0],4)) + await tb.control_manager.write(0x0018, encode([0x0],4)) + await tb.control_manager.write(0x001C, encode([0x0],4)) + await tb.control_manager.write(0x0020, encode([0x0],4)) + await tb.control_manager.write(0x0024, encode([0x0],4)) + #Assert ap_start by writing 1 to 0x0000 + await tb.control_manager.write(0x0000, encode([0x1],1)) await with_timeout(RisingEdge(toplevel.done), timeout, "us") diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index 8be4f8513a..b25e7b7142 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -12,6 +12,9 @@ import json import sys + +GENERATE_FOR_XILINX = True + # In general, ports to the wrapper are uppercase, internal registers are lower case. # Since yxi is still young, keys and formatting change often. @@ -668,9 +671,14 @@ def add_wrapper_comp(prog, mems): add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) - control_subordinate = wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) - ap_start_block_reg = wrapper_comp.reg(1, f"ap_start_block_reg") - ap_done_reg = wrapper_comp.reg(1, f"ap_done_reg") + if GENERATE_FOR_XILINX: + control_subordinate = wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) + ap_start_block_reg = wrapper_comp.reg(1, f"ap_start_block_reg") + ap_done_reg = wrapper_comp.reg(1, f"ap_done_reg") + + with wrapper_comp.continuous: + control_subordinate.ap_done_in = ap_done_reg.out + #NOTE: This breaks encapsulation of modules a bit, # but allows us to block on ap_start in the control block without @@ -684,7 +692,6 @@ def add_wrapper_comp(prog, mems): block_ap_start.done = ap_start_block_reg.done with wrapper_comp.group(f"assert_ap_done") as assert_ap_done: - control_subordinate.ap_done_in = ap_done_reg.out ap_done_reg.in_ = 1 ap_done_reg.write_en = 1 assert_ap_done.done = ap_done_reg.done @@ -781,7 +788,10 @@ def add_wrapper_comp(prog, mems): wrapper_comp.this()[f"{mem_name}_WLAST"] = axi_mem.WLAST wrapper_comp.this()[f"{mem_name}_WDATA"] = axi_mem.WDATA wrapper_comp.this()[f"{mem_name}_BREADY"] = axi_mem.BREADY - + + if GENERATE_FOR_XILINX: + axi_mem["base_address"] = control_subordinate[f"{mem_name}_base_addr"] + # Creates ` = internal_mem_` as refs in invocation of `main_compute` From f07321ae74befaadccb0178737b5615bd6c25608 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 24 Jul 2024 06:46:36 -0400 Subject: [PATCH 36/66] thread through ap_done for early termination of all groups in the controller subordinate --- yxi/axi-calyx/axi_controller_generator.py | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/yxi/axi-calyx/axi_controller_generator.py b/yxi/axi-calyx/axi_controller_generator.py index 054dc04557..04a06114a9 100644 --- a/yxi/axi-calyx/axi_controller_generator.py +++ b/yxi/axi-calyx/axi_controller_generator.py @@ -41,6 +41,7 @@ def create_axi_lite_channel_ports(prog, prefix: Literal["AW", "AR", "W", "B", "R s_to_m_channel = prog.component(f"s_{lc_x}_channel") channel_inputs = [ ("ARESETn", 1), + ("ap_done", 1) ] channel_outputs = [] @@ -105,7 +106,7 @@ def _add_s_to_m_address_channel(prog, prefix: Literal["AW", "AR"]): x_addr.write_en = (x_ready.out & xVALID) @ 1 x_addr.write_en = ~(x_ready.out & xVALID) @ 0 - block_transfer.done = x_addr.done + block_transfer.done = (x_addr.done | s_to_m_address_channel.this()["ap_done"]) @ 1 s_to_m_address_channel.control += [invoke(x_ready, in_in=0),block_transfer] @@ -139,7 +140,7 @@ def add_read_channel(prog): read_channel.this()["RRESP"] = 0b00 # TODO: Make sure this works? This is changed from the manager controllers which uses a "bt_reg" (block_transfer) - service_read_request.done = r_handshake_occurred.out + service_read_request.done = (r_handshake_occurred.out | read_channel.this()["ap_done"]) @ 1 read_channel.control += [ invoke(r_handshake_occurred, in_in=0), @@ -169,7 +170,7 @@ def add_write_channel(prog): wdata.write_en = (wready.out & wVALID) @ 1 wdata.write_en = ~(wready.out & wVALID) @ 0 - service_write_request.done = wdata.done + service_write_request.done = (wdata.done | write_channel.this()["ap_done"]) @ 1 write_channel.control += [invoke(wready, in_in=0), service_write_request] @@ -197,7 +198,7 @@ def add_bresp_channel(prog): b_handshake_occurred.in_ = (bvalid.out & BREADY) @ 1 b_handshake_occurred.in_ = ~(bvalid.out & BREADY) @ 0 b_handshake_occurred.write_en = 1 - block_transfer.done = b_handshake_occurred.out + block_transfer.done = (b_handshake_occurred.out | bresp_channel.this()["ap_done"]) @ 1 bresp_channel.control += [invoke(b_handshake_occurred, in_in=0), block_transfer] @@ -245,6 +246,7 @@ def invoke_read_channel(reg): ref_rdata=reg, in_ARESETn=read_controller.this()["ARESETn"], in_RREADY=read_controller.this()["RREADY"], + in_ap_done = read_controller.this()["ap_done"], out_RVALID=read_controller.this()["RVALID"], out_RRESP=read_controller.this()["RRESP"], out_RDATA=read_controller.this()["RDATA"], @@ -261,6 +263,7 @@ def invoke_read_channel(reg): in_ARESETn=read_controller.this()["ARESETn"], in_ARVALID=read_controller.this()["ARVALID"], in_ARADDR=read_controller.this()["ARADDR"], + in_ap_done=read_controller.this()["ap_done"], in_ARPROT=read_controller.this()["ARPROT"], out_ARREADY=read_controller.this()["ARREADY"], ), @@ -283,6 +286,7 @@ def add_write_controller(prog, mems): ("WDATA", 32), ("WSTRB", 4), ("BREADY", 1), + ("ap_done", 1) # Passed in to allow short circuiting of component completion ] write_controller_outputs = [ @@ -314,6 +318,7 @@ def invoke_write_channel(reg): in_WVALID=write_controller.this()["WVALID"], in_WDATA=write_controller.this()["WDATA"], in_WSTRB=write_controller.this()["WSTRB"], + in_ap_done=write_controller.this()["ap_done"], out_WREADY=write_controller.this()["WREADY"], ) @@ -327,12 +332,14 @@ def invoke_write_channel(reg): in_AWVALID=write_controller.this()["AWVALID"], in_AWADDR=write_controller.this()["AWADDR"], in_AWPROT=write_controller.this()["AWPROT"], + in_ap_done=write_controller.this()["ap_done"], out_AWREADY=write_controller.this()["AWREADY"], ), addr_case, invoke( b_channel, in_BREADY=write_controller.this()["BREADY"], + in_ap_done=write_controller.this()["ap_done"], out_BVALID=write_controller.this()["BVALID"], out_BRESP=write_controller.this()["BRESP"], ), @@ -486,11 +493,13 @@ def add_control_subordinate(prog, mems): write_controller["WDATA"] = this["WDATA"] write_controller["WSTRB"] = this["WSTRB"] write_controller["BREADY"] = this["BREADY"] + write_controller["ap_done"] = this["ap_done_in"] read_controller["ARESETn"] = this["ARESETn"] read_controller["ARVALID"] = this["ARVALID"] read_controller["ARADDR"] = this["ARADDR"] read_controller["ARPROT"] = const(3, 0b110) #Tie to priveleged, nonsecure, data access request. + read_controller["ap_done"] = this["ap_done_in"] # Outputs this["AWREADY"] = write_controller["AWREADY"] @@ -514,7 +523,7 @@ def add_control_subordinate(prog, mems): reg.in_ = 0 reg.write_en = 1 - init_control_regs.done = xrt_control_reg.done + init_control_regs.done = (xrt_control_reg.done | this["ap_done_in"]) @ 1 # Writes to the control register if the input signal ap_done is high with control_subordinate.group("write_ap_done") as write_ap_done: From ea6ecd8a65abac1111a804c843dd86706888d6f0 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 06:38:56 -0400 Subject: [PATCH 37/66] rename axi_generator to use underscore --- yxi/axi-calyx/{axi-generator.py => axi_generator.py} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename yxi/axi-calyx/{axi-generator.py => axi_generator.py} (100%) diff --git a/yxi/axi-calyx/axi-generator.py b/yxi/axi-calyx/axi_generator.py similarity index 100% rename from yxi/axi-calyx/axi-generator.py rename to yxi/axi-calyx/axi_generator.py From 867ba7f72d89bb3b335fce3cce447980057f4cf8 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 06:39:33 -0400 Subject: [PATCH 38/66] dynamic axi-generator typo --- yxi/axi-calyx/dynamic-axi-generator.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/yxi/axi-calyx/dynamic-axi-generator.py b/yxi/axi-calyx/dynamic-axi-generator.py index 05816da70e..bc7b7c37b0 100644 --- a/yxi/axi-calyx/dynamic-axi-generator.py +++ b/yxi/axi-calyx/dynamic-axi-generator.py @@ -746,7 +746,7 @@ def clog2_or_1(x): def build(): prog = Builder() - check_mems_welformed(mems) + check_mems_wellformed(mems) for mem in mems: add_arread_channel(prog, mem) add_awwrite_channel(prog, mem) @@ -761,7 +761,7 @@ def build(): return prog.program -def check_mems_welformed(mems): +def check_mems_wellformed(mems): """Checks if memories from yxi are well formed. Returns true if they are, false otherwise.""" for mem in mems: assert ( From e189e23c883bce7dffe548c0febd0ee42dc1cd8e Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 06:39:54 -0400 Subject: [PATCH 39/66] add an xml_generator from a `.yxi` file --- yxi/xml/xml_generator.py | 107 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 yxi/xml/xml_generator.py diff --git a/yxi/xml/xml_generator.py b/yxi/xml/xml_generator.py new file mode 100644 index 0000000000..541ea302cf --- /dev/null +++ b/yxi/xml/xml_generator.py @@ -0,0 +1,107 @@ +import sys +import json +from xml.etree.ElementTree import Element, SubElement, tostring +from xml.dom import minidom +from math import log2 + +size_key = "total_size" +width_key = "data_width" + +def gen_xml(yxi): + mems = yxi["memories"] + check_mems_wellformed(mems) + + root = Element("root", {"versionMajor": "1", "versionMinor": "6"}) + kernel = SubElement(root, "kernel", { + "name" : yxi["toplevel"], + "language": "ip_c", + # TODO: Make sure this matches component.xml, Namely the `Toplevel` part. + # See https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/RTL-Kernel-XML-File + "vlnv": "capra.cs.cornell.edu:kernel:Toplevel:1.0", + "attributes": "", + "preferredWorkGroupSizeMultiple" : "0", + "workGroupSize" : "1", + "hwControlProtocol": "ap_ctrl_hs" + }) + + # Construct ports + ports = SubElement(kernel, "ports") + # The subordinates XRT - AXI controller is added outside of the programs memory interface. + SubElement(ports, "port", { + "name": "S_AXI_CONTROL", + "mode": "slave", + "range": "0x1000", # XXX: Why is this 0x1000? Taken from the Xilinx examples Maybe could be dynamically calculated? + "dataWidth" : "32", + "portType" : "addressable", + "base" : "0x0" + }) + + for mem in mems: + SubElement(ports, "port", { + "name": f"m_axi_{mem['name']}", + "mode": "master", + #NOTE(nathaniel): In the Xilinx examples range is usually 0xFFFFFF... but this should be fine for us? + "range": f"{hex(size_in_bytes(mem))}", + "dataWidth": f"{mem[width_key]}", + "portType": "addressable", + "base": "0x0" + }) + + # Construct Args + args = SubElement(kernel, "args") + # XRT spec starts args addresses at 0x10 + args_addr = 0x10 + for i, mem in enumerate(mems): + SubElement(args, "arg", { + "name": f"{mem['name']}", + "addressQualifier": "1", # 1 denotes the arguments as a global memory, + "id" : f"{i}", + "port" : f"m_axi_{mem['name']}", + "size" : f"0x8", # XRT expects AXI manager interfaces that are 64 bits wide + "offset" : f"{hex(args_addr + (i * 8))}", + "type" : "int*", # TODO: Old xml generator defaults to `int*`, I imagine in practice we want to get this from our .dat + "hostOffset" : "0x0", + "hostSize" : "0x8", # Seems to be the same as `size`, unclear how they differ + }) + + + + + return root + +def size_in_bytes(mem): + return mem[size_key] * mem[width_key] // 8 + +#TODO: Import from axi_generator instead of copy pasting here +def check_mems_wellformed(mems): + """Checks if memories from yxi are well formed. Returns true if they are, false otherwise.""" + for mem in mems: + assert ( + mem[width_key] % 8 == 0 + ), "Width must be a multiple of 8 to alow byte addressing to host" + assert log2( + mem[width_key] + ).is_integer(), "Width must be a power of 2 to be correctly described by xSIZE" + assert mem[size_key] > 0, "Memory size must be greater than 0" + +def prettify(elem): + """Return a pretty-printed XML string for the Element. + """ + rough_string = tostring(elem, 'utf-8') + reparsed = minidom.parseString(rough_string) + return reparsed.toprettyxml(indent=" ") + + +if __name__ == "__main__": + yxi_filename = "input.yxi" + if len(sys.argv) != 2: + raise Exception("The `kernel.xml` generator takes 1 `.yxi` file name as an argument.") + + yxi_filename = sys.argv[1] + if not yxi_filename.endswith(".yxi"): + raise Exception("The `kernel.xml` generator requires an `.yxi` file as input.") + + with open(yxi_filename, "r", encoding="utf-8") as f: + yxi = json.load(f) + xml = gen_xml(yxi) + print(tostring(xml, xml_declaration=True, encoding="unicode")) \ No newline at end of file From 921b2ebcb4d3e526c5509bc6f44bb0ae73ea5aec Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 06:47:01 -0400 Subject: [PATCH 40/66] add link to spec --- yxi/xml/xml_generator.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/yxi/xml/xml_generator.py b/yxi/xml/xml_generator.py index 541ea302cf..83d4eead9a 100644 --- a/yxi/xml/xml_generator.py +++ b/yxi/xml/xml_generator.py @@ -4,6 +4,12 @@ from xml.dom import minidom from math import log2 +""" +This file takes in a `.yxi` description and outputs a xml suitable for a `kernel.xml` file +can be used to package an xclbin for the Xilinx XRT runtime. +See https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/RTL-Kernel-XML-File +for the spec this is based on. +""" size_key = "total_size" width_key = "data_width" From f2ae5e1a55bd7ba213c6bf507c7cc4c4ab2fecae Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 08:34:47 -0400 Subject: [PATCH 41/66] revert name change axi_generator --- yxi/axi-calyx/{axi_generator.py => axi-generator.py} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename yxi/axi-calyx/{axi_generator.py => axi-generator.py} (100%) diff --git a/yxi/axi-calyx/axi_generator.py b/yxi/axi-calyx/axi-generator.py similarity index 100% rename from yxi/axi-calyx/axi_generator.py rename to yxi/axi-calyx/axi-generator.py From 5e4a469c7c00c5f2e6c70b27a87432705f511d0f Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Sat, 27 Jul 2024 08:53:02 -0400 Subject: [PATCH 42/66] runt tests for new xml generator --- runt.toml | 8 +++++ yxi/tests/axi/xml/dyn-vec-add.expect | 2 ++ yxi/tests/axi/xml/dyn-vec-add.yxi | 44 ++++++++++++++++++++++++++++ yxi/tests/axi/xml/seq-vec-add.expect | 2 ++ yxi/tests/axi/xml/seq-vec-add.yxi | 44 ++++++++++++++++++++++++++++ 5 files changed, 100 insertions(+) create mode 100644 yxi/tests/axi/xml/dyn-vec-add.expect create mode 100644 yxi/tests/axi/xml/dyn-vec-add.yxi create mode 100644 yxi/tests/axi/xml/seq-vec-add.expect create mode 100644 yxi/tests/axi/xml/seq-vec-add.yxi diff --git a/runt.toml b/runt.toml index 61e3cb1906..ef7e24bdb9 100644 --- a/runt.toml +++ b/runt.toml @@ -635,6 +635,14 @@ cmd = """ target/debug/calyx {} -b xilinx-xml """ +[[tests]] +name = "kernel.xml generation from yxi" +paths = ["yxi/tests/axi/xml/*.yxi"] +cmd = """ +python3 yxi/xml/xml_generator.py {} +""" + + [[tests]] name = "Cocotb correctness tests" paths = [ diff --git a/yxi/tests/axi/xml/dyn-vec-add.expect b/yxi/tests/axi/xml/dyn-vec-add.expect new file mode 100644 index 0000000000..2d2cda3482 --- /dev/null +++ b/yxi/tests/axi/xml/dyn-vec-add.expect @@ -0,0 +1,2 @@ + + diff --git a/yxi/tests/axi/xml/dyn-vec-add.yxi b/yxi/tests/axi/xml/dyn-vec-add.yxi new file mode 100644 index 0000000000..fbcbd9b251 --- /dev/null +++ b/yxi/tests/axi/xml/dyn-vec-add.yxi @@ -0,0 +1,44 @@ +{ + "toplevel": "main", + "memories": [ + { + "name": "A0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + }, + { + "name": "B0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + }, + { + "name": "Sum0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + } + ] +} \ No newline at end of file diff --git a/yxi/tests/axi/xml/seq-vec-add.expect b/yxi/tests/axi/xml/seq-vec-add.expect new file mode 100644 index 0000000000..2d2cda3482 --- /dev/null +++ b/yxi/tests/axi/xml/seq-vec-add.expect @@ -0,0 +1,2 @@ + + diff --git a/yxi/tests/axi/xml/seq-vec-add.yxi b/yxi/tests/axi/xml/seq-vec-add.yxi new file mode 100644 index 0000000000..77c200e496 --- /dev/null +++ b/yxi/tests/axi/xml/seq-vec-add.yxi @@ -0,0 +1,44 @@ +{ + "toplevel": "main", + "memories": [ + { + "name": "A0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + }, + { + "name": "B0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + }, + { + "name": "Sum0", + "memory_type": "Dynamic", + "data_width": 32, + "dimensions": 1, + "dimension_sizes": [ + 8 + ], + "total_size": 8, + "idx_sizes": [ + 3 + ] + } + ] +} From d5996949044c5a779b5a31b869fe28dd0cd71662 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 31 Jul 2024 10:34:47 -0400 Subject: [PATCH 43/66] change gen_xo (in fud2 dir) toplevel from 'Toplevel' to 'wrapper' --- fud2/rsrc/gen_xo.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fud2/rsrc/gen_xo.tcl b/fud2/rsrc/gen_xo.tcl index dbe328b6d8..7d3585cfdd 100644 --- a/fud2/rsrc/gen_xo.tcl +++ b/fud2/rsrc/gen_xo.tcl @@ -43,4 +43,4 @@ ipx::save_core [ipx::current_core] close_project -delete # Package the project as an .xo file. -package_xo -xo_path ${xoname} -kernel_name Toplevel -ip_directory ${path_to_packaged} -kernel_xml ./kernel.xml +package_xo -xo_path ${xoname} -kernel_name wrapper -ip_directory ${path_to_packaged} -kernel_xml ./kernel.xml From 9217873313e023fa60c3224ca321f11f3b63d28d Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 31 Jul 2024 10:35:19 -0400 Subject: [PATCH 44/66] simplify axi fud2 invocation --- fud2/scripts/axi.rhai | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index 9505c9ffc6..53f553f851 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -37,7 +37,7 @@ fn wrapper_setup(e) { e.rule( "remove-imports", - "sed '1,/component main/{/component main/!d; }' $in > $out", + "sed '/^import/d' $in > $out", ); } @@ -57,15 +57,11 @@ fn axi_wrapped_op(e, input, output) { e.build_cmd([tmp_yxi], "yxi", [input], []); - let refified_calyx = replace_ext(`refified_${file_name}`, "futil"); - e.build_cmd([refified_calyx], "calyx-pass", [input], []); - e.arg("pass", "external-to-ref"); - let axi_wrapper = "axi_wrapper.futil"; e.build_cmd([axi_wrapper], "gen-axi", [tmp_yxi], []); - let no_imports_calyx = `no_imports_${refified_calyx}`; - e.build_cmd([no_imports_calyx], "remove-imports", [refified_calyx], []); + let no_imports_calyx = `no_imports_${input}`; + e.build_cmd([no_imports_calyx], "remove-imports", [input], []); e.build_cmd([output], "combine", [axi_wrapper, no_imports_calyx], []); } From a2dd6be8fe90040acf481ad22faefd2966144e14 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 31 Jul 2024 10:35:41 -0400 Subject: [PATCH 45/66] formatting in fud2/lib.rs --- fud2/src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs index dcef0adf96..502178e802 100644 --- a/fud2/src/lib.rs +++ b/fud2/src/lib.rs @@ -846,7 +846,7 @@ pub fn build_driver(bld: &mut DriverBuilder) { r#"sed '/\/\/ COMPONENT END: wrapper/c\`ifdef COCOTB_SIM\n initial begin\n \$$dumpfile ("$fst_file_name");\n \$$dumpvars (0, wrapper);\n #1;\n end\n`endif\n\/\/ COMPONENT END: wrapper' $in > $out"#)?; } -e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; + e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; e.rule("make-cocotb", "make DATA_PATH=$sim_data VERILOG_SOURCE=$in COCOTB_LOG_LEVEL=CRITICAL $cocotb-args > $out")?; // This cleans up the extra `make` and `FST warning` cruft, leaving what is in between `{` and `}.` From b4c738e65ba0d966d8e00eda93ebe8620e93dbed Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Wed, 31 Jul 2024 20:03:24 -0400 Subject: [PATCH 46/66] WIP to allow creation of .xo from calyx file using new calyx-axi-wrapper --- fud2/scripts/axi.rhai | 4 +-- fud2/scripts/xilinx.rhai | 70 +++++++++++++++++++++++++++++----------- 2 files changed, 54 insertions(+), 20 deletions(-) diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index 53f553f851..484ab6d488 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -1,7 +1,7 @@ import "calyx" as c; export const yxi = state("yxi", ["yxi"]); - +export let yxi_setup = yxi_setup; fn yxi_setup(e) { e.config_var_or("yxi", "yxi", "$calyx-base/target/debug/yxi"); e.rule("yxi", "$yxi -l $calyx-base $in > $out"); @@ -17,6 +17,7 @@ op( }, ); +export let wrapper_setup = wrapper_setup; fn wrapper_setup(e) { // Define a `gen-axi` rule that invokes our Python code generator program. // For now point to standalone axi-generator.py. Can maybe turn this into a rsrc file? @@ -50,7 +51,6 @@ fn replace_ext(path, new_ext) { return `${path}.${new_ext}`; } } - fn axi_wrapped_op(e, input, output) { let file_name = input.split("/")[-1]; let tmp_yxi = replace_ext(file_name, "yxi"); diff --git a/fud2/scripts/xilinx.rhai b/fud2/scripts/xilinx.rhai index 6d625fb2f8..29f09056c5 100644 --- a/fud2/scripts/xilinx.rhai +++ b/fud2/scripts/xilinx.rhai @@ -1,4 +1,5 @@ import "calyx" as c; +import "axi" as axi; import "rtl_sim" as sim; import "testbench" as tb; @@ -28,24 +29,25 @@ fn xilinx_setup(e) { "$vitis-dir/bin/v++ -g -t $xilinx-mode --platform $platform --save-temps --profile.data all:all:all --profile.exec all:all:all -lo $out $in" ); e.arg("pool", "console"); + + // Generate a kernel.xml from a yxi file. + e.rule("gen-kernel-xml", "$python $calyx-base/yxi/xml/xml_generator.py $in > $out"); }; -op( - "xo", - [c::calyx_setup, xilinx_setup], - c::calyx_state, - xo, - |e, input, output| { - // Emit the Verilog itself in "synthesis mode." - e.build_cmd(["main.sv"], "calyx", [input], []); - e.arg("backend", "verilog"); - e.arg("args", "--synthesis -p external"); +fn calyx_to_xo_op(e, input, output) { + let calyx_axi_wrapper = + e.config_constrained_or("calyx-axi-wrapper", ["true", "false"], "false"); + if calyx_axi_wrapper == "true"{ + let file_name = input.split("/")[-1]; + let yxi_file = replace_ext(file_name, "yxi"); + // import "axi" as axi; // Why is this needed again to avoid a "module not found error"? + axi::axi_wrapped_op(e, input, "axi_wrapped.futil"); - // Extra ingredients for the `.xo` package. - e.build_cmd(["toplevel.v"], "calyx", [input], []); - e.arg("backend", "xilinx"); - e.build_cmd(["kernel.xml"], "calyx", [input], []); - e.arg("backend", "xilinx-xml"); + e.build_cmd(["kernel.xml"], "gen-kernel-xml", [yxi_file], []); + + e.build_cmd(["axi_wrapped.v"], "calyx", ["axi_wrapped.futil"], []); + e.arg("backend", "verilog"); + e.arg("args", "--disable-verify"); // Package the `.xo`. e.build_cmd( @@ -53,14 +55,46 @@ op( "gen-xo", [], [ - "main.sv", - "toplevel.v", + "axi_wrapped.v", "kernel.xml", "gen_xo.tcl", "get-ports.py", ], ); - }, + } else { // Uses the old calyx backends + // Emit the Verilog itself in "synthesis mode." + e.build_cmd(["main.sv"], "calyx", [input], []); + e.arg("backend", "verilog"); + e.arg("args", "--synthesis -p external"); + + // Extra ingredients for the `.xo` package. + e.build_cmd(["toplevel.v"], "calyx", [input], []); + e.arg("backend", "xilinx"); + e.build_cmd(["kernel.xml"], "calyx", [input], []); + e.arg("backend", "xilinx-xml"); + + // Package the `.xo`. + e.build_cmd( + [output], + "gen-xo", + [], + [ + "main.sv", + "toplevel.v", + "kernel.xml", + "gen_xo.tcl", + "get-ports.py", + ], + ); + } +} + +op( + "xo", + [c::calyx_setup, xilinx_setup, axi::yxi_setup, axi::wrapper_setup], + c::calyx_state, + xo, + calyx_to_xo_op ); op("xclbin", [xilinx_setup], xo, xclbin, |e, input, output| { From b9a2a50fe5a4a0b25af7f38dad8101e2db334952 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 09:06:17 -0400 Subject: [PATCH 47/66] wip get verilog to xo fud2 invocation working. TODO: Figure out why glob does not find any .v files --- fud2/scripts/axi.rhai | 2 +- fud2/scripts/xilinx.rhai | 100 +++++++++++++++++++++------------------ 2 files changed, 55 insertions(+), 47 deletions(-) diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index 484ab6d488..2ea91de80c 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -24,7 +24,7 @@ fn wrapper_setup(e) { let dynamic = e.config_constrained_or("dynamic", ["true", "false"], "false"); let generator_path = if dynamic == "true" { - "$calyx-base/yxi/axi-calyx/dynamic-axi-generator.py" + "$calyx-base/yxi/axi-calyx/dynamic_axi_generator.py" } else { "$calyx-base/yxi/axi-calyx/axi-generator.py" }; diff --git a/fud2/scripts/xilinx.rhai b/fud2/scripts/xilinx.rhai index 29f09056c5..457e4fd321 100644 --- a/fud2/scripts/xilinx.rhai +++ b/fud2/scripts/xilinx.rhai @@ -1,4 +1,4 @@ -import "calyx" as c; +// import "calyx" as c; import "axi" as axi; import "rtl_sim" as sim; import "testbench" as tb; @@ -6,6 +6,9 @@ import "testbench" as tb; let xo = state("xo", ["xo"]); let xclbin = state("xclbin", ["xclbin"]); +fn default_xml_generator() { + "$calyx-base/yxi/xml/xml_generator.py"; +} fn xilinx_setup(e) { // Locations for Vivado and Vitis installations. e.config_var("vivado-dir", "xilinx.vivado"); @@ -31,23 +34,26 @@ fn xilinx_setup(e) { e.arg("pool", "console"); // Generate a kernel.xml from a yxi file. - e.rule("gen-kernel-xml", "$python $calyx-base/yxi/xml/xml_generator.py $in > $out"); + e.config_var_or("xml-generator", "xml.generator", default_xml_generator()); + e.rule("gen-kernel-xml", "$python $xml-generator $in > $out"); }; -fn calyx_to_xo_op(e, input, output) { - let calyx_axi_wrapper = - e.config_constrained_or("calyx-axi-wrapper", ["true", "false"], "false"); - if calyx_axi_wrapper == "true"{ - let file_name = input.split("/")[-1]; - let yxi_file = replace_ext(file_name, "yxi"); - // import "axi" as axi; // Why is this needed again to avoid a "module not found error"? - axi::axi_wrapped_op(e, input, "axi_wrapped.futil"); - - e.build_cmd(["kernel.xml"], "gen-kernel-xml", [yxi_file], []); - - e.build_cmd(["axi_wrapped.v"], "calyx", ["axi_wrapped.futil"], []); +op( + "xo", + [axi::c::calyx_setup, xilinx_setup], + axi::c::calyx_state, + xo, + |e, input, output| { + // Emit the Verilog itself in "synthesis mode." + e.build_cmd(["main.sv"], "calyx", [input], []); e.arg("backend", "verilog"); - e.arg("args", "--disable-verify"); + e.arg("args", "--synthesis -p external"); + + // Extra ingredients for the `.xo` package. + e.build_cmd(["toplevel.v"], "calyx", [input], []); + e.arg("backend", "xilinx"); + e.build_cmd(["kernel.xml"], "calyx", [input], []); + e.arg("backend", "xilinx-xml"); // Package the `.xo`. e.build_cmd( @@ -55,46 +61,48 @@ fn calyx_to_xo_op(e, input, output) { "gen-xo", [], [ - "axi_wrapped.v", + "main.sv", + "toplevel.v", "kernel.xml", "gen_xo.tcl", "get-ports.py", ], ); - } else { // Uses the old calyx backends - // Emit the Verilog itself in "synthesis mode." - e.build_cmd(["main.sv"], "calyx", [input], []); - e.arg("backend", "verilog"); - e.arg("args", "--synthesis -p external"); - - // Extra ingredients for the `.xo` package. - e.build_cmd(["toplevel.v"], "calyx", [input], []); - e.arg("backend", "xilinx"); - e.build_cmd(["kernel.xml"], "calyx", [input], []); - e.arg("backend", "xilinx-xml"); - - // Package the `.xo`. - e.build_cmd( - [output], - "gen-xo", - [], - [ - "main.sv", - "toplevel.v", - "kernel.xml", - "gen_xo.tcl", - "get-ports.py", - ], - ); } -} +); +// Assumes that verilog was generated with the `--synthesis` flag. +// `-p external` can also be used, but is not necesary for designs using `ref` memories. op( - "xo", - [c::calyx_setup, xilinx_setup, axi::yxi_setup, axi::wrapper_setup], - c::calyx_state, + "verilog-to-xo", + [axi::c::calyx_setup, xilinx_setup], + axi::c::verilog_state, xo, - calyx_to_xo_op + |e, input, output | { + let yxi_file = e.config_val("yxi.file"); + let yxi_path = e.external_path(yxi_file); + + e.build_cmd( + ["kernel.xml"], + "gen-kernel-xml", + [yxi_path], + ["$xml-generator"], + ); + + + e.build_cmd( + [output], + "gen-xo", + [], + [ + input, + yxi_path, + "gen_xo.tcl", + "get-ports.py", + "kernel.xml", + ], + ); + } ); op("xclbin", [xilinx_setup], xo, xclbin, |e, input, output| { From 9dcbc14c93a80f3921b6226436b9331792f38fb4 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 11:50:06 -0400 Subject: [PATCH 48/66] get vitis invocation to start correctly --- fud2/scripts/calyx.rhai | 1 + fud2/scripts/cocotb-axi.rhai | 5 ++--- fud2/scripts/xilinx.rhai | 13 +++++++++++-- 3 files changed, 14 insertions(+), 5 deletions(-) diff --git a/fud2/scripts/calyx.rhai b/fud2/scripts/calyx.rhai index 83162e51cf..71549f6b50 100644 --- a/fud2/scripts/calyx.rhai +++ b/fud2/scripts/calyx.rhai @@ -15,6 +15,7 @@ fn calyx_setup(e) { "calyx-with-flags", "$calyx-exe -l $calyx-base $flags $args $in > $out", ); + e.rule("copy", "cp $in $out"); } op( diff --git a/fud2/scripts/cocotb-axi.rhai b/fud2/scripts/cocotb-axi.rhai index 3672e12a27..e379cb3b22 100644 --- a/fud2/scripts/cocotb-axi.rhai +++ b/fud2/scripts/cocotb-axi.rhai @@ -11,9 +11,6 @@ fn cocotb_setup(e) { let data_path = e.external_path(data_name); e.var_("sim_data", data_path); - // Cocotb is wants files relative to the location of the makefile. - // This is annoying to calculate on the fly, so we just copy necessary files to the build directory - e.rule("copy", "cp $in $out"); e.rule("make-cocotb", "make DATA_PATH=$sim_data VERILOG_SOURCE=$in COCOTB_LOG_LEVEL=CRITICAL > $out"); // This cleans up the extra `make` cruft, leaving what is in between `{` and `}.` e.rule("cleanup-cocotb", "sed -n '/Output:/,/make\\[1\\]/{/Output:/d;/make\\[1\\]/d;p}' $in > $out"); @@ -25,6 +22,8 @@ op( c::verilog_noverify, cocotb_axi, |e, input, output| { + // Cocotb wants files relative to the location of the makefile. + // This is annoying to calculate on the fly, so we just copy necessary files to the build directory e.build_cmd( ["Makefile"], "copy", diff --git a/fud2/scripts/xilinx.rhai b/fud2/scripts/xilinx.rhai index 457e4fd321..10692d7ad2 100644 --- a/fud2/scripts/xilinx.rhai +++ b/fud2/scripts/xilinx.rhai @@ -79,6 +79,9 @@ op( axi::c::verilog_state, xo, |e, input, output | { + let file_name = input.split("/")[-1]; + let sv_file_name = file_name; + sv_file_name.replace(`v`, `sv`); let yxi_file = e.config_val("yxi.file"); let yxi_path = e.external_path(yxi_file); @@ -88,14 +91,20 @@ op( [yxi_path], ["$xml-generator"], ); - + + e.build_cmd( + [sv_file_name], + "copy", + [input], + [], + ); e.build_cmd( [output], "gen-xo", [], [ - input, + sv_file_name, yxi_path, "gen_xo.tcl", "get-ports.py", From 996aadc47c0504693baf64f8e23a49aa0e192433 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 12:19:51 -0400 Subject: [PATCH 49/66] change kernel root to expect 'wrapper' toplevel name instead of 'Toplevel'. This generator will not work with the old verilog-wrapper --- yxi/xml/xml_generator.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/yxi/xml/xml_generator.py b/yxi/xml/xml_generator.py index 83d4eead9a..1a939664c3 100644 --- a/yxi/xml/xml_generator.py +++ b/yxi/xml/xml_generator.py @@ -19,11 +19,11 @@ def gen_xml(yxi): root = Element("root", {"versionMajor": "1", "versionMinor": "6"}) kernel = SubElement(root, "kernel", { - "name" : yxi["toplevel"], + "name" : "wrapper", "language": "ip_c", # TODO: Make sure this matches component.xml, Namely the `Toplevel` part. # See https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/RTL-Kernel-XML-File - "vlnv": "capra.cs.cornell.edu:kernel:Toplevel:1.0", + "vlnv": "capra.cs.cornell.edu:kernel:wrapper:1.0", "attributes": "", "preferredWorkGroupSizeMultiple" : "0", "workGroupSize" : "1", From 5d4f2d04089939ecde86bdaf55dc6aec0127e939 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 12:20:48 -0400 Subject: [PATCH 50/66] change gen_xo.tcl associate_bus_interface clock from 'ap_clk' to 'clk' --- fud2/rsrc/gen_xo.tcl | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/fud2/rsrc/gen_xo.tcl b/fud2/rsrc/gen_xo.tcl index 7d3585cfdd..9a7527bc96 100644 --- a/fud2/rsrc/gen_xo.tcl +++ b/fud2/rsrc/gen_xo.tcl @@ -31,10 +31,11 @@ set_property sdx_kernel true [ipx::current_core] set_property sdx_kernel_type rtl [ipx::current_core] # Declare bus interfaces. -ipx::associate_bus_interfaces -busif s_axi_control -clock ap_clk [ipx::current_core] +# NOTE: In the old version of our AXI wrapper `clk` was named `ap_clk` +ipx::associate_bus_interfaces -busif s_axi_control -clock clk [ipx::current_core] lvarpop argv foreach busname $argv { - ipx::associate_bus_interfaces -busif $busname -clock ap_clk [ipx::current_core] + ipx::associate_bus_interfaces -busif $busname -clock clk [ipx::current_core] } # Close & save the temporary project. From 9eac83380fce25e6c1a25ede9e4e0696950550c9 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 12:23:51 -0400 Subject: [PATCH 51/66] add a todo --- fud2/rsrc/gen_xo.tcl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fud2/rsrc/gen_xo.tcl b/fud2/rsrc/gen_xo.tcl index 9a7527bc96..24b5c9242a 100644 --- a/fud2/rsrc/gen_xo.tcl +++ b/fud2/rsrc/gen_xo.tcl @@ -32,6 +32,8 @@ set_property sdx_kernel_type rtl [ipx::current_core] # Declare bus interfaces. # NOTE: In the old version of our AXI wrapper `clk` was named `ap_clk` +# TODO: Before merging change this back and update Calyx-AXI-wrapper to use ap_clk +# (or do something else that doesnt break the old verilog-wrapper) ipx::associate_bus_interfaces -busif s_axi_control -clock clk [ipx::current_core] lvarpop argv foreach busname $argv { From 058c2590d3bfc0111ce72ce257ed890f9a0557a5 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 1 Aug 2024 14:10:31 -0400 Subject: [PATCH 52/66] remove stray merge conflict from lib.rs --- fud2/src/lib.rs | 4 ---- 1 file changed, 4 deletions(-) diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs index b710b5826f..0e0599f0e4 100644 --- a/fud2/src/lib.rs +++ b/fud2/src/lib.rs @@ -845,10 +845,6 @@ pub fn build_driver(bld: &mut DriverBuilder) { e.rule("iverilog-fst-sed", r#"sed '/\/\/ COMPONENT END: wrapper/c\`ifdef COCOTB_SIM\n initial begin\n \$$dumpfile ("$fst_file_name");\n \$$dumpvars (0, wrapper);\n #1;\n end\n`endif\n\/\/ COMPONENT END: wrapper' $in > $out"#)?; } -<<<<<<< HEAD - -======= ->>>>>>> xilinx-subordinate e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; e.rule("make-cocotb", "make DATA_PATH=$sim_data VERILOG_SOURCE=$in COCOTB_LOG_LEVEL=CRITICAL $cocotb-args > $out")?; From adbf430d16b53faf715e298c14669c50c45fed24 Mon Sep 17 00:00:00 2001 From: Adrian Sampson Date: Sun, 4 Aug 2024 08:43:35 -0400 Subject: [PATCH 53/66] xclrun: Remove timeout parameter This is no longer an argument to our YXI-wrapped kernels; it only exists in the old Verilog-generator stuff. We maybe want to revert/make this optional at some point to make `xclrun` compatible with the old version too? --- fud/fud/xclrun.py | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/fud/fud/xclrun.py b/fud/fud/xclrun.py index 67fbda6420..1c6eba84cf 100644 --- a/fud/fud/xclrun.py +++ b/fud/fud/xclrun.py @@ -86,12 +86,8 @@ def run(xclbin: Path, data: Mapping[str, Any]) -> Dict[str, Any]: buffer.sync_to_device() # Run the kernel. - kernel = getattr(ol, list(ol.ip_dict)[0]) # Like ol.Toplevel_1 - # XXX(nathanielnrn) 2022-07-19: timeout is not currently used anywhere in - # generated verilog code, passed in because kernel.xml is generated to - # expect it as an argument - timeout = 1000 - kernel.call(timeout, *buffers) + kernel = getattr(ol, list(ol.ip_dict)[0]) # Like ol.wrapper_1 + kernel.call(*buffers) # Collect the output data. for buf in buffers: From 0a02e0b4b68564c34e5b134ed6a7a2bacd7c9026 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 26 Dec 2024 09:59:03 +0200 Subject: [PATCH 54/66] change wrapper to Toplevel in gen_xo.tcl and have dynamic memory address bases in axi_test.py --- fud2/rsrc/gen_xo.tcl | 2 +- yxi/axi-calyx/cocotb/axi_test.py | 21 ++++++++++++--------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/fud2/rsrc/gen_xo.tcl b/fud2/rsrc/gen_xo.tcl index 24b5c9242a..8b38be91e2 100644 --- a/fud2/rsrc/gen_xo.tcl +++ b/fud2/rsrc/gen_xo.tcl @@ -46,4 +46,4 @@ ipx::save_core [ipx::current_core] close_project -delete # Package the project as an .xo file. -package_xo -xo_path ${xoname} -kernel_name wrapper -ip_directory ${path_to_packaged} -kernel_xml ./kernel.xml +package_xo -xo_path ${xoname} -kernel_name Toplevel -ip_directory ${path_to_packaged} -kernel_xml ./kernel.xml diff --git a/yxi/axi-calyx/cocotb/axi_test.py b/yxi/axi-calyx/cocotb/axi_test.py index ec83c18db0..3fb76dce04 100644 --- a/yxi/axi-calyx/cocotb/axi_test.py +++ b/yxi/axi-calyx/cocotb/axi_test.py @@ -89,19 +89,22 @@ async def run_kernel_test(toplevel, data_path: str): # Finish when ap_done is high or 100 us of simulation have passed. timeout = 5000 - #Base addresses for memories - await tb.control_manager.write(0x0010, encode([0x0],4)) - await tb.control_manager.write(0x0014, encode([0x0],4)) - await tb.control_manager.write(0x0018, encode([0x0],4)) - await tb.control_manager.write(0x001C, encode([0x0],4)) - await tb.control_manager.write(0x0020, encode([0x0],4)) - await tb.control_manager.write(0x0024, encode([0x0],4)) + # Base addresses for memories + # The od verilog wrapper seemed to be ok with base addresses of 0x0000 + # for every memory, so trying that here. + # Xilinx spec has the first argument offset at 0x0010 + # Note this differs from the old verilog testrunner because we assume no + # timeout argument with the new calyx wrapper. + register_offset = 0x0010 + for mem in data_map.keys(): + await tb.control_manager.write(register_offset, encode([0x0],4)) + register_offset += 4 + await tb.control_manager.write(register_offset, encode([0x0],4)) + register_offset += 4 #Assert ap_start by writing 1 to 0x0000 await tb.control_manager.write(0x0000, encode([0x1],1)) await with_timeout(RisingEdge(toplevel.done), timeout, "us") - - # Get data from ram mems: list[str] = list(data_map.keys()) From 4a2127598e59433d7a60d58e55a1bde0ce203270 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Tue, 31 Dec 2024 13:34:55 +0200 Subject: [PATCH 55/66] merge of axi generator renaming --- fud2/scripts/axi.rhai | 4 +- .../tests__test@plan_axi-wrapped.snap | 2 +- runt.toml | 8 +- .../{axi-generator.py => axi_generator.py} | 4 + yxi/axi-calyx/dynamic_axi_generator.py | 98 +++++++++++-------- 5 files changed, 67 insertions(+), 49 deletions(-) rename yxi/axi-calyx/{axi-generator.py => axi_generator.py} (99%) diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index 0df600f7ec..e78fe592cf 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -27,7 +27,7 @@ fn wrapper_setup(e) { let generator_path = if dynamic == "true" { "$calyx-base/yxi/axi-calyx/dynamic_axi_generator.py" } else { - "$calyx-base/yxi/axi-calyx/axi-generator.py" + "$calyx-base/yxi/axi-calyx/axi_generator.py" }; e.config_var_or("axi-generator", "axi.generator", generator_path); e.config_var_or("python", "python", "python3"); @@ -37,6 +37,8 @@ fn wrapper_setup(e) { // Define a simple `combine` rule that just concatenates any numer of files. e.rule("combine", "cat $in > $out"); + // Removes imports and `external` primitive blocks added by passes by removing + // everything up until the first line containing `component main` e.rule( "remove-imports", "sed '/^import/d' $in > $out", diff --git a/fud2/tests/snapshots/tests__test@plan_axi-wrapped.snap b/fud2/tests/snapshots/tests__test@plan_axi-wrapped.snap index f97fff8a97..19cb16f35c 100644 --- a/fud2/tests/snapshots/tests__test@plan_axi-wrapped.snap +++ b/fud2/tests/snapshots/tests__test@plan_axi-wrapped.snap @@ -22,7 +22,7 @@ yxi = $calyx-base/target/debug/yxi rule yxi command = $yxi -l $calyx-base $in > $out -axi-generator = $calyx-base/yxi/axi-calyx/axi-generator.py +axi-generator = $calyx-base/yxi/axi-calyx/axi_generator.py python = python3 rule gen-axi command = $python $axi-generator $in > $out diff --git a/runt.toml b/runt.toml index 66d4a8cae9..4b439deb60 100644 --- a/runt.toml +++ b/runt.toml @@ -68,7 +68,7 @@ cmd = """ [[tests]] name = "fud2 yxi invocation" -paths = ["yxi/tests/ref-mems-vec-add.futil"] +paths = ["yxi/tests/yxi-tool/ref-mems-vec-add.futil"] cmd = """ fud2 {} --from calyx --to yxi """ @@ -604,14 +604,14 @@ fud e {} -s verilog.cycle_limit 500 \ name = "calyx-py read-write-compute AXI wrapper generation" paths = ["yxi/tests/axi/read-compute-write/*.yxi"] cmd = """ -python3 yxi/axi-calyx/axi-generator.py {} +python3 yxi/axi-calyx/axi_generator.py {} """ [[tests]] name = "calyx-py dynamic AXI wrapper generation" paths = ["yxi/tests/axi/dynamic/*.yxi"] cmd = """ -python3 yxi/axi-calyx/dynamic-axi-generator.py {} +python3 yxi/axi-calyx/dynamic_axi_generator.py {} """ #Ignore fud2 stderr for now due to ninja nondeterminism @@ -681,4 +681,4 @@ make --silent -B TEST_PATH={} COCOTB_LOG_LEVEL=CRITICAL |\ make clean && \ rm -f results.xml -""" \ No newline at end of file +""" diff --git a/yxi/axi-calyx/axi-generator.py b/yxi/axi-calyx/axi_generator.py similarity index 99% rename from yxi/axi-calyx/axi-generator.py rename to yxi/axi-calyx/axi_generator.py index f17845c18d..1c712542b8 100644 --- a/yxi/axi-calyx/axi-generator.py +++ b/yxi/axi-calyx/axi_generator.py @@ -1,3 +1,7 @@ +# The *original* axi generator which implement a read-compute-write sequence +# to get data in and out of the computational kernel. +# A `dynamic_axi_generator` also exists + from calyx.builder import ( Builder, add_comp_ports, diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index 7582061cb7..9ebeab6529 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -1,11 +1,8 @@ -from calyx.builder import ( - Builder, - add_comp_ports, - invoke, - par, - while_, - if_ -) +# Implements an AXI controller which dynamically reads and writes data +# in and out of the computational kernel as needed. Compare with the +# read-compute-write implementation in the original `axi_generator`. + +from calyx.builder import Builder, add_comp_ports, invoke, par, while_, if_ from axi_controller_generator import add_control_subordinate from typing import Literal from math import log2, ceil @@ -21,11 +18,12 @@ width_key = "data_width" size_key = "total_size" name_key = "name" -#This returns an array based on dimensions of memory +# This returns an array based on dimensions of memory address_width_key = "idx_sizes" type_key = "memory_type" -#TODO (nathanielnrn): Should we make these comb groups? + +# TODO (nathanielnrn): Should we make these comb groups? def add_address_translator(prog, mem): address_width = mem[address_width_key][0] data_width = mem[width_key] @@ -36,13 +34,14 @@ def add_address_translator(prog, mem): translator_output = [("axi_address", 64)] add_comp_ports(address_translator, translator_inputs, translator_output) - #Cells - #XRT expects 64 bit address. - address_mult = address_translator.const_mult(64, width_in_bytes(data_width), f"mul_{name}") + # Cells + # XRT expects 64 bit address. + address_mult = address_translator.const_mult( + 64, width_in_bytes(data_width), f"mul_{name}" + ) pad_input_addr = address_translator.pad(address_width, 64, f"pad_input_addr") - - #Assignment + # Assignment with address_translator.continuous: pad_input_addr.in_ = address_translator.this()["calyx_mem_addr"] address_mult.in_ = pad_input_addr.out @@ -113,12 +112,14 @@ def _add_m_to_s_address_channel(prog, mem, prefix: Literal["AW", "AR"]): xhandshake_occurred.write_en = (~xhandshake_occurred.out) @ 1 # Drive output signals for transfer - m_to_s_address_channel.this()[f"{x}ADDR"] = m_to_s_address_channel.this()["axi_address"] + m_to_s_address_channel.this()[f"{x}ADDR"] = m_to_s_address_channel.this()[ + "axi_address" + ] # This is taken from mem size, we assume the databus width is the size # of our memory cell and that width is a power of 2 # TODO(nathanielnrn): convert to binary instead of decimal m_to_s_address_channel.this()[f"{x}SIZE"] = width_xsize(mem[width_key]) - #Dynamic accesses only need asingle transfer per transcation + # Dynamic accesses only need asingle transfer per transcation m_to_s_address_channel.this()[f"{x}LEN"] = 0 m_to_s_address_channel.this()[f"{x}BURST"] = 1 # Must be INCR for XRT # Required by spec, we hardcode to privileged, non-secure, data access @@ -130,12 +131,10 @@ def _add_m_to_s_address_channel(prog, mem, prefix: Literal["AW", "AR"]): bt_reg.write_en = 1 do_x_transfer.done = bt_reg.out - # ARLEN must be between 0-255, make sure to subtract 1 from yxi # size when assigning to ARLEN # assert mem[size_key] < 256, "Memory size must be less than 256" - m_to_s_address_channel.control += [ par( invoke(bt_reg, in_in=0), @@ -227,7 +226,7 @@ def add_read_channel(prog, mem): # Control invoke_n_RLAST = invoke(n_RLAST, in_in=1) # invoke_bt_reg = invoke(bt_reg, in_in=0) - + # Could arguably get rid of this while loop for the dynamic verison, but this # matches nicely with non dynamic version and conforms to spec, # and will be easier to extend to variable length dynamic transfers in the future @@ -245,11 +244,7 @@ def add_write_channel(prog, mem): name = mem[name_key] # Inputs/Outputs write_channel = prog.component(f"m_write_channel_{name}") - channel_inputs = [ - ("ARESETn", 1), - ("WREADY", 1), - ("write_data", data_width) - ] + channel_inputs = [("ARESETn", 1), ("WREADY", 1), ("write_data", data_width)] # TODO(nathanielnrn): We currently assume WDATA is the same width as the # memory. This limits throughput many AXI data busses are much wider # i.e., 512 bits. @@ -294,7 +289,7 @@ def add_write_channel(prog, mem): write_channel.this()["WLAST"] = 1 # done after handshake - #TODO(nathanielnrn): Perhaps we can combine between handshake_occurred and bt_reg + # TODO(nathanielnrn): Perhaps we can combine between handshake_occurred and bt_reg bt_reg.in_ = (wvalid.out & WREADY) @ 1 bt_reg.in_ = ~(wvalid.out & WREADY) @ 0 bt_reg.write_en = 1 @@ -350,6 +345,7 @@ def add_bresp_channel(prog, mem): # Control bresp_channel.control += [invoke(bt_reg, in_in=0), block_transfer] + def add_read_controller(prog, mem): add_arread_channel(prog, mem) add_read_channel(prog, mem) @@ -377,18 +373,21 @@ def add_read_controller(prog, mem): (f"ARBURST", 2), (f"ARPROT", 3), (f"RREADY", 1), - #sent out to axi_dyn_mem + # sent out to axi_dyn_mem (f"read_data", data_width), ] add_comp_ports(read_controller, read_controller_inputs, read_controller_outputs) - #Cells - simple_ar_channel = read_controller.cell(f"ar_channel_{name}", prog.get_component(f"m_ar_channel_{name}")) - simple_read_channel = read_controller.cell(f"read_channel_{name}", prog.get_component(f"m_read_channel_{name}")) + # Cells + simple_ar_channel = read_controller.cell( + f"ar_channel_{name}", prog.get_component(f"m_ar_channel_{name}") + ) + simple_read_channel = read_controller.cell( + f"read_channel_{name}", prog.get_component(f"m_read_channel_{name}") + ) # No groups necesarry - # Control # Invokes @@ -422,6 +421,7 @@ def add_read_controller(prog, mem): simple_read_invoke, ] + def add_write_controller(prog, mem): add_awwrite_channel(prog, mem) add_write_channel(prog, mem) @@ -455,13 +455,18 @@ def add_write_controller(prog, mem): add_comp_ports(write_controller, write_controller_inputs, write_controller_outputs) - #Cells - simple_aw_channel = write_controller.cell(f"aw_channel_{name}", prog.get_component(f"m_aw_channel_{name}")) - simple_write_channel = write_controller.cell(f"write_channel_{name}", prog.get_component(f"m_write_channel_{name}")) - simple_bresp_channel = write_controller.cell(f"bresp_channel_{name}", prog.get_component(f"m_bresp_channel_{name}")) + # Cells + simple_aw_channel = write_controller.cell( + f"aw_channel_{name}", prog.get_component(f"m_aw_channel_{name}") + ) + simple_write_channel = write_controller.cell( + f"write_channel_{name}", prog.get_component(f"m_write_channel_{name}") + ) + simple_bresp_channel = write_controller.cell( + f"bresp_channel_{name}", prog.get_component(f"m_bresp_channel_{name}") + ) # No groups necesarry - # Control # Invokes simple_aw_invoke = invoke( @@ -498,6 +503,7 @@ def add_write_controller(prog, mem): simple_bresp_invoke, ] + def add_axi_dyn_mem(prog, mem): address_width = mem[address_width_key][0] data_width = mem[width_key] @@ -506,7 +512,7 @@ def add_axi_dyn_mem(prog, mem): prog.import_("primitives/memories/dyn.futil") axi_dyn_mem = prog.component(f"axi_dyn_mem_{name}") # Inputs/Outputs - dyn_mem_inputs =[ + dyn_mem_inputs = [ ("addr0", address_width, [("write_together", 1), "data"]), ("content_en", 1, [("write_together", 1), ("go", 1)]), ("write_en", 1, [("write_together", 2)]), @@ -606,13 +612,12 @@ def add_axi_dyn_mem(prog, mem): out_WDATA=this_component["WDATA"], out_BREADY=this_component["BREADY"], ) - + axi_dyn_mem.control += [ latch_write_en, if_(write_en_reg.out, write_controller_invoke, read_controller_invoke) ] - # NOTE: Unlike the channel functions, this can expect multiple mems def add_wrapper_comp(prog, mems): @@ -746,7 +751,10 @@ def add_wrapper_comp(prog, mems): # TODO: Don't think these need to be marked external, but we # we need to raise them at some point form original calyx program - axi_mem = wrapper_comp.cell(f"axi_dyn_mem_{mem_name}", prog.get_component(f"axi_dyn_mem_{mem_name}")) + axi_mem = wrapper_comp.cell( + f"axi_dyn_mem_{mem_name}", prog.get_component(f"axi_dyn_mem_{mem_name}") + ) + # Wires with wrapper_comp.continuous: @@ -759,7 +767,9 @@ def add_wrapper_comp(prog, mems): # Connect wrapper ports with axi_dyn_mem ports # Read controller portion inputs - axi_mem["ARESETn"] = wrapper_comp.this()[f"{mem_name}_ARESETn"] #note that both styles work + axi_mem["ARESETn"] = wrapper_comp.this()[ + f"{mem_name}_ARESETn" + ] # note that both styles work # wrapper_comp.this()[f"{mem_name}_ARESETn"] = axi_mem["ARESETn"] #note that both styles work axi_mem.ARREADY = wrapper_comp.this()[f"{mem_name}_ARREADY"] axi_mem.RVALID = wrapper_comp.this()[f"{mem_name}_RVALID"] @@ -876,7 +886,9 @@ def check_mems_wellformed(mems): mem[width_key] ).is_integer(), "Width must be a power of 2 to be correctly described by xSIZE" assert mem[size_key] > 0, "Memory size must be greater than 0" - assert mem[type_key] == "Dynamic", "Only dynamic memories are currently supported for dynamic axi" + assert ( + mem[type_key] == "Dynamic" + ), "Only dynamic memories are currently supported for dynamic axi" if __name__ == "__main__": @@ -894,4 +906,4 @@ def check_mems_wellformed(mems): yxifile = open(yxi_filename) yxi = json.load(yxifile) mems = yxi["memories"] - build().emit() \ No newline at end of file + build().emit() From 213be88f37299291969f4fc8fc368d0d82593ecb Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Tue, 31 Dec 2024 15:56:27 +0200 Subject: [PATCH 56/66] revert axi.rhai changes --- fud2/scripts/axi.rhai | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index e78fe592cf..b0705610d2 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -18,7 +18,6 @@ op( }, ); -export let wrapper_setup = wrapper_setup; fn wrapper_setup(e) { // Define a `gen-axi` rule that invokes our Python code generator program. // For now point to standalone axi-generator.py. Can maybe turn this into a rsrc file? @@ -41,7 +40,7 @@ fn wrapper_setup(e) { // everything up until the first line containing `component main` e.rule( "remove-imports", - "sed '/^import/d' $in > $out", + "sed '1,/component main/{/component main/!d; }' $in > $out", ); } @@ -54,17 +53,22 @@ fn replace_ext(path, new_ext) { return `${path}.${new_ext}`; } } + fn axi_wrapped_op(e, input, output) { let file_name = input.split("/")[-1]; let tmp_yxi = replace_ext(file_name, "yxi"); e.build_cmd([tmp_yxi], "yxi", [input], []); + let refified_calyx = replace_ext(`refified_${file_name}`, "futil"); + e.build_cmd([refified_calyx], "calyx-pass", [input], []); + e.arg("pass", "external-to-ref"); + let axi_wrapper = "axi_wrapper.futil"; e.build_cmd([axi_wrapper], "gen-axi", [tmp_yxi], []); - let no_imports_calyx = `no_imports_${input}`; - e.build_cmd([no_imports_calyx], "remove-imports", [input], []); + let no_imports_calyx = `no_imports_${refified_calyx}`; + e.build_cmd([no_imports_calyx], "remove-imports", [refified_calyx], []); e.build_cmd([output], "combine", [axi_wrapper, no_imports_calyx], []); } From f6ccafc7090fcbb0a007f40f5f27e7fe8373c25c Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Tue, 31 Dec 2024 18:07:41 +0200 Subject: [PATCH 57/66] add ap_clk @clk designation --- yxi/axi-calyx/axi_generator.py | 2 ++ yxi/axi-calyx/dynamic_axi_generator.py | 2 ++ 2 files changed, 4 insertions(+) diff --git a/yxi/axi-calyx/axi_generator.py b/yxi/axi-calyx/axi_generator.py index 1c712542b8..28b2067abd 100644 --- a/yxi/axi-calyx/axi_generator.py +++ b/yxi/axi-calyx/axi_generator.py @@ -505,6 +505,8 @@ def add_main_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) + # Naming the clock signal `ap_clk` ensures Xilinx tool compatability + wrapper_comp.input("ap_clk", 1, ["clk"]) # Cells # Read stuff diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index 9ebeab6529..f3d1cd2ca9 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -675,6 +675,8 @@ def add_wrapper_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) + # Naming the clock signal `ap_clk` ensures Xilinx tool compatability + wrapper_comp.input("ap_clk", 1, ["clk"]) if GENERATE_FOR_XILINX: control_subordinate = wrapper_comp.cell(f"control_subordinate", prog.get_component("control_subordinate")) From 0b6c63eeb8477e4b07fd861265240ab72ed15278 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 12:03:39 +0200 Subject: [PATCH 58/66] use ap_clk with @clk attribute --- yxi/axi-calyx/axi_generator.py | 4 ++++ yxi/axi-calyx/dynamic_axi_generator.py | 2 ++ 2 files changed, 6 insertions(+) diff --git a/yxi/axi-calyx/axi_generator.py b/yxi/axi-calyx/axi_generator.py index 1c712542b8..97c5268a64 100644 --- a/yxi/axi-calyx/axi_generator.py +++ b/yxi/axi-calyx/axi_generator.py @@ -459,6 +459,8 @@ def add_main_comp(prog, mems): main_compute = wrapper_comp.comp_instance( "main_compute", "main", check_undeclared=False ) + # Naming the clock signal `ap_clk` ensures Xilinx tool compatability + wrapper_comp.input("ap_clk", 1, ["clk"]) for mem in mems: mem_name = mem[name_key] @@ -505,6 +507,8 @@ def add_main_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) + # Naming the clock signal `ap_clk` ensures Xilinx tool compatability + wrapper_comp.input("ap_clk", 1, ["clk"]) # Cells # Read stuff diff --git a/yxi/axi-calyx/dynamic_axi_generator.py b/yxi/axi-calyx/dynamic_axi_generator.py index b84547521e..09c3a7c161 100644 --- a/yxi/axi-calyx/dynamic_axi_generator.py +++ b/yxi/axi-calyx/dynamic_axi_generator.py @@ -626,6 +626,8 @@ def add_main_comp(prog, mems): main_compute = wrapper_comp.comp_instance( "main_compute", "main", check_undeclared=False ) + # Naming the clock signal `ap_clk` ensures Xilinx tool compatability + wrapper_comp.input("ap_clk", 1, ["clk"]) for mem in mems: mem_name = mem[name_key] From a0f7522e918474f43128df5cc0c6a2efb3c7aa1f Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 12:47:55 +0200 Subject: [PATCH 59/66] add trailing semicolon to sed command to make compatible with bsd sed --- fud2/scripts/cocotb-axi.rhai | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/fud2/scripts/cocotb-axi.rhai b/fud2/scripts/cocotb-axi.rhai index f22511d5f1..887c434562 100644 --- a/fud2/scripts/cocotb-axi.rhai +++ b/fud2/scripts/cocotb-axi.rhai @@ -26,7 +26,7 @@ fn cocotb_setup(e) { e.rule("copy", "cp $in $out"); // This cleans up the extra `make` cruft, leaving what is in between `{` and `}.` e.rule( - "cleanup-cocotb", `sed -n '/Output:/,/make\[1\]/{/Output:/d;/make\[1\]/d;p}' $in > $out` + "cleanup-cocotb", `sed -n '/Output:/,/make\[1\]/{/Output:/d;/make\[1\]/d;p;}' $in > $out` ); } @@ -49,6 +49,8 @@ op( c::verilog_noverify, cocotb_axi, |e, input, output| { + // Cocotb wants files relative to the location of the makefile. + // This is annoying to calculate on the fly, so we just copy necessary files to the build directory e.build_cmd( ["Makefile"], "copy", From 4b37ad300b58cca356883cf55c4f0da612b78843 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 14:50:50 +0200 Subject: [PATCH 60/66] rename clk to ap_clk in cocotb testbench for sake of xilinx/old verilog wrapper backwards compatability (i.e in gen_xo.tcl) --- yxi/axi-calyx/cocotb/axi_test.py | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/yxi/axi-calyx/cocotb/axi_test.py b/yxi/axi-calyx/cocotb/axi_test.py index 58c47b6452..268679fdf7 100644 --- a/yxi/axi-calyx/cocotb/axi_test.py +++ b/yxi/axi-calyx/cocotb/axi_test.py @@ -32,12 +32,9 @@ async def setup_rams(self, data: Mapping[str, Any]): # i.e m0_axi_RDATA. # These prefixes have to match verilog code. See kernel.xml # and ports assigned within that for guidance. - # In general, the index of `m_axi` just - # increments by 1 in fud axi generation - #print(f"mem is: {mem}") rams[mem] = AxiRam( AxiBus.from_prefix(self.toplevel, f"{mem}"), - self.toplevel.clk, + self.toplevel.ap_clk, reset = self.toplevel.reset, # self.toplevel.ap_rst_n, size=size, @@ -56,7 +53,7 @@ def get_rams(self): async def init_toplevel(self): await Timer(50, "ns") self.toplevel.reset.value = 1 - await ClockCycles(self.toplevel.clk, 5) + await ClockCycles(self.toplevel.ap_clk, 5) self.toplevel.reset.value = 0 self.toplevel.go.value = 1 @@ -73,10 +70,10 @@ async def run_kernel_test(toplevel, data_path: str): # set up clock of 2ns period, simulator default timestep is 1ps - cocotb.start_soon(Clock(toplevel.clk, 2, units="ns").start()) + cocotb.start_soon(Clock(toplevel.ap_clk, 2, units="ns").start()) await tb.init_toplevel() await Timer(100, "ns") - await FallingEdge(toplevel.clk) + await FallingEdge(toplevel.ap_clk) # Finish when ap_done is high or 100 us of simulation have passed. From 2d8f529d9d2641d0546a23c377d7d9a5d41a2e71 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 14:56:42 +0200 Subject: [PATCH 61/66] update fud2 snapshot --- fud2/tests/snapshots/tests__test@plan_calyx-to-cocotb-axi.snap | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fud2/tests/snapshots/tests__test@plan_calyx-to-cocotb-axi.snap b/fud2/tests/snapshots/tests__test@plan_calyx-to-cocotb-axi.snap index 6b4775db0f..123e361b7f 100644 --- a/fud2/tests/snapshots/tests__test@plan_calyx-to-cocotb-axi.snap +++ b/fud2/tests/snapshots/tests__test@plan_calyx-to-cocotb-axi.snap @@ -26,7 +26,7 @@ rule make-cocotb rule copy command = cp $in $out rule cleanup-cocotb - command = sed -n '/Output:/,/make\[1\]/{/Output:/d;/make\[1\]/d;p}' $in > $out + command = sed -n '/Output:/,/make\[1\]/{/Output:/d;/make\[1\]/d;p;}' $in > $out build Makefile: copy $cocotb-makefile-dir/Makefile build axi_test.py: copy $cocotb-makefile-dir/axi_test.py From 1e8336bbc63de0d0fb909921a36dd3bfe309243d Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 15:17:39 +0200 Subject: [PATCH 62/66] update dynamic tests to work to expect new ap_clk toplevel signal --- .../dyn-mem-vec-add-axi-wrapped.expect | 10 +- .../dynamic/dyn-mem-vec-add-axi-wrapped.futil | 2 +- .../axi/dynamic/dyn-mem-vec-add-verilog.v | 4230 ++++++++--------- yxi/tests/axi/dynamic/dyn-mem-vec-add.expect | 2 +- yxi/tests/axi/dynamic/dyn-vec-add.expect | 2 +- 5 files changed, 1892 insertions(+), 2354 deletions(-) diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect index 3b0d36f229..e672cf67df 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.expect @@ -9105,6 +9105,7 @@ assign invoke1_done_in = read_controller_Sum0_done; // COMPONENT END: axi_dyn_mem_Sum0 endmodule module wrapper( + input logic ap_clk, input logic A0_ARESETn, input logic A0_ARREADY, input logic A0_RVALID, @@ -9199,7 +9200,6 @@ module wrapper( output logic Sum0_WID, output logic Sum0_BID, input logic go, - input logic clk, input logic reset, output logic done ); @@ -9507,7 +9507,7 @@ assign axi_dyn_mem_A0_write_en = _guard1 ? main_compute_A0_write_en : 1'd0; assign axi_dyn_mem_A0_RDATA = A0_RDATA; -assign axi_dyn_mem_A0_clk = clk; +assign axi_dyn_mem_A0_clk = ap_clk; assign axi_dyn_mem_A0_addr0 = _guard2 ? main_compute_A0_addr0 : 3'd0; @@ -9527,7 +9527,7 @@ assign axi_dyn_mem_Sum0_write_en = _guard4 ? main_compute_Sum0_write_en : 1'd0; assign axi_dyn_mem_Sum0_RDATA = Sum0_RDATA; -assign axi_dyn_mem_Sum0_clk = clk; +assign axi_dyn_mem_Sum0_clk = ap_clk; assign axi_dyn_mem_Sum0_addr0 = _guard5 ? main_compute_Sum0_addr0 : 3'd0; @@ -9613,7 +9613,7 @@ assign main_compute_B0_read_data = assign main_compute_Sum0_done = _guard11 ? axi_dyn_mem_Sum0_done : 1'd0; -assign main_compute_clk = clk; +assign main_compute_clk = ap_clk; assign main_compute_B0_done = _guard12 ? axi_dyn_mem_B0_done : 1'd0; @@ -9631,7 +9631,7 @@ assign axi_dyn_mem_B0_write_en = _guard15 ? main_compute_B0_write_en : 1'd0; assign axi_dyn_mem_B0_RDATA = B0_RDATA; -assign axi_dyn_mem_B0_clk = clk; +assign axi_dyn_mem_B0_clk = ap_clk; assign axi_dyn_mem_B0_addr0 = _guard16 ? main_compute_B0_addr0 : 3'd0; diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.futil b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.futil index 122909aef1..99a50c73b1 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.futil +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-axi-wrapped.futil @@ -670,7 +670,7 @@ component axi_dyn_mem_Sum0(@write_together(1) @data addr0: 3, @write_together(1) } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); axi_dyn_mem_A0 = axi_dyn_mem_A0(); diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v b/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v index ce3cbaa9b2..e672cf67df 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add-verilog.v @@ -335,7 +335,7 @@ module std_fp_div_pipe #( running <= running; end - always_comb begin + always @* begin if (acc >= {1'b0, right}) begin acc_next = acc - right; {acc_next, quotient_next} = {acc_next[WIDTH-1:0], quotient, 1'b1}; @@ -1180,7 +1180,7 @@ module std_bit_slice #( input wire logic [IN_WIDTH-1:0] in, output logic [OUT_WIDTH-1:0] out ); - assign out = in[END_IDX:START_IDX]; + assign out = in[END_IDX:START_IDX]; `ifdef VERILATOR always_comb begin @@ -1196,6 +1196,74 @@ module std_bit_slice #( endmodule +module std_skid_buffer #( + parameter WIDTH = 32 +)( + input wire logic [WIDTH-1:0] in, + input wire logic i_valid, + input wire logic i_ready, + input wire logic clk, + input wire logic reset, + output logic [WIDTH-1:0] out, + output logic o_valid, + output logic o_ready +); + logic [WIDTH-1:0] val; + logic bypass_rg; + always @(posedge clk) begin + // Reset + if (reset) begin + // Internal Registers + val <= '0; + bypass_rg <= 1'b1; + end + // Out of reset + else begin + // Bypass state + if (bypass_rg) begin + if (!i_ready && i_valid) begin + val <= in; // Data skid happened, store to buffer + bypass_rg <= 1'b0; // To skid mode + end + end + // Skid state + else begin + if (i_ready) begin + bypass_rg <= 1'b1; // Back to bypass mode + end + end + end + end + + assign o_ready = bypass_rg; + assign out = bypass_rg ? in : val; + assign o_valid = bypass_rg ? i_valid : 1'b1; +endmodule + +module std_bypass_reg #( + parameter WIDTH = 32 +)( + input wire logic [WIDTH-1:0] in, + input wire logic write_en, + input wire logic clk, + input wire logic reset, + output logic [WIDTH-1:0] out, + output logic done +); + logic [WIDTH-1:0] val; + assign out = write_en ? in : val; + + always_ff @(posedge clk) begin + if (reset) begin + val <= 0; + done <= 0; + end else if (write_en) begin + val <= in; + done <= 1'd1; + end else done <= 1'd0; + end +endmodule + module undef #( parameter WIDTH = 32 ) ( @@ -1318,15 +1386,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -1334,12 +1393,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -1348,14 +1407,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1390,23 +1449,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -1424,13 +1466,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1458,27 +1500,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -1495,7 +1537,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -1505,136 +1547,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -1653,62 +1679,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_A0 endmodule @@ -1746,15 +1761,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -1762,12 +1768,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -1776,14 +1782,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1818,23 +1824,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -1852,13 +1841,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1886,27 +1875,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -1927,142 +1916,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -2080,64 +2053,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_A0 endmodule module m_read_channel_A0( @@ -2456,15 +2418,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -2472,24 +2425,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -2524,23 +2477,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -2558,13 +2494,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -2580,27 +2516,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -2618,189 +2554,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_A0 endmodule module m_bresp_channel_A0( @@ -4061,15 +3970,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -4077,12 +3977,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -4091,14 +3991,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -4133,23 +4033,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -4167,13 +4050,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -4201,27 +4084,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4238,7 +4121,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -4248,136 +4131,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -4396,62 +4263,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_B0 endmodule @@ -4489,15 +4345,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -4505,12 +4352,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -4519,14 +4366,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -4561,23 +4408,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -4595,13 +4425,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -4629,27 +4459,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4670,142 +4500,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -4823,64 +4637,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_B0 endmodule module m_read_channel_B0( @@ -5199,15 +5002,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -5215,24 +5009,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -5267,23 +5061,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -5301,13 +5078,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -5323,27 +5100,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -5361,189 +5138,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_B0 endmodule module m_bresp_channel_B0( @@ -6804,15 +6554,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -6820,12 +6561,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; @@ -6834,14 +6575,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -6876,23 +6617,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -6910,13 +6634,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -6944,27 +6668,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -6981,7 +6705,7 @@ std_wire # ( wire _guard0 = 1; wire _guard1 = do_ar_transfer_done_out; wire _guard2 = ~_guard1; -wire _guard3 = fsm0_out == 2'd1; +wire _guard3 = fsm_out == 2'd1; wire _guard4 = _guard2 & _guard3; wire _guard5 = tdcc_go_out; wire _guard6 = _guard4 & _guard5; @@ -6991,136 +6715,120 @@ wire _guard9 = do_ar_transfer_go_out; wire _guard10 = do_ar_transfer_go_out; wire _guard11 = do_ar_transfer_go_out; wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = fsm_out == 1'd0; -wire _guard15 = ~_guard14; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = early_reset_static_par_go_out; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = early_reset_static_par_go_out; -wire _guard22 = early_reset_static_par_go_out; -wire _guard23 = ar_handshake_occurred_out; -wire _guard24 = ~_guard23; -wire _guard25 = do_ar_transfer_go_out; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = early_reset_static_par_go_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = arvalid_out; -wire _guard30 = ARREADY; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = do_ar_transfer_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = invoke2_done_out; -wire _guard36 = ~_guard35; -wire _guard37 = fsm0_out == 2'd2; -wire _guard38 = _guard36 & _guard37; -wire _guard39 = tdcc_go_out; +wire _guard13 = fsm_out == 2'd3; +wire _guard14 = fsm_out == 2'd0; +wire _guard15 = wrapper_early_reset_static_par_thread_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd1; +wire _guard21 = do_ar_transfer_done_out; +wire _guard22 = _guard20 & _guard21; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd2; +wire _guard27 = invoke2_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd0; +wire _guard33 = wrapper_early_reset_static_par_thread_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd3; +wire _guard38 = fsm_out == 2'd2; +wire _guard39 = invoke2_done_out; wire _guard40 = _guard38 & _guard39; -wire _guard41 = wrapper_early_reset_static_par_done_out; -wire _guard42 = ~_guard41; -wire _guard43 = fsm0_out == 2'd0; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = tdcc_go_out; -wire _guard46 = _guard44 & _guard45; -wire _guard47 = fsm_out == 1'd0; -wire _guard48 = signal_reg_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm0_out == 2'd3; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = _guard50 | _guard55; -wire _guard57 = fsm0_out == 2'd1; -wire _guard58 = do_ar_transfer_done_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = _guard56 | _guard61; -wire _guard63 = fsm0_out == 2'd2; -wire _guard64 = invoke2_done_out; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd1; +wire _guard44 = do_ar_transfer_done_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; +wire _guard47 = _guard45 & _guard46; +wire _guard48 = ar_handshake_occurred_out; +wire _guard49 = ~_guard48; +wire _guard50 = do_ar_transfer_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = early_reset_static_par_thread_go_out; +wire _guard53 = _guard51 | _guard52; +wire _guard54 = arvalid_out; +wire _guard55 = ARREADY; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = do_ar_transfer_go_out; +wire _guard58 = _guard56 & _guard57; +wire _guard59 = early_reset_static_par_thread_go_out; +wire _guard60 = invoke2_done_out; +wire _guard61 = ~_guard60; +wire _guard62 = fsm_out == 2'd2; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = tdcc_go_out; wire _guard65 = _guard63 & _guard64; -wire _guard66 = tdcc_go_out; -wire _guard67 = _guard65 & _guard66; -wire _guard68 = _guard62 | _guard67; -wire _guard69 = fsm0_out == 2'd0; -wire _guard70 = wrapper_early_reset_static_par_done_out; +wire _guard66 = wrapper_early_reset_static_par_thread_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm_out == 2'd0; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc_go_out; wire _guard71 = _guard69 & _guard70; -wire _guard72 = tdcc_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = fsm0_out == 2'd3; -wire _guard75 = fsm0_out == 2'd2; -wire _guard76 = invoke2_done_out; +wire _guard72 = do_ar_transfer_go_out; +wire _guard73 = early_reset_static_par_thread_go_out; +wire _guard74 = _guard72 | _guard73; +wire _guard75 = ARREADY; +wire _guard76 = arvalid_out; wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; +wire _guard78 = do_ar_transfer_go_out; wire _guard79 = _guard77 & _guard78; -wire _guard80 = fsm0_out == 2'd1; -wire _guard81 = do_ar_transfer_done_out; +wire _guard80 = ARREADY; +wire _guard81 = arvalid_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = tdcc_go_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = do_ar_transfer_go_out; -wire _guard86 = early_reset_static_par_go_out; +wire _guard83 = ~_guard82; +wire _guard84 = do_ar_transfer_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = early_reset_static_par_thread_go_out; wire _guard87 = _guard85 | _guard86; -wire _guard88 = ARREADY; -wire _guard89 = arvalid_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = do_ar_transfer_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = ARREADY; -wire _guard94 = arvalid_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = ~_guard95; -wire _guard97 = do_ar_transfer_go_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = early_reset_static_par_go_out; -wire _guard100 = _guard98 | _guard99; -wire _guard101 = fsm_out == 1'd0; +wire _guard88 = signal_reg_out; +wire _guard89 = _guard0 & _guard0; +wire _guard90 = signal_reg_out; +wire _guard91 = ~_guard90; +wire _guard92 = _guard89 & _guard91; +wire _guard93 = wrapper_early_reset_static_par_thread_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = _guard88 | _guard94; +wire _guard96 = _guard0 & _guard0; +wire _guard97 = signal_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = wrapper_early_reset_static_par_thread_go_out; +wire _guard101 = _guard99 & _guard100; wire _guard102 = signal_reg_out; -wire _guard103 = _guard101 & _guard102; -wire _guard104 = fsm_out == 1'd0; -wire _guard105 = signal_reg_out; -wire _guard106 = ~_guard105; -wire _guard107 = _guard104 & _guard106; -wire _guard108 = wrapper_early_reset_static_par_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard103 | _guard109; -wire _guard111 = fsm_out == 1'd0; -wire _guard112 = signal_reg_out; +wire _guard103 = wrapper_early_reset_static_par_thread_go_out; +wire _guard104 = signal_reg_out; +wire _guard105 = do_ar_transfer_go_out; +wire _guard106 = invoke2_go_out; +wire _guard107 = _guard105 | _guard106; +wire _guard108 = arvalid_out; +wire _guard109 = ARREADY; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = ~_guard110; +wire _guard112 = ar_handshake_occurred_out; wire _guard113 = ~_guard112; wire _guard114 = _guard111 & _guard113; -wire _guard115 = wrapper_early_reset_static_par_go_out; +wire _guard115 = do_ar_transfer_go_out; wire _guard116 = _guard114 & _guard115; -wire _guard117 = fsm_out == 1'd0; -wire _guard118 = signal_reg_out; +wire _guard117 = arvalid_out; +wire _guard118 = ARREADY; wire _guard119 = _guard117 & _guard118; -wire _guard120 = do_ar_transfer_go_out; -wire _guard121 = invoke2_go_out; -wire _guard122 = _guard120 | _guard121; -wire _guard123 = arvalid_out; -wire _guard124 = ARREADY; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = ~_guard125; -wire _guard127 = ar_handshake_occurred_out; -wire _guard128 = ~_guard127; -wire _guard129 = _guard126 & _guard128; -wire _guard130 = do_ar_transfer_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = arvalid_out; -wire _guard133 = ARREADY; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = ar_handshake_occurred_out; -wire _guard136 = _guard134 | _guard135; -wire _guard137 = do_ar_transfer_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = invoke2_go_out; -wire _guard140 = _guard138 | _guard139; -wire _guard141 = fsm0_out == 2'd3; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard120 = ar_handshake_occurred_out; +wire _guard121 = _guard119 | _guard120; +wire _guard122 = do_ar_transfer_go_out; +wire _guard123 = _guard121 & _guard122; +wire _guard124 = invoke2_go_out; +wire _guard125 = _guard123 | _guard124; +wire _guard126 = fsm_out == 2'd3; assign do_ar_transfer_go_in = _guard6; assign done = _guard7; assign ARPROT = @@ -7139,62 +6847,51 @@ assign ARBURST = _guard12 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard13; +assign fsm_write_en = _guard31; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard17 ? adder_out : - _guard20 ? 1'd0 : - 1'd0; -assign adder_left = - _guard21 ? fsm_out : - 1'd0; -assign adder_right = _guard22; -assign ar_handshake_occurred_write_en = _guard28; + _guard36 ? 2'd1 : + _guard37 ? 2'd0 : + _guard42 ? 2'd3 : + _guard47 ? 2'd2 : + 2'd0; +assign ar_handshake_occurred_write_en = _guard53; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard33 ? 1'd1 : - _guard34 ? 1'd0 : + _guard58 ? 1'd1 : + _guard59 ? 1'd0 : 'x; -assign invoke2_go_in = _guard40; -assign wrapper_early_reset_static_par_go_in = _guard46; -assign wrapper_early_reset_static_par_done_in = _guard49; +assign invoke2_go_in = _guard65; +assign wrapper_early_reset_static_par_thread_go_in = _guard71; assign tdcc_go_in = go; -assign fsm0_write_en = _guard68; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard73 ? 2'd1 : - _guard74 ? 2'd0 : - _guard79 ? 2'd3 : - _guard84 ? 2'd2 : - 2'd0; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard87; +assign bt_reg_write_en = _guard74; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard92 ? 1'd1 : - _guard100 ? 1'd0 : + _guard79 ? 1'd1 : + _guard87 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard110; +assign signal_reg_write_en = _guard95; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard116 ? 1'd1 : - _guard119 ? 1'd0 : + _guard101 ? 1'd1 : + _guard102 ? 1'd0 : 1'd0; assign invoke2_done_in = arvalid_done; -assign arvalid_write_en = _guard122; +assign early_reset_static_par_thread_go_in = _guard103; +assign wrapper_early_reset_static_par_thread_done_in = _guard104; +assign arvalid_write_en = _guard107; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard131 ? 1'd1 : - _guard140 ? 1'd0 : + _guard116 ? 1'd1 : + _guard125 ? 1'd0 : 'x; -assign tdcc_done_in = _guard141; -assign early_reset_static_par_go_in = _guard142; +assign tdcc_done_in = _guard126; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; // COMPONENT END: m_ar_channel_Sum0 endmodule @@ -7232,15 +6929,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -7248,12 +6936,12 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; @@ -7262,14 +6950,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -7304,23 +6992,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -7338,13 +7009,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -7372,27 +7043,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -7413,142 +7084,126 @@ wire _guard3 = do_aw_transfer_go_out; wire _guard4 = do_aw_transfer_go_out; wire _guard5 = do_aw_transfer_go_out; wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = fsm_out == 1'd0; -wire _guard9 = ~_guard8; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = fsm_out == 1'd0; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = _guard12 & _guard13; -wire _guard15 = early_reset_static_par_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = invoke2_done_out; -wire _guard18 = ~_guard17; -wire _guard19 = fsm0_out == 2'd2; -wire _guard20 = _guard18 & _guard19; -wire _guard21 = tdcc_go_out; +wire _guard7 = fsm_out == 2'd3; +wire _guard8 = fsm_out == 2'd0; +wire _guard9 = wrapper_early_reset_static_par_thread_done_out; +wire _guard10 = _guard8 & _guard9; +wire _guard11 = tdcc_go_out; +wire _guard12 = _guard10 & _guard11; +wire _guard13 = _guard7 | _guard12; +wire _guard14 = fsm_out == 2'd1; +wire _guard15 = do_aw_transfer_done_out; +wire _guard16 = _guard14 & _guard15; +wire _guard17 = tdcc_go_out; +wire _guard18 = _guard16 & _guard17; +wire _guard19 = _guard13 | _guard18; +wire _guard20 = fsm_out == 2'd2; +wire _guard21 = invoke2_done_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = wrapper_early_reset_static_par_done_out; -wire _guard24 = ~_guard23; -wire _guard25 = fsm0_out == 2'd0; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = tdcc_go_out; +wire _guard23 = tdcc_go_out; +wire _guard24 = _guard22 & _guard23; +wire _guard25 = _guard19 | _guard24; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = wrapper_early_reset_static_par_thread_done_out; wire _guard28 = _guard26 & _guard27; -wire _guard29 = fsm_out == 1'd0; -wire _guard30 = signal_reg_out; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = fsm0_out == 2'd3; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = wrapper_early_reset_static_par_done_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = tdcc_go_out; -wire _guard37 = _guard35 & _guard36; -wire _guard38 = _guard32 | _guard37; -wire _guard39 = fsm0_out == 2'd1; -wire _guard40 = do_aw_transfer_done_out; +wire _guard29 = tdcc_go_out; +wire _guard30 = _guard28 & _guard29; +wire _guard31 = fsm_out == 2'd3; +wire _guard32 = fsm_out == 2'd2; +wire _guard33 = invoke2_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = fsm_out == 2'd1; +wire _guard38 = do_aw_transfer_done_out; +wire _guard39 = _guard37 & _guard38; +wire _guard40 = tdcc_go_out; wire _guard41 = _guard39 & _guard40; -wire _guard42 = tdcc_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard38 | _guard43; -wire _guard45 = fsm0_out == 2'd2; -wire _guard46 = invoke2_done_out; +wire _guard42 = invoke2_done_out; +wire _guard43 = ~_guard42; +wire _guard44 = fsm_out == 2'd2; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = tdcc_go_out; wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = _guard44 | _guard49; -wire _guard51 = fsm0_out == 2'd0; -wire _guard52 = wrapper_early_reset_static_par_done_out; +wire _guard48 = wrapper_early_reset_static_par_thread_done_out; +wire _guard49 = ~_guard48; +wire _guard50 = fsm_out == 2'd0; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = tdcc_go_out; wire _guard53 = _guard51 & _guard52; -wire _guard54 = tdcc_go_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = fsm0_out == 2'd3; -wire _guard57 = fsm0_out == 2'd2; -wire _guard58 = invoke2_done_out; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = ~_guard54; +wire _guard56 = fsm_out == 2'd1; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = tdcc_go_out; wire _guard59 = _guard57 & _guard58; -wire _guard60 = tdcc_go_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = fsm0_out == 2'd1; -wire _guard63 = do_aw_transfer_done_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = tdcc_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = do_aw_transfer_done_out; -wire _guard68 = ~_guard67; -wire _guard69 = fsm0_out == 2'd1; +wire _guard60 = do_aw_transfer_go_out; +wire _guard61 = early_reset_static_par_thread_go_out; +wire _guard62 = _guard60 | _guard61; +wire _guard63 = AWREADY; +wire _guard64 = awvalid_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = do_aw_transfer_go_out; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = AWREADY; +wire _guard69 = awvalid_out; wire _guard70 = _guard68 & _guard69; -wire _guard71 = tdcc_go_out; -wire _guard72 = _guard70 & _guard71; -wire _guard73 = do_aw_transfer_go_out; -wire _guard74 = early_reset_static_par_go_out; +wire _guard71 = ~_guard70; +wire _guard72 = do_aw_transfer_go_out; +wire _guard73 = _guard71 & _guard72; +wire _guard74 = early_reset_static_par_thread_go_out; wire _guard75 = _guard73 | _guard74; -wire _guard76 = AWREADY; -wire _guard77 = awvalid_out; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = do_aw_transfer_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = AWREADY; -wire _guard82 = awvalid_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = ~_guard83; -wire _guard85 = do_aw_transfer_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = _guard86 | _guard87; -wire _guard89 = fsm_out == 1'd0; +wire _guard76 = signal_reg_out; +wire _guard77 = _guard0 & _guard0; +wire _guard78 = signal_reg_out; +wire _guard79 = ~_guard78; +wire _guard80 = _guard77 & _guard79; +wire _guard81 = wrapper_early_reset_static_par_thread_go_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = _guard76 | _guard82; +wire _guard84 = _guard0 & _guard0; +wire _guard85 = signal_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = _guard87 & _guard88; wire _guard90 = signal_reg_out; -wire _guard91 = _guard89 & _guard90; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard91 = wrapper_early_reset_static_par_thread_go_out; +wire _guard92 = signal_reg_out; +wire _guard93 = aw_handshake_occurred_out; wire _guard94 = ~_guard93; -wire _guard95 = _guard92 & _guard94; -wire _guard96 = wrapper_early_reset_static_par_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = _guard91 | _guard97; -wire _guard99 = fsm_out == 1'd0; -wire _guard100 = signal_reg_out; -wire _guard101 = ~_guard100; -wire _guard102 = _guard99 & _guard101; -wire _guard103 = wrapper_early_reset_static_par_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 1'd0; -wire _guard106 = signal_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = aw_handshake_occurred_out; -wire _guard109 = ~_guard108; -wire _guard110 = do_aw_transfer_go_out; +wire _guard95 = do_aw_transfer_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = early_reset_static_par_thread_go_out; +wire _guard98 = _guard96 | _guard97; +wire _guard99 = awvalid_out; +wire _guard100 = AWREADY; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = do_aw_transfer_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = early_reset_static_par_thread_go_out; +wire _guard105 = fsm_out == 2'd3; +wire _guard106 = do_aw_transfer_go_out; +wire _guard107 = invoke2_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = awvalid_out; +wire _guard110 = AWREADY; wire _guard111 = _guard109 & _guard110; -wire _guard112 = early_reset_static_par_go_out; -wire _guard113 = _guard111 | _guard112; -wire _guard114 = awvalid_out; -wire _guard115 = AWREADY; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = do_aw_transfer_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = early_reset_static_par_go_out; -wire _guard120 = fsm0_out == 2'd3; -wire _guard121 = do_aw_transfer_go_out; -wire _guard122 = invoke2_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = awvalid_out; -wire _guard125 = AWREADY; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = aw_handshake_occurred_out; -wire _guard129 = ~_guard128; -wire _guard130 = _guard127 & _guard129; -wire _guard131 = do_aw_transfer_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = awvalid_out; -wire _guard134 = AWREADY; -wire _guard135 = _guard133 & _guard134; -wire _guard136 = aw_handshake_occurred_out; -wire _guard137 = _guard135 | _guard136; -wire _guard138 = do_aw_transfer_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = invoke2_go_out; -wire _guard141 = _guard139 | _guard140; -wire _guard142 = wrapper_early_reset_static_par_go_out; +wire _guard112 = ~_guard111; +wire _guard113 = aw_handshake_occurred_out; +wire _guard114 = ~_guard113; +wire _guard115 = _guard112 & _guard114; +wire _guard116 = do_aw_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = awvalid_out; +wire _guard119 = AWREADY; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = aw_handshake_occurred_out; +wire _guard122 = _guard120 | _guard121; +wire _guard123 = do_aw_transfer_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = invoke2_go_out; +wire _guard126 = _guard124 | _guard125; assign done = _guard1; assign AWADDR = _guard2 ? axi_address : @@ -7566,64 +7221,53 @@ assign AWBURST = assign AWLEN = _guard6 ? 8'd0 : 8'd0; -assign fsm_write_en = _guard7; +assign fsm_write_en = _guard25; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard11 ? adder_out : - _guard14 ? 1'd0 : - 1'd0; -assign adder_left = - _guard15 ? fsm_out : - 1'd0; -assign adder_right = _guard16; -assign invoke2_go_in = _guard22; -assign wrapper_early_reset_static_par_go_in = _guard28; -assign wrapper_early_reset_static_par_done_in = _guard31; -assign tdcc_go_in = go; -assign fsm0_write_en = _guard50; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard55 ? 2'd1 : - _guard56 ? 2'd0 : - _guard61 ? 2'd3 : - _guard66 ? 2'd2 : + _guard30 ? 2'd1 : + _guard31 ? 2'd0 : + _guard36 ? 2'd3 : + _guard41 ? 2'd2 : 2'd0; -assign do_aw_transfer_go_in = _guard72; +assign invoke2_go_in = _guard47; +assign wrapper_early_reset_static_par_thread_go_in = _guard53; +assign tdcc_go_in = go; +assign do_aw_transfer_go_in = _guard59; assign do_aw_transfer_done_in = bt_reg_out; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard75; +assign bt_reg_write_en = _guard62; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard80 ? 1'd1 : - _guard88 ? 1'd0 : + _guard67 ? 1'd1 : + _guard75 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard98; +assign signal_reg_write_en = _guard83; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard104 ? 1'd1 : - _guard107 ? 1'd0 : + _guard89 ? 1'd1 : + _guard90 ? 1'd0 : 1'd0; assign invoke2_done_in = awvalid_done; -assign aw_handshake_occurred_write_en = _guard113; +assign early_reset_static_par_thread_go_in = _guard91; +assign wrapper_early_reset_static_par_thread_done_in = _guard92; +assign aw_handshake_occurred_write_en = _guard98; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard118 ? 1'd1 : - _guard119 ? 1'd0 : + _guard103 ? 1'd1 : + _guard104 ? 1'd0 : 'x; -assign tdcc_done_in = _guard120; -assign awvalid_write_en = _guard123; +assign tdcc_done_in = _guard105; +assign awvalid_write_en = _guard108; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard132 ? 1'd1 : - _guard141 ? 1'd0 : + _guard117 ? 1'd1 : + _guard126 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard142; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_aw_channel_Sum0 endmodule module m_read_channel_Sum0( @@ -7942,15 +7586,6 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -7958,24 +7593,24 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -8010,23 +7645,6 @@ std_reg # ( .reset(bt_reg_reset), .write_en(bt_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) ) ud ( @@ -8044,13 +7662,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -8066,27 +7684,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -8104,189 +7722,162 @@ wire _guard0 = 1; wire _guard1 = tdcc_done_out; wire _guard2 = service_write_transfer_go_out; wire _guard3 = service_write_transfer_go_out; -wire _guard4 = early_reset_static_par_go_out; -wire _guard5 = fsm_out == 1'd0; -wire _guard6 = ~_guard5; -wire _guard7 = early_reset_static_par_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = fsm_out == 1'd0; -wire _guard10 = early_reset_static_par_go_out; -wire _guard11 = _guard9 & _guard10; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = early_reset_static_par_go_out; -wire _guard14 = service_write_transfer_go_out; -wire _guard15 = wvalid_out; -wire _guard16 = WREADY; -wire _guard17 = _guard15 & _guard16; -wire _guard18 = ~_guard17; -wire _guard19 = w_handshake_occurred_out; -wire _guard20 = ~_guard19; -wire _guard21 = _guard18 & _guard20; -wire _guard22 = service_write_transfer_go_out; -wire _guard23 = _guard21 & _guard22; -wire _guard24 = wvalid_out; -wire _guard25 = WREADY; -wire _guard26 = _guard24 & _guard25; -wire _guard27 = w_handshake_occurred_out; -wire _guard28 = _guard26 | _guard27; -wire _guard29 = service_write_transfer_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = wrapper_early_reset_static_par_done_out; -wire _guard32 = ~_guard31; -wire _guard33 = fsm0_out == 2'd0; -wire _guard34 = _guard32 & _guard33; -wire _guard35 = tdcc_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = signal_reg_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = fsm0_out == 2'd2; -wire _guard41 = fsm0_out == 2'd0; -wire _guard42 = wrapper_early_reset_static_par_done_out; +wire _guard4 = fsm_out == 2'd2; +wire _guard5 = fsm_out == 2'd0; +wire _guard6 = wrapper_early_reset_static_par_thread_done_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = tdcc_go_out; +wire _guard9 = _guard7 & _guard8; +wire _guard10 = _guard4 | _guard9; +wire _guard11 = fsm_out == 2'd1; +wire _guard12 = service_write_transfer_done_out; +wire _guard13 = _guard11 & _guard12; +wire _guard14 = tdcc_go_out; +wire _guard15 = _guard13 & _guard14; +wire _guard16 = _guard10 | _guard15; +wire _guard17 = fsm_out == 2'd0; +wire _guard18 = wrapper_early_reset_static_par_thread_done_out; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = fsm_out == 2'd2; +wire _guard23 = fsm_out == 2'd1; +wire _guard24 = service_write_transfer_done_out; +wire _guard25 = _guard23 & _guard24; +wire _guard26 = tdcc_go_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = wrapper_early_reset_static_par_thread_done_out; +wire _guard29 = ~_guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; +wire _guard33 = _guard31 & _guard32; +wire _guard34 = service_write_transfer_go_out; +wire _guard35 = wvalid_out; +wire _guard36 = WREADY; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = ~_guard37; +wire _guard39 = w_handshake_occurred_out; +wire _guard40 = ~_guard39; +wire _guard41 = _guard38 & _guard40; +wire _guard42 = service_write_transfer_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm0_out == 2'd1; -wire _guard48 = service_write_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm0_out == 2'd0; -wire _guard54 = wrapper_early_reset_static_par_done_out; -wire _guard55 = _guard53 & _guard54; -wire _guard56 = tdcc_go_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = fsm0_out == 2'd2; -wire _guard59 = fsm0_out == 2'd1; -wire _guard60 = service_write_transfer_done_out; -wire _guard61 = _guard59 & _guard60; -wire _guard62 = tdcc_go_out; -wire _guard63 = _guard61 & _guard62; -wire _guard64 = service_write_transfer_done_out; -wire _guard65 = ~_guard64; -wire _guard66 = fsm0_out == 2'd1; +wire _guard44 = wvalid_out; +wire _guard45 = WREADY; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = w_handshake_occurred_out; +wire _guard48 = _guard46 | _guard47; +wire _guard49 = service_write_transfer_go_out; +wire _guard50 = _guard48 & _guard49; +wire _guard51 = service_write_transfer_done_out; +wire _guard52 = ~_guard51; +wire _guard53 = fsm_out == 2'd1; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = tdcc_go_out; +wire _guard56 = _guard54 & _guard55; +wire _guard57 = service_write_transfer_go_out; +wire _guard58 = early_reset_static_par_thread_go_out; +wire _guard59 = _guard57 | _guard58; +wire _guard60 = wvalid_out; +wire _guard61 = WREADY; +wire _guard62 = _guard60 & _guard61; +wire _guard63 = service_write_transfer_go_out; +wire _guard64 = _guard62 & _guard63; +wire _guard65 = wvalid_out; +wire _guard66 = WREADY; wire _guard67 = _guard65 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = service_write_transfer_go_out; -wire _guard71 = early_reset_static_par_go_out; +wire _guard68 = ~_guard67; +wire _guard69 = service_write_transfer_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = early_reset_static_par_thread_go_out; wire _guard72 = _guard70 | _guard71; -wire _guard73 = wvalid_out; -wire _guard74 = WREADY; -wire _guard75 = _guard73 & _guard74; -wire _guard76 = service_write_transfer_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = ~_guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = _guard83 | _guard84; -wire _guard86 = fsm_out == 1'd0; +wire _guard73 = signal_reg_out; +wire _guard74 = _guard0 & _guard0; +wire _guard75 = signal_reg_out; +wire _guard76 = ~_guard75; +wire _guard77 = _guard74 & _guard76; +wire _guard78 = wrapper_early_reset_static_par_thread_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard73 | _guard79; +wire _guard81 = _guard0 & _guard0; +wire _guard82 = signal_reg_out; +wire _guard83 = ~_guard82; +wire _guard84 = _guard81 & _guard83; +wire _guard85 = wrapper_early_reset_static_par_thread_go_out; +wire _guard86 = _guard84 & _guard85; wire _guard87 = signal_reg_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm_out == 1'd0; -wire _guard90 = signal_reg_out; +wire _guard88 = wrapper_early_reset_static_par_thread_go_out; +wire _guard89 = signal_reg_out; +wire _guard90 = w_handshake_occurred_out; wire _guard91 = ~_guard90; -wire _guard92 = _guard89 & _guard91; -wire _guard93 = wrapper_early_reset_static_par_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard88 | _guard94; -wire _guard96 = fsm_out == 1'd0; -wire _guard97 = signal_reg_out; -wire _guard98 = ~_guard97; -wire _guard99 = _guard96 & _guard98; -wire _guard100 = wrapper_early_reset_static_par_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = fsm_out == 1'd0; -wire _guard103 = signal_reg_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = w_handshake_occurred_out; -wire _guard106 = ~_guard105; -wire _guard107 = service_write_transfer_go_out; -wire _guard108 = _guard106 & _guard107; -wire _guard109 = early_reset_static_par_go_out; -wire _guard110 = _guard108 | _guard109; -wire _guard111 = wvalid_out; -wire _guard112 = WREADY; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = service_write_transfer_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = wvalid_out; -wire _guard117 = WREADY; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = ~_guard118; -wire _guard120 = service_write_transfer_go_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = early_reset_static_par_go_out; -wire _guard123 = _guard121 | _guard122; -wire _guard124 = fsm0_out == 2'd2; -wire _guard125 = wrapper_early_reset_static_par_go_out; +wire _guard92 = service_write_transfer_go_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = early_reset_static_par_thread_go_out; +wire _guard95 = _guard93 | _guard94; +wire _guard96 = wvalid_out; +wire _guard97 = WREADY; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = service_write_transfer_go_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = wvalid_out; +wire _guard102 = WREADY; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = ~_guard103; +wire _guard105 = service_write_transfer_go_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = early_reset_static_par_thread_go_out; +wire _guard108 = _guard106 | _guard107; +wire _guard109 = fsm_out == 2'd2; assign done = _guard1; assign WVALID = wvalid_out; assign WDATA = _guard2 ? write_data : 32'd0; assign WLAST = _guard3; -assign fsm_write_en = _guard4; +assign fsm_write_en = _guard16; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard8 ? adder_out : - _guard11 ? 1'd0 : - 1'd0; -assign adder_left = - _guard12 ? fsm_out : - 1'd0; -assign adder_right = _guard13; -assign wvalid_write_en = _guard14; + _guard21 ? 2'd1 : + _guard22 ? 2'd0 : + _guard27 ? 2'd2 : + 2'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard33; +assign wvalid_write_en = _guard34; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard23 ? 1'd1 : - _guard30 ? 1'd0 : + _guard43 ? 1'd1 : + _guard50 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard36; -assign wrapper_early_reset_static_par_done_in = _guard39; assign tdcc_go_in = go; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard52; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard57 ? 2'd1 : - _guard58 ? 2'd0 : - _guard63 ? 2'd2 : - 2'd0; -assign service_write_transfer_go_in = _guard69; -assign early_reset_static_par_done_in = ud_out; -assign bt_reg_write_en = _guard72; +assign service_write_transfer_go_in = _guard56; +assign bt_reg_write_en = _guard59; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard77 ? 1'd1 : - _guard85 ? 1'd0 : + _guard64 ? 1'd1 : + _guard72 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard95; +assign signal_reg_write_en = _guard80; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard101 ? 1'd1 : - _guard104 ? 1'd0 : + _guard86 ? 1'd1 : + _guard87 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard110; +assign early_reset_static_par_thread_go_in = _guard88; +assign wrapper_early_reset_static_par_thread_done_in = _guard89; +assign w_handshake_occurred_write_en = _guard95; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard115 ? 1'd1 : - _guard123 ? 1'd0 : + _guard100 ? 1'd1 : + _guard108 ? 1'd0 : 'x; -assign tdcc_done_in = _guard124; -assign early_reset_static_par_go_in = _guard125; +assign tdcc_done_in = _guard109; +assign early_reset_static_par_thread_done_in = ud_out; // COMPONENT END: m_write_channel_Sum0 endmodule module m_bresp_channel_Sum0( @@ -9514,6 +9105,7 @@ assign invoke1_done_in = read_controller_Sum0_done; // COMPONENT END: axi_dyn_mem_Sum0 endmodule module wrapper( + input logic ap_clk, input logic A0_ARESETn, input logic A0_ARREADY, input logic A0_RVALID, @@ -9608,7 +9200,6 @@ module wrapper( output logic Sum0_WID, output logic Sum0_BID, input logic go, - input logic clk, input logic reset, output logic done ); @@ -9916,7 +9507,7 @@ assign axi_dyn_mem_A0_write_en = _guard1 ? main_compute_A0_write_en : 1'd0; assign axi_dyn_mem_A0_RDATA = A0_RDATA; -assign axi_dyn_mem_A0_clk = clk; +assign axi_dyn_mem_A0_clk = ap_clk; assign axi_dyn_mem_A0_addr0 = _guard2 ? main_compute_A0_addr0 : 3'd0; @@ -9936,7 +9527,7 @@ assign axi_dyn_mem_Sum0_write_en = _guard4 ? main_compute_Sum0_write_en : 1'd0; assign axi_dyn_mem_Sum0_RDATA = Sum0_RDATA; -assign axi_dyn_mem_Sum0_clk = clk; +assign axi_dyn_mem_Sum0_clk = ap_clk; assign axi_dyn_mem_Sum0_addr0 = _guard5 ? main_compute_Sum0_addr0 : 3'd0; @@ -10022,7 +9613,7 @@ assign main_compute_B0_read_data = assign main_compute_Sum0_done = _guard11 ? axi_dyn_mem_Sum0_done : 1'd0; -assign main_compute_clk = clk; +assign main_compute_clk = ap_clk; assign main_compute_B0_done = _guard12 ? axi_dyn_mem_B0_done : 1'd0; @@ -10040,7 +9631,7 @@ assign axi_dyn_mem_B0_write_en = _guard15 ? main_compute_B0_write_en : 1'd0; assign axi_dyn_mem_B0_RDATA = B0_RDATA; -assign axi_dyn_mem_B0_clk = clk; +assign axi_dyn_mem_B0_clk = ap_clk; assign axi_dyn_mem_B0_addr0 = _guard16 ? main_compute_B0_addr0 : 3'd0; @@ -10118,52 +9709,43 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic ud_out; +logic ud0_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [2:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [2:0] fsm2_out; -logic fsm2_done; +logic [2:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [2:0] fsm1_out; +logic fsm1_done; logic beg_spl_upd0_go_in; logic beg_spl_upd0_go_out; logic beg_spl_upd0_done_in; @@ -10192,14 +9774,14 @@ logic invoke3_go_in; logic invoke3_go_out; logic invoke3_done_in; logic invoke3_done_out; -logic early_reset_cond00_go_in; -logic early_reset_cond00_go_out; -logic early_reset_cond00_done_in; -logic early_reset_cond00_done_out; -logic wrapper_early_reset_cond00_go_in; -logic wrapper_early_reset_cond00_go_out; -logic wrapper_early_reset_cond00_done_in; -logic wrapper_early_reset_cond00_done_out; +logic early_reset_cond000_go_in; +logic early_reset_cond000_go_out; +logic early_reset_cond000_done_in; +logic early_reset_cond000_done_out; +logic wrapper_early_reset_cond000_go_in; +logic wrapper_early_reset_cond000_go_out; +logic wrapper_early_reset_cond000_done_in; +logic wrapper_early_reset_cond000_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -10304,27 +9886,10 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) -) ud ( - .out(ud_out) +) ud0 ( + .out(ud0_out) ); std_reg # ( .WIDTH(1) @@ -10338,13 +9903,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -10358,13 +9923,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -10378,13 +9943,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_wire # ( .WIDTH(1) @@ -10472,27 +10037,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_cond00_go ( - .in(early_reset_cond00_go_in), - .out(early_reset_cond00_go_out) +) early_reset_cond000_go ( + .in(early_reset_cond000_go_in), + .out(early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_cond00_done ( - .in(early_reset_cond00_done_in), - .out(early_reset_cond00_done_out) +) early_reset_cond000_done ( + .in(early_reset_cond000_done_in), + .out(early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_go ( - .in(wrapper_early_reset_cond00_go_in), - .out(wrapper_early_reset_cond00_go_out) +) wrapper_early_reset_cond000_go ( + .in(wrapper_early_reset_cond000_go_in), + .out(wrapper_early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_done ( - .in(wrapper_early_reset_cond00_done_in), - .out(wrapper_early_reset_cond00_done_out) +) wrapper_early_reset_cond000_done ( + .in(wrapper_early_reset_cond000_done_in), + .out(wrapper_early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) @@ -10548,260 +10113,260 @@ wire _guard2 = invoke3_go_out; wire _guard3 = _guard1 | _guard2; wire _guard4 = invoke3_go_out; wire _guard5 = invoke0_go_out; -wire _guard6 = wrapper_early_reset_cond00_go_out; +wire _guard6 = invoke3_go_out; wire _guard7 = invoke3_go_out; -wire _guard8 = invoke3_go_out; -wire _guard9 = tdcc1_done_out; -wire _guard10 = upd2_go_out; +wire _guard8 = tdcc1_done_out; +wire _guard9 = upd2_go_out; +wire _guard10 = beg_spl_upd1_go_out; wire _guard11 = beg_spl_upd1_go_out; -wire _guard12 = beg_spl_upd1_go_out; -wire _guard13 = beg_spl_upd0_go_out; +wire _guard12 = beg_spl_upd0_go_out; +wire _guard13 = upd2_go_out; wire _guard14 = upd2_go_out; wire _guard15 = upd2_go_out; -wire _guard16 = upd2_go_out; -wire _guard17 = beg_spl_upd0_go_out; -wire _guard18 = early_reset_cond00_go_out; -wire _guard19 = fsm_out == 1'd0; -wire _guard20 = ~_guard19; -wire _guard21 = early_reset_cond00_go_out; +wire _guard16 = beg_spl_upd0_go_out; +wire _guard17 = fsm_out == 2'd2; +wire _guard18 = fsm_out == 2'd0; +wire _guard19 = beg_spl_upd0_done_out; +wire _guard20 = _guard18 & _guard19; +wire _guard21 = tdcc_go_out; wire _guard22 = _guard20 & _guard21; -wire _guard23 = fsm_out == 1'd0; -wire _guard24 = early_reset_cond00_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = early_reset_cond00_go_out; -wire _guard27 = early_reset_cond00_go_out; -wire _guard28 = beg_spl_upd0_done_out; -wire _guard29 = ~_guard28; -wire _guard30 = fsm0_out == 2'd0; -wire _guard31 = _guard29 & _guard30; -wire _guard32 = tdcc_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = upd2_go_out; -wire _guard35 = upd2_go_out; -wire _guard36 = invoke2_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm1_out == 2'd1; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc0_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = fsm1_out == 2'd2; -wire _guard43 = early_reset_cond00_go_out; -wire _guard44 = early_reset_cond00_go_out; -wire _guard45 = fsm1_out == 2'd2; -wire _guard46 = fsm1_out == 2'd0; -wire _guard47 = beg_spl_upd1_done_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = tdcc0_go_out; -wire _guard50 = _guard48 & _guard49; -wire _guard51 = _guard45 | _guard50; -wire _guard52 = fsm1_out == 2'd1; -wire _guard53 = invoke2_done_out; +wire _guard23 = _guard17 | _guard22; +wire _guard24 = fsm_out == 2'd1; +wire _guard25 = invoke1_done_out; +wire _guard26 = _guard24 & _guard25; +wire _guard27 = tdcc_go_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = _guard23 | _guard28; +wire _guard30 = fsm_out == 2'd0; +wire _guard31 = beg_spl_upd0_done_out; +wire _guard32 = _guard30 & _guard31; +wire _guard33 = tdcc_go_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = fsm_out == 2'd2; +wire _guard36 = fsm_out == 2'd1; +wire _guard37 = invoke1_done_out; +wire _guard38 = _guard36 & _guard37; +wire _guard39 = tdcc_go_out; +wire _guard40 = _guard38 & _guard39; +wire _guard41 = beg_spl_upd0_done_out; +wire _guard42 = ~_guard41; +wire _guard43 = fsm_out == 2'd0; +wire _guard44 = _guard42 & _guard43; +wire _guard45 = tdcc_go_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = upd2_go_out; +wire _guard48 = upd2_go_out; +wire _guard49 = invoke2_done_out; +wire _guard50 = ~_guard49; +wire _guard51 = fsm0_out == 2'd1; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = tdcc0_go_out; wire _guard54 = _guard52 & _guard53; -wire _guard55 = tdcc0_go_out; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = _guard51 | _guard56; -wire _guard58 = fsm1_out == 2'd0; -wire _guard59 = beg_spl_upd1_done_out; -wire _guard60 = _guard58 & _guard59; -wire _guard61 = tdcc0_go_out; -wire _guard62 = _guard60 & _guard61; -wire _guard63 = fsm1_out == 2'd2; -wire _guard64 = fsm1_out == 2'd1; -wire _guard65 = invoke2_done_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = tdcc0_go_out; -wire _guard68 = _guard66 & _guard67; -wire _guard69 = pd_out; -wire _guard70 = tdcc_done_out; -wire _guard71 = _guard69 | _guard70; -wire _guard72 = ~_guard71; -wire _guard73 = par0_go_out; +wire _guard55 = fsm0_out == 2'd2; +wire _guard56 = early_reset_cond000_go_out; +wire _guard57 = early_reset_cond000_go_out; +wire _guard58 = wrapper_early_reset_cond000_done_out; +wire _guard59 = ~_guard58; +wire _guard60 = fsm1_out == 3'd1; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = tdcc1_go_out; +wire _guard63 = _guard61 & _guard62; +wire _guard64 = wrapper_early_reset_cond000_done_out; +wire _guard65 = ~_guard64; +wire _guard66 = fsm1_out == 3'd5; +wire _guard67 = _guard65 & _guard66; +wire _guard68 = tdcc1_go_out; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = _guard63 | _guard69; +wire _guard71 = fsm1_out == 3'd6; +wire _guard72 = fsm1_out == 3'd0; +wire _guard73 = invoke0_done_out; wire _guard74 = _guard72 & _guard73; -wire _guard75 = invoke0_done_out; -wire _guard76 = ~_guard75; -wire _guard77 = fsm2_out == 3'd0; -wire _guard78 = _guard76 & _guard77; -wire _guard79 = tdcc1_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = fsm0_out == 2'd2; -wire _guard82 = fsm0_out == 2'd0; -wire _guard83 = beg_spl_upd0_done_out; +wire _guard75 = tdcc1_go_out; +wire _guard76 = _guard74 & _guard75; +wire _guard77 = _guard71 | _guard76; +wire _guard78 = fsm1_out == 3'd1; +wire _guard79 = wrapper_early_reset_cond000_done_out; +wire _guard80 = comb_reg_out; +wire _guard81 = _guard79 & _guard80; +wire _guard82 = _guard78 & _guard81; +wire _guard83 = tdcc1_go_out; wire _guard84 = _guard82 & _guard83; -wire _guard85 = tdcc_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard81 | _guard86; -wire _guard88 = fsm0_out == 2'd1; -wire _guard89 = invoke1_done_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = tdcc_go_out; +wire _guard85 = _guard77 | _guard84; +wire _guard86 = fsm1_out == 3'd5; +wire _guard87 = wrapper_early_reset_cond000_done_out; +wire _guard88 = comb_reg_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = _guard86 & _guard89; +wire _guard91 = tdcc1_go_out; wire _guard92 = _guard90 & _guard91; -wire _guard93 = _guard87 | _guard92; -wire _guard94 = fsm0_out == 2'd0; -wire _guard95 = beg_spl_upd0_done_out; +wire _guard93 = _guard85 | _guard92; +wire _guard94 = fsm1_out == 3'd2; +wire _guard95 = par0_done_out; wire _guard96 = _guard94 & _guard95; -wire _guard97 = tdcc_go_out; +wire _guard97 = tdcc1_go_out; wire _guard98 = _guard96 & _guard97; -wire _guard99 = fsm0_out == 2'd2; -wire _guard100 = fsm0_out == 2'd1; -wire _guard101 = invoke1_done_out; +wire _guard99 = _guard93 | _guard98; +wire _guard100 = fsm1_out == 3'd3; +wire _guard101 = upd2_done_out; wire _guard102 = _guard100 & _guard101; -wire _guard103 = tdcc_go_out; +wire _guard103 = tdcc1_go_out; wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm2_out == 3'd6; -wire _guard106 = fsm2_out == 3'd0; -wire _guard107 = invoke0_done_out; +wire _guard105 = _guard99 | _guard104; +wire _guard106 = fsm1_out == 3'd4; +wire _guard107 = invoke3_done_out; wire _guard108 = _guard106 & _guard107; wire _guard109 = tdcc1_go_out; wire _guard110 = _guard108 & _guard109; wire _guard111 = _guard105 | _guard110; -wire _guard112 = fsm2_out == 3'd1; -wire _guard113 = wrapper_early_reset_cond00_done_out; +wire _guard112 = fsm1_out == 3'd1; +wire _guard113 = wrapper_early_reset_cond000_done_out; wire _guard114 = comb_reg_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = _guard112 & _guard115; -wire _guard117 = tdcc1_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard111 | _guard118; -wire _guard120 = fsm2_out == 3'd5; -wire _guard121 = wrapper_early_reset_cond00_done_out; -wire _guard122 = comb_reg_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard120 & _guard123; -wire _guard125 = tdcc1_go_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = _guard119 | _guard126; -wire _guard128 = fsm2_out == 3'd2; -wire _guard129 = par0_done_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = tdcc1_go_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = _guard127 | _guard132; -wire _guard134 = fsm2_out == 3'd3; -wire _guard135 = upd2_done_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = tdcc1_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = _guard133 | _guard138; -wire _guard140 = fsm2_out == 3'd4; -wire _guard141 = invoke3_done_out; -wire _guard142 = _guard140 & _guard141; -wire _guard143 = tdcc1_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = _guard139 | _guard144; -wire _guard146 = fsm2_out == 3'd1; -wire _guard147 = wrapper_early_reset_cond00_done_out; -wire _guard148 = comb_reg_out; -wire _guard149 = ~_guard148; -wire _guard150 = _guard147 & _guard149; -wire _guard151 = _guard146 & _guard150; -wire _guard152 = tdcc1_go_out; -wire _guard153 = _guard151 & _guard152; -wire _guard154 = _guard145 | _guard153; -wire _guard155 = fsm2_out == 3'd5; -wire _guard156 = wrapper_early_reset_cond00_done_out; -wire _guard157 = comb_reg_out; -wire _guard158 = ~_guard157; -wire _guard159 = _guard156 & _guard158; -wire _guard160 = _guard155 & _guard159; -wire _guard161 = tdcc1_go_out; +wire _guard115 = ~_guard114; +wire _guard116 = _guard113 & _guard115; +wire _guard117 = _guard112 & _guard116; +wire _guard118 = tdcc1_go_out; +wire _guard119 = _guard117 & _guard118; +wire _guard120 = _guard111 | _guard119; +wire _guard121 = fsm1_out == 3'd5; +wire _guard122 = wrapper_early_reset_cond000_done_out; +wire _guard123 = comb_reg_out; +wire _guard124 = ~_guard123; +wire _guard125 = _guard122 & _guard124; +wire _guard126 = _guard121 & _guard125; +wire _guard127 = tdcc1_go_out; +wire _guard128 = _guard126 & _guard127; +wire _guard129 = _guard120 | _guard128; +wire _guard130 = fsm1_out == 3'd1; +wire _guard131 = wrapper_early_reset_cond000_done_out; +wire _guard132 = comb_reg_out; +wire _guard133 = ~_guard132; +wire _guard134 = _guard131 & _guard133; +wire _guard135 = _guard130 & _guard134; +wire _guard136 = tdcc1_go_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = fsm1_out == 3'd5; +wire _guard139 = wrapper_early_reset_cond000_done_out; +wire _guard140 = comb_reg_out; +wire _guard141 = ~_guard140; +wire _guard142 = _guard139 & _guard141; +wire _guard143 = _guard138 & _guard142; +wire _guard144 = tdcc1_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard137 | _guard145; +wire _guard147 = fsm1_out == 3'd4; +wire _guard148 = invoke3_done_out; +wire _guard149 = _guard147 & _guard148; +wire _guard150 = tdcc1_go_out; +wire _guard151 = _guard149 & _guard150; +wire _guard152 = fsm1_out == 3'd1; +wire _guard153 = wrapper_early_reset_cond000_done_out; +wire _guard154 = comb_reg_out; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = _guard152 & _guard155; +wire _guard157 = tdcc1_go_out; +wire _guard158 = _guard156 & _guard157; +wire _guard159 = fsm1_out == 3'd5; +wire _guard160 = wrapper_early_reset_cond000_done_out; +wire _guard161 = comb_reg_out; wire _guard162 = _guard160 & _guard161; -wire _guard163 = _guard154 | _guard162; -wire _guard164 = fsm2_out == 3'd1; -wire _guard165 = wrapper_early_reset_cond00_done_out; -wire _guard166 = comb_reg_out; -wire _guard167 = ~_guard166; -wire _guard168 = _guard165 & _guard167; -wire _guard169 = _guard164 & _guard168; +wire _guard163 = _guard159 & _guard162; +wire _guard164 = tdcc1_go_out; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard158 | _guard165; +wire _guard167 = fsm1_out == 3'd3; +wire _guard168 = upd2_done_out; +wire _guard169 = _guard167 & _guard168; wire _guard170 = tdcc1_go_out; wire _guard171 = _guard169 & _guard170; -wire _guard172 = fsm2_out == 3'd5; -wire _guard173 = wrapper_early_reset_cond00_done_out; -wire _guard174 = comb_reg_out; -wire _guard175 = ~_guard174; -wire _guard176 = _guard173 & _guard175; -wire _guard177 = _guard172 & _guard176; -wire _guard178 = tdcc1_go_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = _guard171 | _guard179; -wire _guard181 = fsm2_out == 3'd4; -wire _guard182 = invoke3_done_out; -wire _guard183 = _guard181 & _guard182; -wire _guard184 = tdcc1_go_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = fsm2_out == 3'd1; -wire _guard187 = wrapper_early_reset_cond00_done_out; -wire _guard188 = comb_reg_out; -wire _guard189 = _guard187 & _guard188; -wire _guard190 = _guard186 & _guard189; -wire _guard191 = tdcc1_go_out; +wire _guard172 = fsm1_out == 3'd6; +wire _guard173 = fsm1_out == 3'd0; +wire _guard174 = invoke0_done_out; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = tdcc1_go_out; +wire _guard177 = _guard175 & _guard176; +wire _guard178 = fsm1_out == 3'd2; +wire _guard179 = par0_done_out; +wire _guard180 = _guard178 & _guard179; +wire _guard181 = tdcc1_go_out; +wire _guard182 = _guard180 & _guard181; +wire _guard183 = pd_out; +wire _guard184 = tdcc_done_out; +wire _guard185 = _guard183 | _guard184; +wire _guard186 = ~_guard185; +wire _guard187 = par0_go_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = invoke0_done_out; +wire _guard190 = ~_guard189; +wire _guard191 = fsm1_out == 3'd0; wire _guard192 = _guard190 & _guard191; -wire _guard193 = fsm2_out == 3'd5; -wire _guard194 = wrapper_early_reset_cond00_done_out; -wire _guard195 = comb_reg_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = _guard193 & _guard196; -wire _guard198 = tdcc1_go_out; -wire _guard199 = _guard197 & _guard198; -wire _guard200 = _guard192 | _guard199; -wire _guard201 = fsm2_out == 3'd3; -wire _guard202 = upd2_done_out; -wire _guard203 = _guard201 & _guard202; -wire _guard204 = tdcc1_go_out; -wire _guard205 = _guard203 & _guard204; -wire _guard206 = fsm2_out == 3'd6; -wire _guard207 = fsm2_out == 3'd0; -wire _guard208 = invoke0_done_out; -wire _guard209 = _guard207 & _guard208; -wire _guard210 = tdcc1_go_out; -wire _guard211 = _guard209 & _guard210; -wire _guard212 = fsm2_out == 3'd2; -wire _guard213 = par0_done_out; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc1_go_out; +wire _guard193 = tdcc1_go_out; +wire _guard194 = _guard192 & _guard193; +wire _guard195 = fsm0_out == 2'd2; +wire _guard196 = fsm0_out == 2'd0; +wire _guard197 = beg_spl_upd1_done_out; +wire _guard198 = _guard196 & _guard197; +wire _guard199 = tdcc0_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = _guard195 | _guard200; +wire _guard202 = fsm0_out == 2'd1; +wire _guard203 = invoke2_done_out; +wire _guard204 = _guard202 & _guard203; +wire _guard205 = tdcc0_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = _guard201 | _guard206; +wire _guard208 = fsm0_out == 2'd0; +wire _guard209 = beg_spl_upd1_done_out; +wire _guard210 = _guard208 & _guard209; +wire _guard211 = tdcc0_go_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = fsm0_out == 2'd2; +wire _guard214 = fsm0_out == 2'd1; +wire _guard215 = invoke2_done_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = pd0_out; -wire _guard218 = tdcc0_done_out; -wire _guard219 = _guard217 | _guard218; -wire _guard220 = ~_guard219; -wire _guard221 = par0_go_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = pd_out; -wire _guard224 = pd0_out; +wire _guard217 = tdcc0_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = wrapper_early_reset_cond000_go_out; +wire _guard220 = pd0_out; +wire _guard221 = tdcc0_done_out; +wire _guard222 = _guard220 | _guard221; +wire _guard223 = ~_guard222; +wire _guard224 = par0_go_out; wire _guard225 = _guard223 & _guard224; -wire _guard226 = invoke1_done_out; -wire _guard227 = ~_guard226; -wire _guard228 = fsm0_out == 2'd1; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = tdcc_go_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = beg_spl_upd1_done_out; -wire _guard233 = ~_guard232; -wire _guard234 = fsm1_out == 2'd0; -wire _guard235 = _guard233 & _guard234; -wire _guard236 = tdcc0_go_out; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = early_reset_cond00_go_out; -wire _guard239 = early_reset_cond00_go_out; -wire _guard240 = fsm_out == 1'd0; +wire _guard226 = pd_out; +wire _guard227 = pd0_out; +wire _guard228 = _guard226 & _guard227; +wire _guard229 = invoke1_done_out; +wire _guard230 = ~_guard229; +wire _guard231 = fsm_out == 2'd1; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = tdcc_go_out; +wire _guard234 = _guard232 & _guard233; +wire _guard235 = beg_spl_upd1_done_out; +wire _guard236 = ~_guard235; +wire _guard237 = fsm0_out == 2'd0; +wire _guard238 = _guard236 & _guard237; +wire _guard239 = tdcc0_go_out; +wire _guard240 = _guard238 & _guard239; wire _guard241 = signal_reg_out; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = fsm_out == 1'd0; +wire _guard242 = early_reset_cond000_go_out; +wire _guard243 = early_reset_cond000_go_out; wire _guard244 = signal_reg_out; -wire _guard245 = ~_guard244; -wire _guard246 = _guard243 & _guard245; -wire _guard247 = wrapper_early_reset_cond00_go_out; -wire _guard248 = _guard246 & _guard247; -wire _guard249 = _guard242 | _guard248; -wire _guard250 = fsm_out == 1'd0; -wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_cond00_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = fsm_out == 1'd0; -wire _guard257 = signal_reg_out; -wire _guard258 = _guard256 & _guard257; -wire _guard259 = fsm2_out == 3'd6; +wire _guard245 = _guard0 & _guard0; +wire _guard246 = signal_reg_out; +wire _guard247 = ~_guard246; +wire _guard248 = _guard245 & _guard247; +wire _guard249 = wrapper_early_reset_cond000_go_out; +wire _guard250 = _guard248 & _guard249; +wire _guard251 = _guard244 | _guard250; +wire _guard252 = _guard0 & _guard0; +wire _guard253 = signal_reg_out; +wire _guard254 = ~_guard253; +wire _guard255 = _guard252 & _guard254; +wire _guard256 = wrapper_early_reset_cond000_go_out; +wire _guard257 = _guard255 & _guard256; +wire _guard258 = signal_reg_out; +wire _guard259 = fsm1_out == 3'd6; wire _guard260 = invoke2_go_out; wire _guard261 = invoke2_go_out; wire _guard262 = pd_out; @@ -10830,43 +10395,27 @@ wire _guard284 = _guard282 & _guard283; wire _guard285 = pd_out; wire _guard286 = pd0_out; wire _guard287 = _guard285 & _guard286; -wire _guard288 = wrapper_early_reset_cond00_done_out; -wire _guard289 = ~_guard288; -wire _guard290 = fsm2_out == 3'd1; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = tdcc1_go_out; -wire _guard293 = _guard291 & _guard292; -wire _guard294 = wrapper_early_reset_cond00_done_out; -wire _guard295 = ~_guard294; -wire _guard296 = fsm2_out == 3'd5; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = tdcc1_go_out; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = _guard293 | _guard299; -wire _guard301 = fsm_out == 1'd0; -wire _guard302 = signal_reg_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = fsm0_out == 2'd2; -wire _guard305 = upd2_done_out; -wire _guard306 = ~_guard305; -wire _guard307 = fsm2_out == 3'd3; +wire _guard288 = fsm_out == 2'd2; +wire _guard289 = upd2_done_out; +wire _guard290 = ~_guard289; +wire _guard291 = fsm1_out == 3'd3; +wire _guard292 = _guard290 & _guard291; +wire _guard293 = tdcc1_go_out; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = invoke3_done_out; +wire _guard296 = ~_guard295; +wire _guard297 = fsm1_out == 3'd4; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = tdcc1_go_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = invoke1_go_out; +wire _guard302 = invoke1_go_out; +wire _guard303 = par0_done_out; +wire _guard304 = ~_guard303; +wire _guard305 = fsm1_out == 3'd2; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = tdcc1_go_out; wire _guard308 = _guard306 & _guard307; -wire _guard309 = tdcc1_go_out; -wire _guard310 = _guard308 & _guard309; -wire _guard311 = invoke3_done_out; -wire _guard312 = ~_guard311; -wire _guard313 = fsm2_out == 3'd4; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = tdcc1_go_out; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = invoke1_go_out; -wire _guard318 = invoke1_go_out; -wire _guard319 = par0_done_out; -wire _guard320 = ~_guard319; -wire _guard321 = fsm2_out == 3'd2; -wire _guard322 = _guard320 & _guard321; -wire _guard323 = tdcc1_go_out; -wire _guard324 = _guard322 & _guard323; assign i0_write_en = _guard3; assign i0_clk = clk; assign i0_reset = reset; @@ -10875,92 +10424,83 @@ assign i0_in = _guard5 ? const0_out : 'x; assign upd2_done_in = Sum0_done; -assign early_reset_cond00_go_in = _guard6; assign add1_left = i0_out; assign add1_right = const2_out; -assign done = _guard9; +assign done = _guard8; assign B0_write_en = 1'd0; assign Sum0_addr0 = bit_slice_out; assign A0_write_en = 1'd0; assign B0_addr0 = bit_slice_out; -assign B0_content_en = _guard12; +assign B0_content_en = _guard11; assign A0_addr0 = bit_slice_out; -assign Sum0_write_en = _guard14; -assign Sum0_content_en = _guard15; +assign Sum0_write_en = _guard13; +assign Sum0_content_en = _guard14; assign Sum0_write_data = add0_out; -assign A0_content_en = _guard17; -assign fsm_write_en = _guard18; +assign A0_content_en = _guard16; +assign fsm_write_en = _guard29; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard22 ? adder_out : - _guard25 ? 1'd0 : - 1'd0; -assign adder_left = - _guard26 ? fsm_out : - 1'd0; -assign adder_right = _guard27; -assign beg_spl_upd0_go_in = _guard33; + _guard34 ? 2'd1 : + _guard35 ? 2'd0 : + _guard40 ? 2'd2 : + 2'd0; +assign beg_spl_upd0_go_in = _guard46; +assign early_reset_cond000_done_in = ud0_out; assign add0_left = B_read0_0_out; assign add0_right = A_read0_0_out; -assign invoke2_go_in = _guard41; -assign tdcc0_done_in = _guard42; -assign comb_reg_write_en = _guard43; +assign invoke2_go_in = _guard54; +assign tdcc0_done_in = _guard55; +assign comb_reg_write_en = _guard56; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard44 ? le0_out : + _guard57 ? le0_out : 1'd0; -assign early_reset_cond00_done_in = ud_out; -assign fsm1_write_en = _guard57; +assign wrapper_early_reset_cond000_go_in = _guard70; +assign fsm1_write_en = _guard129; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard62 ? 2'd1 : - _guard63 ? 2'd0 : - _guard68 ? 2'd2 : - 2'd0; -assign tdcc_go_in = _guard74; -assign invoke0_go_in = _guard80; + _guard146 ? 3'd6 : + _guard151 ? 3'd5 : + _guard166 ? 3'd2 : + _guard171 ? 3'd4 : + _guard172 ? 3'd0 : + _guard177 ? 3'd1 : + _guard182 ? 3'd3 : + 3'd0; +assign tdcc_go_in = _guard188; +assign invoke0_go_in = _guard194; assign beg_spl_upd0_done_in = A0_done; assign bit_slice_in = i0_out; -assign fsm0_write_en = _guard93; +assign fsm0_write_en = _guard207; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard98 ? 2'd1 : - _guard99 ? 2'd0 : - _guard104 ? 2'd2 : + _guard212 ? 2'd1 : + _guard213 ? 2'd0 : + _guard218 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard163; -assign fsm2_clk = clk; -assign fsm2_reset = reset; -assign fsm2_in = - _guard180 ? 3'd6 : - _guard185 ? 3'd5 : - _guard200 ? 3'd2 : - _guard205 ? 3'd4 : - _guard206 ? 3'd0 : - _guard211 ? 3'd1 : - _guard216 ? 3'd3 : - 3'd0; assign invoke3_done_in = i0_done; -assign tdcc0_go_in = _guard222; -assign par0_done_in = _guard225; +assign early_reset_cond000_go_in = _guard219; +assign tdcc0_go_in = _guard225; +assign par0_done_in = _guard228; assign invoke0_done_in = i0_done; -assign invoke1_go_in = _guard231; -assign beg_spl_upd1_go_in = _guard237; +assign invoke1_go_in = _guard234; +assign beg_spl_upd1_go_in = _guard240; +assign wrapper_early_reset_cond000_done_in = _guard241; assign le0_left = - _guard238 ? i0_out : + _guard242 ? i0_out : 4'd0; assign le0_right = - _guard239 ? const1_out : + _guard243 ? const1_out : 4'd0; -assign signal_reg_write_en = _guard249; +assign signal_reg_write_en = _guard251; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard255 ? 1'd1 : + _guard257 ? 1'd1 : _guard258 ? 1'd0 : 1'd0; assign invoke2_done_in = B_read0_0_done; @@ -10984,17 +10524,15 @@ assign pd0_in = _guard284 ? 1'd1 : _guard287 ? 1'd0 : 1'd0; -assign wrapper_early_reset_cond00_go_in = _guard300; -assign wrapper_early_reset_cond00_done_in = _guard303; -assign tdcc_done_in = _guard304; -assign upd2_go_in = _guard310; -assign invoke3_go_in = _guard316; +assign tdcc_done_in = _guard288; +assign upd2_go_in = _guard294; +assign invoke3_go_in = _guard300; assign invoke1_done_in = A_read0_0_done; assign tdcc1_go_in = go; -assign A_read0_0_write_en = _guard317; +assign A_read0_0_write_en = _guard301; assign A_read0_0_clk = clk; assign A_read0_0_reset = reset; assign A_read0_0_in = A0_read_data; -assign par0_go_in = _guard324; +assign par0_go_in = _guard308; // COMPONENT END: main endmodule diff --git a/yxi/tests/axi/dynamic/dyn-mem-vec-add.expect b/yxi/tests/axi/dynamic/dyn-mem-vec-add.expect index 122909aef1..99a50c73b1 100644 --- a/yxi/tests/axi/dynamic/dyn-mem-vec-add.expect +++ b/yxi/tests/axi/dynamic/dyn-mem-vec-add.expect @@ -670,7 +670,7 @@ component axi_dyn_mem_Sum0(@write_together(1) @data addr0: 3, @write_together(1) } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); axi_dyn_mem_A0 = axi_dyn_mem_A0(); diff --git a/yxi/tests/axi/dynamic/dyn-vec-add.expect b/yxi/tests/axi/dynamic/dyn-vec-add.expect index d97feb05ed..54b9509b46 100644 --- a/yxi/tests/axi/dynamic/dyn-vec-add.expect +++ b/yxi/tests/axi/dynamic/dyn-vec-add.expect @@ -670,7 +670,7 @@ component axi_dyn_mem_Sum0(@write_together(1) @data addr0: 3, @write_together(1) } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); axi_dyn_mem_A0 = axi_dyn_mem_A0(); From e5b76924088661ab5214e3e6a00d5bf2a3e30e00 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 15:59:17 +0200 Subject: [PATCH 63/66] remove extra ap_clk insertion in for loop --- yxi/axi-calyx/axi_generator.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/yxi/axi-calyx/axi_generator.py b/yxi/axi-calyx/axi_generator.py index 97c5268a64..8f60000116 100644 --- a/yxi/axi-calyx/axi_generator.py +++ b/yxi/axi-calyx/axi_generator.py @@ -507,8 +507,6 @@ def add_main_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) - # Naming the clock signal `ap_clk` ensures Xilinx tool compatability - wrapper_comp.input("ap_clk", 1, ["clk"]) # Cells # Read stuff From ae18b9b6268c574e87c27bd6d54eaf6f27457784 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 15:59:51 +0200 Subject: [PATCH 64/66] update axi read-compute-write to expect ap_clk signal --- .../seq-mem-vec-add-axi-wrapped.expect | 996 +-- .../seq-mem-vec-add-axi-wrapped.futil | 72 +- .../seq-mem-vec-add-verilog.v | 6494 ++++++++--------- .../read-compute-write/seq-mem-vec-add.expect | 2 +- .../axi/read-compute-write/seq-vec-add.expect | 2 +- 5 files changed, 3667 insertions(+), 3899 deletions(-) diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect index ac69b673cc..c2f7460952 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.expect @@ -3039,12 +3039,12 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic [2:0] curr_addr_internal_mem_incr_left; -logic [2:0] curr_addr_internal_mem_incr_right; -logic [2:0] curr_addr_internal_mem_incr_out; -logic [63:0] curr_addr_axi_incr_left; -logic [63:0] curr_addr_axi_incr_right; -logic [63:0] curr_addr_axi_incr_out; +logic [2:0] curr_addr_internal_mem_incr_1_1_left; +logic [2:0] curr_addr_internal_mem_incr_1_1_right; +logic [2:0] curr_addr_internal_mem_incr_1_1_out; +logic [63:0] curr_addr_axi_incr_4_2_left; +logic [63:0] curr_addr_axi_incr_4_2_right; +logic [63:0] curr_addr_axi_incr_4_2_out; logic pd_in; logic pd_write_en; logic pd_clk; @@ -3071,14 +3071,14 @@ logic service_read_transfer_go_in; logic service_read_transfer_go_out; logic service_read_transfer_done_in; logic service_read_transfer_done_out; -logic curr_addr_internal_mem_incr_group_go_in; -logic curr_addr_internal_mem_incr_group_go_out; -logic curr_addr_internal_mem_incr_group_done_in; -logic curr_addr_internal_mem_incr_group_done_out; -logic curr_addr_axi_incr_group_go_in; -logic curr_addr_axi_incr_group_go_out; -logic curr_addr_axi_incr_group_done_in; -logic curr_addr_axi_incr_group_done_out; +logic curr_addr_internal_mem_incr_1_1_group_go_in; +logic curr_addr_internal_mem_incr_1_1_group_go_out; +logic curr_addr_internal_mem_incr_1_1_group_done_in; +logic curr_addr_internal_mem_incr_1_1_group_done_out; +logic curr_addr_axi_incr_4_2_group_go_in; +logic curr_addr_axi_incr_4_2_group_go_out; +logic curr_addr_axi_incr_4_2_group_done_in; +logic curr_addr_axi_incr_4_2_group_done_out; logic invoke0_go_in; logic invoke0_go_out; logic invoke0_done_in; @@ -3137,17 +3137,17 @@ std_reg # ( ); std_add # ( .WIDTH(3) -) curr_addr_internal_mem_incr ( - .left(curr_addr_internal_mem_incr_left), - .out(curr_addr_internal_mem_incr_out), - .right(curr_addr_internal_mem_incr_right) +) curr_addr_internal_mem_incr_1_1 ( + .left(curr_addr_internal_mem_incr_1_1_left), + .out(curr_addr_internal_mem_incr_1_1_out), + .right(curr_addr_internal_mem_incr_1_1_right) ); std_add # ( .WIDTH(64) -) curr_addr_axi_incr ( - .left(curr_addr_axi_incr_left), - .out(curr_addr_axi_incr_out), - .right(curr_addr_axi_incr_right) +) curr_addr_axi_incr_4_2 ( + .left(curr_addr_axi_incr_4_2_left), + .out(curr_addr_axi_incr_4_2_out), + .right(curr_addr_axi_incr_4_2_right) ); std_reg # ( .WIDTH(1) @@ -3205,27 +3205,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_go ( - .in(curr_addr_internal_mem_incr_group_go_in), - .out(curr_addr_internal_mem_incr_group_go_out) +) curr_addr_internal_mem_incr_1_1_group_go ( + .in(curr_addr_internal_mem_incr_1_1_group_go_in), + .out(curr_addr_internal_mem_incr_1_1_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_done ( - .in(curr_addr_internal_mem_incr_group_done_in), - .out(curr_addr_internal_mem_incr_group_done_out) +) curr_addr_internal_mem_incr_1_1_group_done ( + .in(curr_addr_internal_mem_incr_1_1_group_done_in), + .out(curr_addr_internal_mem_incr_1_1_group_done_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_go ( - .in(curr_addr_axi_incr_group_go_in), - .out(curr_addr_axi_incr_group_go_out) +) curr_addr_axi_incr_4_2_group_go ( + .in(curr_addr_axi_incr_4_2_group_go_in), + .out(curr_addr_axi_incr_4_2_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_done ( - .in(curr_addr_axi_incr_group_done_in), - .out(curr_addr_axi_incr_group_done_out) +) curr_addr_axi_incr_4_2_group_done ( + .in(curr_addr_axi_incr_4_2_group_done_in), + .out(curr_addr_axi_incr_4_2_group_done_out) ); std_wire # ( .WIDTH(1) @@ -3276,144 +3276,144 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = pd0_out; -wire _guard2 = curr_addr_axi_incr_group_done_out; -wire _guard3 = _guard1 | _guard2; -wire _guard4 = ~_guard3; -wire _guard5 = par0_go_out; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = curr_addr_internal_mem_incr_group_go_out; -wire _guard8 = curr_addr_internal_mem_incr_group_go_out; -wire _guard9 = tdcc_done_out; -wire _guard10 = service_read_transfer_go_out; -wire _guard11 = curr_addr_axi_incr_group_go_out; -wire _guard12 = curr_addr_axi_incr_group_go_out; -wire _guard13 = curr_addr_internal_mem_incr_group_go_out; -wire _guard14 = service_read_transfer_go_out; -wire _guard15 = service_read_transfer_go_out; -wire _guard16 = service_read_transfer_go_out; -wire _guard17 = curr_addr_internal_mem_incr_group_go_out; -wire _guard18 = fsm_out == 3'd5; -wire _guard19 = fsm_out == 3'd0; -wire _guard20 = invoke0_done_out; +wire _guard1 = tdcc_done_out; +wire _guard2 = service_read_transfer_go_out; +wire _guard3 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard4 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard5 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard6 = service_read_transfer_go_out; +wire _guard7 = service_read_transfer_go_out; +wire _guard8 = service_read_transfer_go_out; +wire _guard9 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard10 = fsm_out == 3'd5; +wire _guard11 = fsm_out == 3'd0; +wire _guard12 = invoke0_done_out; +wire _guard13 = n_RLAST_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = _guard11 & _guard14; +wire _guard16 = tdcc_go_out; +wire _guard17 = _guard15 & _guard16; +wire _guard18 = _guard10 | _guard17; +wire _guard19 = fsm_out == 3'd4; +wire _guard20 = par0_done_out; wire _guard21 = n_RLAST_out; wire _guard22 = _guard20 & _guard21; wire _guard23 = _guard19 & _guard22; wire _guard24 = tdcc_go_out; wire _guard25 = _guard23 & _guard24; wire _guard26 = _guard18 | _guard25; -wire _guard27 = fsm_out == 3'd4; -wire _guard28 = par0_done_out; -wire _guard29 = n_RLAST_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = _guard27 & _guard30; -wire _guard32 = tdcc_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = _guard26 | _guard33; -wire _guard35 = fsm_out == 3'd1; -wire _guard36 = invoke1_done_out; +wire _guard27 = fsm_out == 3'd1; +wire _guard28 = invoke1_done_out; +wire _guard29 = _guard27 & _guard28; +wire _guard30 = tdcc_go_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = _guard26 | _guard31; +wire _guard33 = fsm_out == 3'd2; +wire _guard34 = block_transfer_done_out; +wire _guard35 = _guard33 & _guard34; +wire _guard36 = tdcc_go_out; wire _guard37 = _guard35 & _guard36; -wire _guard38 = tdcc_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard34 | _guard39; -wire _guard41 = fsm_out == 3'd2; -wire _guard42 = block_transfer_done_out; +wire _guard38 = _guard32 | _guard37; +wire _guard39 = fsm_out == 3'd3; +wire _guard40 = service_read_transfer_done_out; +wire _guard41 = _guard39 & _guard40; +wire _guard42 = tdcc_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm_out == 3'd3; -wire _guard48 = service_read_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm_out == 3'd0; -wire _guard54 = invoke0_done_out; -wire _guard55 = n_RLAST_out; -wire _guard56 = ~_guard55; -wire _guard57 = _guard54 & _guard56; -wire _guard58 = _guard53 & _guard57; -wire _guard59 = tdcc_go_out; -wire _guard60 = _guard58 & _guard59; -wire _guard61 = _guard52 | _guard60; -wire _guard62 = fsm_out == 3'd4; -wire _guard63 = par0_done_out; -wire _guard64 = n_RLAST_out; -wire _guard65 = ~_guard64; -wire _guard66 = _guard63 & _guard65; -wire _guard67 = _guard62 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = _guard61 | _guard69; -wire _guard71 = fsm_out == 3'd0; -wire _guard72 = invoke0_done_out; +wire _guard44 = _guard38 | _guard43; +wire _guard45 = fsm_out == 3'd0; +wire _guard46 = invoke0_done_out; +wire _guard47 = n_RLAST_out; +wire _guard48 = ~_guard47; +wire _guard49 = _guard46 & _guard48; +wire _guard50 = _guard45 & _guard49; +wire _guard51 = tdcc_go_out; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = _guard44 | _guard52; +wire _guard54 = fsm_out == 3'd4; +wire _guard55 = par0_done_out; +wire _guard56 = n_RLAST_out; +wire _guard57 = ~_guard56; +wire _guard58 = _guard55 & _guard57; +wire _guard59 = _guard54 & _guard58; +wire _guard60 = tdcc_go_out; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = _guard53 | _guard61; +wire _guard63 = fsm_out == 3'd0; +wire _guard64 = invoke0_done_out; +wire _guard65 = n_RLAST_out; +wire _guard66 = ~_guard65; +wire _guard67 = _guard64 & _guard66; +wire _guard68 = _guard63 & _guard67; +wire _guard69 = tdcc_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = fsm_out == 3'd4; +wire _guard72 = par0_done_out; wire _guard73 = n_RLAST_out; wire _guard74 = ~_guard73; wire _guard75 = _guard72 & _guard74; wire _guard76 = _guard71 & _guard75; wire _guard77 = tdcc_go_out; wire _guard78 = _guard76 & _guard77; -wire _guard79 = fsm_out == 3'd4; -wire _guard80 = par0_done_out; -wire _guard81 = n_RLAST_out; -wire _guard82 = ~_guard81; -wire _guard83 = _guard80 & _guard82; -wire _guard84 = _guard79 & _guard83; -wire _guard85 = tdcc_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard78 | _guard86; -wire _guard88 = fsm_out == 3'd1; -wire _guard89 = invoke1_done_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = tdcc_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = fsm_out == 3'd3; -wire _guard94 = service_read_transfer_done_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = tdcc_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = fsm_out == 3'd0; -wire _guard99 = invoke0_done_out; -wire _guard100 = n_RLAST_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = _guard98 & _guard101; -wire _guard103 = tdcc_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 3'd4; -wire _guard106 = par0_done_out; -wire _guard107 = n_RLAST_out; +wire _guard79 = _guard70 | _guard78; +wire _guard80 = fsm_out == 3'd1; +wire _guard81 = invoke1_done_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = tdcc_go_out; +wire _guard84 = _guard82 & _guard83; +wire _guard85 = fsm_out == 3'd3; +wire _guard86 = service_read_transfer_done_out; +wire _guard87 = _guard85 & _guard86; +wire _guard88 = tdcc_go_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = fsm_out == 3'd0; +wire _guard91 = invoke0_done_out; +wire _guard92 = n_RLAST_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = _guard90 & _guard93; +wire _guard95 = tdcc_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = fsm_out == 3'd4; +wire _guard98 = par0_done_out; +wire _guard99 = n_RLAST_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = _guard97 & _guard100; +wire _guard102 = tdcc_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = _guard96 | _guard103; +wire _guard105 = fsm_out == 3'd5; +wire _guard106 = fsm_out == 3'd2; +wire _guard107 = block_transfer_done_out; wire _guard108 = _guard106 & _guard107; -wire _guard109 = _guard105 & _guard108; -wire _guard110 = tdcc_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = _guard104 | _guard111; -wire _guard113 = fsm_out == 3'd5; -wire _guard114 = fsm_out == 3'd2; -wire _guard115 = block_transfer_done_out; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = tdcc_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = rready_out; -wire _guard120 = RVALID; -wire _guard121 = _guard119 & _guard120; +wire _guard109 = tdcc_go_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard112 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard113 = rready_out; +wire _guard114 = RVALID; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = block_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = rready_out; +wire _guard119 = RVALID; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = ~_guard120; wire _guard122 = block_transfer_go_out; wire _guard123 = _guard121 & _guard122; -wire _guard124 = rready_out; -wire _guard125 = RVALID; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = block_transfer_go_out; -wire _guard129 = _guard127 & _guard128; -wire _guard130 = block_transfer_go_out; -wire _guard131 = invoke0_done_out; -wire _guard132 = ~_guard131; -wire _guard133 = fsm_out == 3'd0; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = tdcc_go_out; +wire _guard124 = block_transfer_go_out; +wire _guard125 = pd0_out; +wire _guard126 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard127 = _guard125 | _guard126; +wire _guard128 = ~_guard127; +wire _guard129 = par0_go_out; +wire _guard130 = _guard128 & _guard129; +wire _guard131 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard132 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard133 = invoke0_done_out; +wire _guard134 = ~_guard133; +wire _guard135 = fsm_out == 3'd0; wire _guard136 = _guard134 & _guard135; -wire _guard137 = curr_addr_axi_incr_group_go_out; -wire _guard138 = curr_addr_axi_incr_group_go_out; +wire _guard137 = tdcc_go_out; +wire _guard138 = _guard136 & _guard137; wire _guard139 = pd_out; wire _guard140 = pd0_out; wire _guard141 = _guard139 & _guard140; @@ -3454,11 +3454,11 @@ wire _guard175 = _guard173 | _guard174; wire _guard176 = pd_out; wire _guard177 = pd0_out; wire _guard178 = _guard176 & _guard177; -wire _guard179 = curr_addr_internal_mem_incr_group_done_out; +wire _guard179 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard180 = par0_go_out; wire _guard181 = _guard179 & _guard180; wire _guard182 = _guard178 | _guard181; -wire _guard183 = curr_addr_internal_mem_incr_group_done_out; +wire _guard183 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard184 = par0_go_out; wire _guard185 = _guard183 & _guard184; wire _guard186 = pd_out; @@ -3467,28 +3467,28 @@ wire _guard188 = _guard186 & _guard187; wire _guard189 = pd_out; wire _guard190 = pd0_out; wire _guard191 = _guard189 & _guard190; -wire _guard192 = curr_addr_axi_incr_group_done_out; +wire _guard192 = curr_addr_axi_incr_4_2_group_done_out; wire _guard193 = par0_go_out; wire _guard194 = _guard192 & _guard193; wire _guard195 = _guard191 | _guard194; -wire _guard196 = curr_addr_axi_incr_group_done_out; +wire _guard196 = curr_addr_axi_incr_4_2_group_done_out; wire _guard197 = par0_go_out; wire _guard198 = _guard196 & _guard197; wire _guard199 = pd_out; wire _guard200 = pd0_out; wire _guard201 = _guard199 & _guard200; wire _guard202 = fsm_out == 3'd5; -wire _guard203 = block_transfer_done_out; -wire _guard204 = ~_guard203; -wire _guard205 = fsm_out == 3'd2; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = tdcc_go_out; +wire _guard203 = pd_out; +wire _guard204 = curr_addr_internal_mem_incr_1_1_group_done_out; +wire _guard205 = _guard203 | _guard204; +wire _guard206 = ~_guard205; +wire _guard207 = par0_go_out; wire _guard208 = _guard206 & _guard207; -wire _guard209 = pd_out; -wire _guard210 = curr_addr_internal_mem_incr_group_done_out; -wire _guard211 = _guard209 | _guard210; -wire _guard212 = ~_guard211; -wire _guard213 = par0_go_out; +wire _guard209 = block_transfer_done_out; +wire _guard210 = ~_guard209; +wire _guard211 = fsm_out == 3'd2; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = tdcc_go_out; wire _guard214 = _guard212 & _guard213; wire _guard215 = block_transfer_go_out; wire _guard216 = service_read_transfer_go_out; @@ -3518,44 +3518,44 @@ wire _guard239 = fsm_out == 3'd4; wire _guard240 = _guard238 & _guard239; wire _guard241 = tdcc_go_out; wire _guard242 = _guard240 & _guard241; -assign curr_addr_axi_incr_group_go_in = _guard6; -assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_incr_right = 3'd1; -assign done = _guard9; -assign mem_ref_content_en = _guard10; -assign curr_addr_axi_write_en = _guard11; -assign curr_addr_axi_in = curr_addr_axi_incr_out; +assign done = _guard1; +assign mem_ref_content_en = _guard2; +assign curr_addr_axi_write_en = _guard3; +assign curr_addr_axi_in = curr_addr_axi_incr_4_2_out; assign RREADY = rready_out; -assign curr_addr_internal_mem_write_en = _guard13; +assign curr_addr_internal_mem_write_en = _guard5; assign mem_ref_write_data = read_data_reg_out; -assign mem_ref_write_en = _guard15; +assign mem_ref_write_en = _guard7; assign mem_ref_addr0 = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_in = curr_addr_internal_mem_incr_out; -assign fsm_write_en = _guard70; +assign curr_addr_internal_mem_in = curr_addr_internal_mem_incr_1_1_out; +assign fsm_write_en = _guard62; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard87 ? 3'd5 : - _guard92 ? 3'd2 : - _guard97 ? 3'd4 : - _guard112 ? 3'd1 : - _guard113 ? 3'd0 : - _guard118 ? 3'd3 : + _guard79 ? 3'd5 : + _guard84 ? 3'd2 : + _guard89 ? 3'd4 : + _guard104 ? 3'd1 : + _guard105 ? 3'd0 : + _guard110 ? 3'd3 : 3'd0; +assign curr_addr_axi_incr_4_2_group_done_in = curr_addr_axi_done; +assign curr_addr_axi_incr_4_2_left = curr_addr_axi_out; +assign curr_addr_axi_incr_4_2_right = 64'd4; assign block_transfer_done_in = bt_reg_out; assign service_read_transfer_done_in = mem_ref_done; assign read_data_reg_write_en = - _guard123 ? 1'd1 : - _guard129 ? 1'd0 : + _guard117 ? 1'd1 : + _guard123 ? 1'd0 : 1'd0; assign read_data_reg_clk = clk; assign read_data_reg_reset = reset; assign read_data_reg_in = RDATA; +assign curr_addr_axi_incr_4_2_group_go_in = _guard130; +assign curr_addr_internal_mem_incr_1_1_left = curr_addr_internal_mem_out; +assign curr_addr_internal_mem_incr_1_1_right = 3'd1; assign tdcc_go_in = go; -assign invoke0_go_in = _guard136; -assign curr_addr_axi_incr_left = curr_addr_axi_out; -assign curr_addr_axi_incr_right = 64'd4; -assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; +assign invoke0_go_in = _guard138; assign par0_done_in = _guard141; assign n_RLAST_write_en = _guard144; assign n_RLAST_clk = clk; @@ -3573,6 +3573,7 @@ assign bt_reg_in = _guard167 ? 1'd1 : _guard175 ? 1'd0 : 'x; +assign curr_addr_internal_mem_incr_1_1_group_done_in = curr_addr_internal_mem_done; assign pd_write_en = _guard182; assign pd_clk = clk; assign pd_reset = reset; @@ -3588,8 +3589,8 @@ assign pd0_in = _guard201 ? 1'd0 : 1'd0; assign tdcc_done_in = _guard202; -assign block_transfer_go_in = _guard208; -assign curr_addr_internal_mem_incr_group_go_in = _guard214; +assign curr_addr_internal_mem_incr_1_1_group_go_in = _guard208; +assign block_transfer_go_in = _guard214; assign invoke1_done_in = bt_reg_done; assign rready_write_en = _guard217; assign rready_clk = clk; @@ -3599,7 +3600,6 @@ assign rready_in = _guard230 ? 1'd0 : 'x; assign service_read_transfer_go_in = _guard236; -assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; assign par0_go_in = _guard242; // COMPONENT END: m_read_channel endmodule @@ -3663,15 +3663,15 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic [2:0] curr_addr_internal_mem_incr_left; -logic [2:0] curr_addr_internal_mem_incr_right; -logic [2:0] curr_addr_internal_mem_incr_out; -logic [63:0] curr_addr_axi_incr_left; -logic [63:0] curr_addr_axi_incr_right; -logic [63:0] curr_addr_axi_incr_out; -logic [7:0] curr_transfer_count_incr_left; -logic [7:0] curr_transfer_count_incr_right; -logic [7:0] curr_transfer_count_incr_out; +logic [2:0] curr_addr_internal_mem_incr_1_1_left; +logic [2:0] curr_addr_internal_mem_incr_1_1_right; +logic [2:0] curr_addr_internal_mem_incr_1_1_out; +logic [63:0] curr_addr_axi_incr_4_2_left; +logic [63:0] curr_addr_axi_incr_4_2_right; +logic [63:0] curr_addr_axi_incr_4_2_out; +logic [7:0] curr_transfer_count_incr_1_3_left; +logic [7:0] curr_transfer_count_incr_1_3_right; +logic [7:0] curr_transfer_count_incr_1_3_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -3707,14 +3707,14 @@ logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic curr_addr_internal_mem_incr_group_go_in; -logic curr_addr_internal_mem_incr_group_go_out; -logic curr_addr_internal_mem_incr_group_done_in; -logic curr_addr_internal_mem_incr_group_done_out; -logic curr_addr_axi_incr_group_go_in; -logic curr_addr_axi_incr_group_go_out; -logic curr_addr_axi_incr_group_done_in; -logic curr_addr_axi_incr_group_done_out; +logic curr_addr_internal_mem_incr_1_1_group_go_in; +logic curr_addr_internal_mem_incr_1_1_group_go_out; +logic curr_addr_internal_mem_incr_1_1_group_done_in; +logic curr_addr_internal_mem_incr_1_1_group_done_out; +logic curr_addr_axi_incr_4_2_group_go_in; +logic curr_addr_axi_incr_4_2_group_go_out; +logic curr_addr_axi_incr_4_2_group_done_in; +logic curr_addr_axi_incr_4_2_group_done_out; logic invoke0_go_in; logic invoke0_go_out; logic invoke0_done_in; @@ -3795,24 +3795,24 @@ std_reg # ( ); std_add # ( .WIDTH(3) -) curr_addr_internal_mem_incr ( - .left(curr_addr_internal_mem_incr_left), - .out(curr_addr_internal_mem_incr_out), - .right(curr_addr_internal_mem_incr_right) +) curr_addr_internal_mem_incr_1_1 ( + .left(curr_addr_internal_mem_incr_1_1_left), + .out(curr_addr_internal_mem_incr_1_1_out), + .right(curr_addr_internal_mem_incr_1_1_right) ); std_add # ( .WIDTH(64) -) curr_addr_axi_incr ( - .left(curr_addr_axi_incr_left), - .out(curr_addr_axi_incr_out), - .right(curr_addr_axi_incr_right) +) curr_addr_axi_incr_4_2 ( + .left(curr_addr_axi_incr_4_2_left), + .out(curr_addr_axi_incr_4_2_out), + .right(curr_addr_axi_incr_4_2_right) ); std_add # ( .WIDTH(8) -) curr_transfer_count_incr ( - .left(curr_transfer_count_incr_left), - .out(curr_transfer_count_incr_out), - .right(curr_transfer_count_incr_right) +) curr_transfer_count_incr_1_3 ( + .left(curr_transfer_count_incr_1_3_left), + .out(curr_transfer_count_incr_1_3_out), + .right(curr_transfer_count_incr_1_3_right) ); undef # ( .WIDTH(1) @@ -3883,27 +3883,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_go ( - .in(curr_addr_internal_mem_incr_group_go_in), - .out(curr_addr_internal_mem_incr_group_go_out) +) curr_addr_internal_mem_incr_1_1_group_go ( + .in(curr_addr_internal_mem_incr_1_1_group_go_in), + .out(curr_addr_internal_mem_incr_1_1_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_done ( - .in(curr_addr_internal_mem_incr_group_done_in), - .out(curr_addr_internal_mem_incr_group_done_out) +) curr_addr_internal_mem_incr_1_1_group_done ( + .in(curr_addr_internal_mem_incr_1_1_group_done_in), + .out(curr_addr_internal_mem_incr_1_1_group_done_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_go ( - .in(curr_addr_axi_incr_group_go_in), - .out(curr_addr_axi_incr_group_go_out) +) curr_addr_axi_incr_4_2_group_go ( + .in(curr_addr_axi_incr_4_2_group_go_in), + .out(curr_addr_axi_incr_4_2_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_done ( - .in(curr_addr_axi_incr_group_done_in), - .out(curr_addr_axi_incr_group_done_out) +) curr_addr_axi_incr_4_2_group_done ( + .in(curr_addr_axi_incr_4_2_group_done_in), + .out(curr_addr_axi_incr_4_2_group_done_out) ); std_wire # ( .WIDTH(1) @@ -3990,207 +3990,207 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = pd1_out; -wire _guard2 = curr_addr_axi_incr_group_done_out; -wire _guard3 = _guard1 | _guard2; -wire _guard4 = ~_guard3; -wire _guard5 = par0_go_out; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = curr_addr_internal_mem_incr_group_go_out; -wire _guard8 = curr_addr_internal_mem_incr_group_go_out; -wire _guard9 = tdcc_done_out; +wire _guard1 = tdcc_done_out; +wire _guard2 = service_write_transfer_go_out; +wire _guard3 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard4 = service_write_transfer_go_out; +wire _guard5 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard6 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard7 = invoke0_go_out; +wire _guard8 = _guard6 | _guard7; +wire _guard9 = max_transfers_out == curr_transfer_count_out; wire _guard10 = service_write_transfer_go_out; -wire _guard11 = curr_addr_axi_incr_group_go_out; -wire _guard12 = service_write_transfer_go_out; -wire _guard13 = curr_addr_axi_incr_group_go_out; -wire _guard14 = curr_addr_internal_mem_incr_group_go_out; -wire _guard15 = invoke0_go_out; -wire _guard16 = _guard14 | _guard15; -wire _guard17 = max_transfers_out == curr_transfer_count_out; -wire _guard18 = service_write_transfer_go_out; -wire _guard19 = _guard17 & _guard18; -wire _guard20 = max_transfers_out != curr_transfer_count_out; -wire _guard21 = service_write_transfer_go_out; -wire _guard22 = _guard20 & _guard21; -wire _guard23 = service_write_transfer_go_out; -wire _guard24 = curr_addr_internal_mem_incr_group_go_out; -wire _guard25 = invoke0_go_out; -wire _guard26 = fsm_out == 3'd5; -wire _guard27 = fsm_out == 3'd0; -wire _guard28 = invoke0_done_out; -wire _guard29 = _guard27 & _guard28; +wire _guard11 = _guard9 & _guard10; +wire _guard12 = max_transfers_out != curr_transfer_count_out; +wire _guard13 = service_write_transfer_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = service_write_transfer_go_out; +wire _guard16 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard17 = invoke0_go_out; +wire _guard18 = fsm_out == 3'd5; +wire _guard19 = fsm_out == 3'd0; +wire _guard20 = invoke0_done_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = tdcc_go_out; +wire _guard23 = _guard21 & _guard22; +wire _guard24 = _guard18 | _guard23; +wire _guard25 = fsm_out == 3'd1; +wire _guard26 = invoke1_done_out; +wire _guard27 = n_finished_last_transfer_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = _guard25 & _guard28; wire _guard30 = tdcc_go_out; wire _guard31 = _guard29 & _guard30; -wire _guard32 = _guard26 | _guard31; -wire _guard33 = fsm_out == 3'd1; -wire _guard34 = invoke1_done_out; +wire _guard32 = _guard24 | _guard31; +wire _guard33 = fsm_out == 3'd4; +wire _guard34 = par0_done_out; wire _guard35 = n_finished_last_transfer_out; wire _guard36 = _guard34 & _guard35; wire _guard37 = _guard33 & _guard36; wire _guard38 = tdcc_go_out; wire _guard39 = _guard37 & _guard38; wire _guard40 = _guard32 | _guard39; -wire _guard41 = fsm_out == 3'd4; -wire _guard42 = par0_done_out; -wire _guard43 = n_finished_last_transfer_out; -wire _guard44 = _guard42 & _guard43; -wire _guard45 = _guard41 & _guard44; -wire _guard46 = tdcc_go_out; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = _guard40 | _guard47; -wire _guard49 = fsm_out == 3'd2; -wire _guard50 = invoke2_done_out; +wire _guard41 = fsm_out == 3'd2; +wire _guard42 = invoke2_done_out; +wire _guard43 = _guard41 & _guard42; +wire _guard44 = tdcc_go_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = _guard40 | _guard45; +wire _guard47 = fsm_out == 3'd3; +wire _guard48 = service_write_transfer_done_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = tdcc_go_out; wire _guard51 = _guard49 & _guard50; -wire _guard52 = tdcc_go_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = _guard48 | _guard53; -wire _guard55 = fsm_out == 3'd3; -wire _guard56 = service_write_transfer_done_out; -wire _guard57 = _guard55 & _guard56; -wire _guard58 = tdcc_go_out; -wire _guard59 = _guard57 & _guard58; -wire _guard60 = _guard54 | _guard59; -wire _guard61 = fsm_out == 3'd1; -wire _guard62 = invoke1_done_out; -wire _guard63 = n_finished_last_transfer_out; -wire _guard64 = ~_guard63; -wire _guard65 = _guard62 & _guard64; -wire _guard66 = _guard61 & _guard65; -wire _guard67 = tdcc_go_out; -wire _guard68 = _guard66 & _guard67; -wire _guard69 = _guard60 | _guard68; -wire _guard70 = fsm_out == 3'd4; -wire _guard71 = par0_done_out; -wire _guard72 = n_finished_last_transfer_out; -wire _guard73 = ~_guard72; -wire _guard74 = _guard71 & _guard73; -wire _guard75 = _guard70 & _guard74; -wire _guard76 = tdcc_go_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = _guard69 | _guard77; -wire _guard79 = fsm_out == 3'd1; -wire _guard80 = invoke1_done_out; +wire _guard52 = _guard46 | _guard51; +wire _guard53 = fsm_out == 3'd1; +wire _guard54 = invoke1_done_out; +wire _guard55 = n_finished_last_transfer_out; +wire _guard56 = ~_guard55; +wire _guard57 = _guard54 & _guard56; +wire _guard58 = _guard53 & _guard57; +wire _guard59 = tdcc_go_out; +wire _guard60 = _guard58 & _guard59; +wire _guard61 = _guard52 | _guard60; +wire _guard62 = fsm_out == 3'd4; +wire _guard63 = par0_done_out; +wire _guard64 = n_finished_last_transfer_out; +wire _guard65 = ~_guard64; +wire _guard66 = _guard63 & _guard65; +wire _guard67 = _guard62 & _guard66; +wire _guard68 = tdcc_go_out; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = _guard61 | _guard69; +wire _guard71 = fsm_out == 3'd1; +wire _guard72 = invoke1_done_out; +wire _guard73 = n_finished_last_transfer_out; +wire _guard74 = ~_guard73; +wire _guard75 = _guard72 & _guard74; +wire _guard76 = _guard71 & _guard75; +wire _guard77 = tdcc_go_out; +wire _guard78 = _guard76 & _guard77; +wire _guard79 = fsm_out == 3'd4; +wire _guard80 = par0_done_out; wire _guard81 = n_finished_last_transfer_out; wire _guard82 = ~_guard81; wire _guard83 = _guard80 & _guard82; wire _guard84 = _guard79 & _guard83; wire _guard85 = tdcc_go_out; wire _guard86 = _guard84 & _guard85; -wire _guard87 = fsm_out == 3'd4; -wire _guard88 = par0_done_out; -wire _guard89 = n_finished_last_transfer_out; -wire _guard90 = ~_guard89; -wire _guard91 = _guard88 & _guard90; -wire _guard92 = _guard87 & _guard91; +wire _guard87 = _guard78 | _guard86; +wire _guard88 = fsm_out == 3'd1; +wire _guard89 = invoke1_done_out; +wire _guard90 = n_finished_last_transfer_out; +wire _guard91 = _guard89 & _guard90; +wire _guard92 = _guard88 & _guard91; wire _guard93 = tdcc_go_out; wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard86 | _guard94; -wire _guard96 = fsm_out == 3'd1; -wire _guard97 = invoke1_done_out; -wire _guard98 = n_finished_last_transfer_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = _guard96 & _guard99; -wire _guard101 = tdcc_go_out; -wire _guard102 = _guard100 & _guard101; -wire _guard103 = fsm_out == 3'd4; -wire _guard104 = par0_done_out; -wire _guard105 = n_finished_last_transfer_out; -wire _guard106 = _guard104 & _guard105; -wire _guard107 = _guard103 & _guard106; -wire _guard108 = tdcc_go_out; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = _guard102 | _guard109; -wire _guard111 = fsm_out == 3'd3; -wire _guard112 = service_write_transfer_done_out; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = tdcc_go_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = fsm_out == 3'd0; -wire _guard117 = invoke0_done_out; +wire _guard95 = fsm_out == 3'd4; +wire _guard96 = par0_done_out; +wire _guard97 = n_finished_last_transfer_out; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = _guard95 & _guard98; +wire _guard100 = tdcc_go_out; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = _guard94 | _guard101; +wire _guard103 = fsm_out == 3'd3; +wire _guard104 = service_write_transfer_done_out; +wire _guard105 = _guard103 & _guard104; +wire _guard106 = tdcc_go_out; +wire _guard107 = _guard105 & _guard106; +wire _guard108 = fsm_out == 3'd0; +wire _guard109 = invoke0_done_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = tdcc_go_out; +wire _guard112 = _guard110 & _guard111; +wire _guard113 = fsm_out == 3'd5; +wire _guard114 = fsm_out == 3'd2; +wire _guard115 = invoke2_done_out; +wire _guard116 = _guard114 & _guard115; +wire _guard117 = tdcc_go_out; wire _guard118 = _guard116 & _guard117; -wire _guard119 = tdcc_go_out; -wire _guard120 = _guard118 & _guard119; -wire _guard121 = fsm_out == 3'd5; -wire _guard122 = fsm_out == 3'd2; -wire _guard123 = invoke2_done_out; -wire _guard124 = _guard122 & _guard123; -wire _guard125 = tdcc_go_out; +wire _guard119 = early_reset_static_par_thread_go_out; +wire _guard120 = early_reset_static_par_thread_go_out; +wire _guard121 = pd_out; +wire _guard122 = wrapper_early_reset_static_par_thread_done_out; +wire _guard123 = _guard121 | _guard122; +wire _guard124 = ~_guard123; +wire _guard125 = par0_go_out; wire _guard126 = _guard124 & _guard125; -wire _guard127 = pd_out; -wire _guard128 = wrapper_early_reset_static_par_thread_done_out; -wire _guard129 = _guard127 | _guard128; -wire _guard130 = ~_guard129; -wire _guard131 = par0_go_out; +wire _guard127 = invoke2_done_out; +wire _guard128 = ~_guard127; +wire _guard129 = fsm_out == 3'd2; +wire _guard130 = _guard128 & _guard129; +wire _guard131 = tdcc_go_out; wire _guard132 = _guard130 & _guard131; -wire _guard133 = invoke2_done_out; -wire _guard134 = ~_guard133; -wire _guard135 = fsm_out == 3'd2; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = tdcc_go_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = early_reset_static_par_thread_go_out; -wire _guard140 = early_reset_static_par_thread_go_out; -wire _guard141 = service_write_transfer_go_out; -wire _guard142 = wvalid_out; -wire _guard143 = WREADY; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = ~_guard144; -wire _guard146 = w_handshake_occurred_out; -wire _guard147 = ~_guard146; -wire _guard148 = _guard145 & _guard147; -wire _guard149 = service_write_transfer_go_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = wvalid_out; -wire _guard152 = WREADY; -wire _guard153 = _guard151 & _guard152; -wire _guard154 = w_handshake_occurred_out; -wire _guard155 = _guard153 | _guard154; -wire _guard156 = service_write_transfer_go_out; +wire _guard133 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard134 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard135 = early_reset_static_par_thread_go_out; +wire _guard136 = early_reset_static_par_thread_go_out; +wire _guard137 = pd1_out; +wire _guard138 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard139 = _guard137 | _guard138; +wire _guard140 = ~_guard139; +wire _guard141 = par0_go_out; +wire _guard142 = _guard140 & _guard141; +wire _guard143 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard144 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard145 = service_write_transfer_go_out; +wire _guard146 = wvalid_out; +wire _guard147 = WREADY; +wire _guard148 = _guard146 & _guard147; +wire _guard149 = ~_guard148; +wire _guard150 = w_handshake_occurred_out; +wire _guard151 = ~_guard150; +wire _guard152 = _guard149 & _guard151; +wire _guard153 = service_write_transfer_go_out; +wire _guard154 = _guard152 & _guard153; +wire _guard155 = wvalid_out; +wire _guard156 = WREADY; wire _guard157 = _guard155 & _guard156; -wire _guard158 = max_transfers_out == curr_transfer_count_out; -wire _guard159 = wvalid_out; -wire _guard160 = WREADY; +wire _guard158 = w_handshake_occurred_out; +wire _guard159 = _guard157 | _guard158; +wire _guard160 = service_write_transfer_go_out; wire _guard161 = _guard159 & _guard160; -wire _guard162 = _guard158 & _guard161; -wire _guard163 = service_write_transfer_go_out; -wire _guard164 = _guard162 & _guard163; -wire _guard165 = invoke1_go_out; -wire _guard166 = _guard164 | _guard165; -wire _guard167 = invoke1_go_out; -wire _guard168 = max_transfers_out == curr_transfer_count_out; -wire _guard169 = wvalid_out; -wire _guard170 = WREADY; -wire _guard171 = _guard169 & _guard170; -wire _guard172 = _guard168 & _guard171; -wire _guard173 = service_write_transfer_go_out; -wire _guard174 = _guard172 & _guard173; -wire _guard175 = early_reset_static_par_thread_go_out; -wire _guard176 = early_reset_static_par_thread_go_out; -wire _guard177 = pd_out; -wire _guard178 = pd0_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = pd1_out; +wire _guard162 = max_transfers_out == curr_transfer_count_out; +wire _guard163 = wvalid_out; +wire _guard164 = WREADY; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard162 & _guard165; +wire _guard167 = service_write_transfer_go_out; +wire _guard168 = _guard166 & _guard167; +wire _guard169 = invoke1_go_out; +wire _guard170 = _guard168 | _guard169; +wire _guard171 = invoke1_go_out; +wire _guard172 = max_transfers_out == curr_transfer_count_out; +wire _guard173 = wvalid_out; +wire _guard174 = WREADY; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = _guard172 & _guard175; +wire _guard177 = service_write_transfer_go_out; +wire _guard178 = _guard176 & _guard177; +wire _guard179 = pd_out; +wire _guard180 = pd0_out; wire _guard181 = _guard179 & _guard180; -wire _guard182 = curr_addr_axi_incr_group_done_out; -wire _guard183 = par0_go_out; -wire _guard184 = _guard182 & _guard183; -wire _guard185 = _guard181 | _guard184; -wire _guard186 = curr_addr_axi_incr_group_done_out; -wire _guard187 = par0_go_out; -wire _guard188 = _guard186 & _guard187; -wire _guard189 = pd_out; -wire _guard190 = pd0_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = pd1_out; +wire _guard182 = pd1_out; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard185 = par0_go_out; +wire _guard186 = _guard184 & _guard185; +wire _guard187 = _guard183 | _guard186; +wire _guard188 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard189 = par0_go_out; +wire _guard190 = _guard188 & _guard189; +wire _guard191 = pd_out; +wire _guard192 = pd0_out; wire _guard193 = _guard191 & _guard192; -wire _guard194 = invoke0_done_out; -wire _guard195 = ~_guard194; -wire _guard196 = fsm_out == 3'd0; -wire _guard197 = _guard195 & _guard196; -wire _guard198 = tdcc_go_out; +wire _guard194 = pd1_out; +wire _guard195 = _guard193 & _guard194; +wire _guard196 = invoke0_done_out; +wire _guard197 = ~_guard196; +wire _guard198 = fsm_out == 3'd0; wire _guard199 = _guard197 & _guard198; -wire _guard200 = curr_addr_axi_incr_group_go_out; -wire _guard201 = curr_addr_axi_incr_group_go_out; +wire _guard200 = tdcc_go_out; +wire _guard201 = _guard199 & _guard200; wire _guard202 = pd_out; wire _guard203 = pd0_out; wire _guard204 = _guard202 & _guard203; @@ -4262,11 +4262,11 @@ wire _guard269 = pd0_out; wire _guard270 = _guard268 & _guard269; wire _guard271 = pd1_out; wire _guard272 = _guard270 & _guard271; -wire _guard273 = curr_addr_internal_mem_incr_group_done_out; +wire _guard273 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard274 = par0_go_out; wire _guard275 = _guard273 & _guard274; wire _guard276 = _guard272 | _guard275; -wire _guard277 = curr_addr_internal_mem_incr_group_done_out; +wire _guard277 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard278 = par0_go_out; wire _guard279 = _guard277 & _guard278; wire _guard280 = pd_out; @@ -4296,7 +4296,7 @@ wire _guard303 = early_reset_static_par_thread_go_out; wire _guard304 = _guard302 | _guard303; wire _guard305 = fsm_out == 3'd5; wire _guard306 = pd0_out; -wire _guard307 = curr_addr_internal_mem_incr_group_done_out; +wire _guard307 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard308 = _guard306 | _guard307; wire _guard309 = ~_guard308; wire _guard310 = par0_go_out; @@ -4307,74 +4307,74 @@ wire _guard314 = fsm_out == 3'd4; wire _guard315 = _guard313 & _guard314; wire _guard316 = tdcc_go_out; wire _guard317 = _guard315 & _guard316; -assign curr_addr_axi_incr_group_go_in = _guard6; -assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_incr_right = 3'd1; -assign done = _guard9; -assign mem_ref_content_en = _guard10; -assign curr_addr_axi_write_en = _guard11; +assign done = _guard1; +assign mem_ref_content_en = _guard2; +assign curr_addr_axi_write_en = _guard3; assign WVALID = wvalid_out; assign WDATA = - _guard12 ? mem_ref_read_data : + _guard4 ? mem_ref_read_data : 32'd0; -assign curr_addr_axi_in = curr_addr_axi_incr_out; -assign curr_addr_internal_mem_write_en = _guard16; +assign curr_addr_axi_in = curr_addr_axi_incr_4_2_out; +assign curr_addr_internal_mem_write_en = _guard8; assign mem_ref_write_en = 1'd0; assign WLAST = - _guard19 ? 1'd1 : - _guard22 ? 1'd0 : + _guard11 ? 1'd1 : + _guard14 ? 1'd0 : 1'd0; assign mem_ref_addr0 = curr_addr_internal_mem_out; assign curr_addr_internal_mem_in = - _guard24 ? curr_addr_internal_mem_incr_out : - _guard25 ? 3'd0 : + _guard16 ? curr_addr_internal_mem_incr_1_1_out : + _guard17 ? 3'd0 : 'x; -assign fsm_write_en = _guard78; +assign fsm_write_en = _guard70; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard95 ? 3'd5 : - _guard110 ? 3'd2 : - _guard115 ? 3'd4 : - _guard120 ? 3'd1 : - _guard121 ? 3'd0 : - _guard126 ? 3'd3 : + _guard87 ? 3'd5 : + _guard102 ? 3'd2 : + _guard107 ? 3'd4 : + _guard112 ? 3'd1 : + _guard113 ? 3'd0 : + _guard118 ? 3'd3 : 3'd0; -assign wrapper_early_reset_static_par_thread_go_in = _guard132; -assign invoke2_go_in = _guard138; -assign curr_transfer_count_write_en = _guard139; +assign curr_transfer_count_incr_1_3_left = curr_transfer_count_out; +assign curr_transfer_count_incr_1_3_right = 8'd1; +assign wrapper_early_reset_static_par_thread_go_in = _guard126; +assign curr_addr_axi_incr_4_2_group_done_in = curr_addr_axi_done; +assign invoke2_go_in = _guard132; +assign curr_addr_axi_incr_4_2_left = curr_addr_axi_out; +assign curr_addr_axi_incr_4_2_right = 64'd4; +assign curr_transfer_count_write_en = _guard135; assign curr_transfer_count_clk = clk; assign curr_transfer_count_reset = reset; -assign curr_transfer_count_in = curr_transfer_count_incr_out; -assign wvalid_write_en = _guard141; +assign curr_transfer_count_in = curr_transfer_count_incr_1_3_out; +assign curr_addr_axi_incr_4_2_group_go_in = _guard142; +assign curr_addr_internal_mem_incr_1_1_left = curr_addr_internal_mem_out; +assign curr_addr_internal_mem_incr_1_1_right = 3'd1; +assign wvalid_write_en = _guard145; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard150 ? 1'd1 : - _guard157 ? 1'd0 : + _guard154 ? 1'd1 : + _guard161 ? 1'd0 : 'x; -assign n_finished_last_transfer_write_en = _guard166; +assign n_finished_last_transfer_write_en = _guard170; assign n_finished_last_transfer_clk = clk; assign n_finished_last_transfer_reset = reset; assign n_finished_last_transfer_in = - _guard167 ? 1'd1 : - _guard174 ? 1'd0 : + _guard171 ? 1'd1 : + _guard178 ? 1'd0 : 'x; -assign curr_transfer_count_incr_left = curr_transfer_count_out; -assign curr_transfer_count_incr_right = 8'd1; -assign pd1_write_en = _guard185; +assign pd1_write_en = _guard187; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard188 ? 1'd1 : - _guard193 ? 1'd0 : + _guard190 ? 1'd1 : + _guard195 ? 1'd0 : 1'd0; assign tdcc_go_in = go; -assign invoke0_go_in = _guard199; +assign invoke0_go_in = _guard201; assign service_write_transfer_done_in = bt_reg_out; -assign curr_addr_axi_incr_left = curr_addr_axi_out; -assign curr_addr_axi_incr_right = 64'd4; -assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; assign par0_done_in = _guard206; assign service_write_transfer_go_in = _guard212; assign invoke0_done_in = curr_addr_internal_mem_done; @@ -4394,6 +4394,7 @@ assign signal_reg_in = _guard249 ? 1'd0 : 1'd0; assign early_reset_static_par_thread_go_in = _guard250; +assign curr_addr_internal_mem_incr_1_1_group_done_in = curr_addr_internal_mem_done; assign invoke2_done_in = bt_reg_done; assign pd_write_en = _guard259; assign pd_clk = clk; @@ -4418,10 +4419,9 @@ assign w_handshake_occurred_in = _guard304 ? 1'd0 : 'x; assign tdcc_done_in = _guard305; +assign curr_addr_internal_mem_incr_1_1_group_go_in = _guard311; assign early_reset_static_par_thread_done_in = ud_out; -assign curr_addr_internal_mem_incr_group_go_in = _guard311; assign invoke1_done_in = n_finished_last_transfer_done; -assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; assign par0_go_in = _guard317; // COMPONENT END: m_write_channel endmodule @@ -4631,6 +4631,7 @@ assign block_transfer_go_in = _guard66; // COMPONENT END: m_bresp_channel endmodule module wrapper( + input logic ap_clk, input logic A0_ARESETn, input logic A0_ARREADY, input logic A0_RVALID, @@ -4728,7 +4729,6 @@ module wrapper( output logic Sum0_WID, output logic Sum0_BID, input logic go, - input logic clk, input logic reset, output logic done ); @@ -7078,7 +7078,7 @@ assign curr_addr_internal_mem_A0_write_en = _guard2 ? read_channel_A0_curr_addr_internal_mem_write_en : _guard3 ? write_channel_A0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_A0_clk = clk; +assign curr_addr_internal_mem_A0_clk = ap_clk; assign curr_addr_internal_mem_A0_reset = reset; assign curr_addr_internal_mem_A0_in = _guard4 ? read_channel_A0_curr_addr_internal_mem_in : @@ -7104,7 +7104,7 @@ assign read_channel_Sum0_RLAST = assign read_channel_Sum0_RDATA = _guard18 ? Sum0_RDATA : 32'd0; -assign read_channel_Sum0_clk = clk; +assign read_channel_Sum0_clk = ap_clk; assign read_channel_Sum0_go = _guard19; assign read_channel_Sum0_reset = reset; assign read_channel_Sum0_RRESP = @@ -7280,7 +7280,7 @@ assign A0_ARLEN = 8'd0; assign A0_AWID = 1'd0; assign fsm_write_en = _guard86; -assign fsm_clk = clk; +assign fsm_clk = ap_clk; assign fsm_reset = reset; assign fsm_in = _guard91 ? 2'd1 : @@ -7295,7 +7295,7 @@ assign curr_addr_internal_mem_B0_write_en = _guard111 ? 1'd1 : _guard112 ? write_channel_B0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_B0_clk = clk; +assign curr_addr_internal_mem_B0_clk = ap_clk; assign curr_addr_internal_mem_B0_reset = reset; assign curr_addr_internal_mem_B0_in = _guard113 ? read_channel_B0_curr_addr_internal_mem_in : @@ -7317,7 +7317,7 @@ assign read_channel_B0_RLAST = assign read_channel_B0_RDATA = _guard120 ? B0_RDATA : 32'd0; -assign read_channel_B0_clk = clk; +assign read_channel_B0_clk = ap_clk; assign read_channel_B0_go = _guard121; assign read_channel_B0_reset = reset; assign read_channel_B0_RRESP = @@ -7340,7 +7340,7 @@ assign internal_mem_B0_write_en = _guard128 ? main_compute_B0_write_en : _guard129 ? write_channel_B0_mem_ref_write_en : 1'd0; -assign internal_mem_B0_clk = clk; +assign internal_mem_B0_clk = ap_clk; assign internal_mem_B0_addr0 = _guard130 ? read_channel_B0_mem_ref_addr0 : _guard131 ? main_compute_B0_addr0 : @@ -7353,21 +7353,21 @@ assign internal_mem_B0_content_en = 1'd0; assign internal_mem_B0_reset = reset; assign internal_mem_B0_write_data = read_channel_B0_mem_ref_write_data; -assign bresp_channel_Sum0_clk = clk; +assign bresp_channel_Sum0_clk = ap_clk; assign bresp_channel_Sum0_go = _guard137; assign bresp_channel_Sum0_reset = reset; assign bresp_channel_Sum0_BVALID = _guard138 ? Sum0_BVALID : 1'd0; assign signal_reg0_write_en = _guard146; -assign signal_reg0_clk = clk; +assign signal_reg0_clk = ap_clk; assign signal_reg0_reset = reset; assign signal_reg0_in = _guard152 ? 1'd1 : _guard153 ? 1'd0 : 1'd0; assign fsm3_write_en = _guard172; -assign fsm3_clk = clk; +assign fsm3_clk = ap_clk; assign fsm3_reset = reset; assign fsm3_in = _guard177 ? 2'd1 : @@ -7376,7 +7376,7 @@ assign fsm3_in = _guard188 ? 2'd2 : 2'd0; assign fsm5_write_en = _guard219; -assign fsm5_clk = clk; +assign fsm5_clk = ap_clk; assign fsm5_reset = reset; assign fsm5_in = _guard224 ? 3'd5 : @@ -7394,7 +7394,7 @@ assign curr_addr_axi_B0_write_en = _guard256 ? 1'd1 : _guard257 ? write_channel_B0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_B0_clk = clk; +assign curr_addr_axi_B0_clk = ap_clk; assign curr_addr_axi_B0_reset = reset; assign curr_addr_axi_B0_in = _guard258 ? read_channel_B0_curr_addr_axi_in : @@ -7404,7 +7404,7 @@ assign curr_addr_axi_B0_in = assign max_transfers_Sum0_write_en = _guard263 ? aw_channel_Sum0_max_transfers_write_en : 1'd0; -assign max_transfers_Sum0_clk = clk; +assign max_transfers_Sum0_clk = ap_clk; assign max_transfers_Sum0_reset = reset; assign max_transfers_Sum0_in = aw_channel_Sum0_max_transfers_in; assign main_compute_A0_read_data = @@ -7416,7 +7416,7 @@ assign main_compute_B0_read_data = assign main_compute_Sum0_done = _guard267 ? internal_mem_Sum0_done : 1'd0; -assign main_compute_clk = clk; +assign main_compute_clk = ap_clk; assign main_compute_B0_done = _guard268 ? internal_mem_B0_done : 1'd0; @@ -7426,7 +7426,7 @@ assign main_compute_A0_done = _guard270 ? internal_mem_A0_done : 1'd0; assign fsm1_write_en = _guard283; -assign fsm1_clk = clk; +assign fsm1_clk = ap_clk; assign fsm1_reset = reset; assign fsm1_in = _guard288 ? 2'd1 : @@ -7434,7 +7434,7 @@ assign fsm1_in = _guard294 ? 2'd2 : 2'd0; assign fsm4_write_en = _guard313; -assign fsm4_clk = clk; +assign fsm4_clk = ap_clk; assign fsm4_reset = reset; assign fsm4_in = _guard318 ? 2'd1 : @@ -7451,7 +7451,7 @@ assign curr_addr_axi_A0_write_en = _guard351 ? read_channel_A0_curr_addr_axi_write_en : _guard352 ? write_channel_A0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_A0_clk = clk; +assign curr_addr_axi_A0_clk = ap_clk; assign curr_addr_axi_A0_reset = reset; assign curr_addr_axi_A0_in = _guard353 ? read_channel_A0_curr_addr_axi_in : @@ -7473,7 +7473,7 @@ assign read_channel_A0_RLAST = assign read_channel_A0_RDATA = _guard362 ? A0_RDATA : 32'd0; -assign read_channel_A0_clk = clk; +assign read_channel_A0_clk = ap_clk; assign read_channel_A0_go = _guard363; assign read_channel_A0_reset = reset; assign read_channel_A0_RRESP = @@ -7496,7 +7496,7 @@ assign internal_mem_A0_write_en = _guard370 ? read_channel_A0_mem_ref_write_en : _guard371 ? write_channel_A0_mem_ref_write_en : 1'd0; -assign internal_mem_A0_clk = clk; +assign internal_mem_A0_clk = ap_clk; assign internal_mem_A0_addr0 = _guard372 ? main_compute_A0_addr0 : _guard373 ? read_channel_A0_mem_ref_addr0 : @@ -7521,7 +7521,7 @@ assign write_channel_B0_curr_addr_axi_out = assign write_channel_B0_max_transfers_out = _guard382 ? max_transfers_B0_out : 8'd0; -assign write_channel_B0_clk = clk; +assign write_channel_B0_clk = ap_clk; assign write_channel_B0_mem_ref_read_data = _guard383 ? internal_mem_B0_read_data : 32'd0; @@ -7541,7 +7541,7 @@ assign curr_addr_axi_Sum0_write_en = _guard391 ? 1'd1 : _guard392 ? write_channel_Sum0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_Sum0_clk = clk; +assign curr_addr_axi_Sum0_clk = ap_clk; assign curr_addr_axi_Sum0_reset = reset; assign curr_addr_axi_Sum0_in = _guard393 ? read_channel_Sum0_curr_addr_axi_in : @@ -7551,7 +7551,7 @@ assign curr_addr_axi_Sum0_in = assign ar_channel_Sum0_curr_addr_axi_out = _guard398 ? curr_addr_axi_Sum0_out : 64'd0; -assign ar_channel_Sum0_clk = clk; +assign ar_channel_Sum0_clk = ap_clk; assign ar_channel_Sum0_go = _guard399; assign ar_channel_Sum0_reset = reset; assign ar_channel_Sum0_ARREADY = @@ -7561,7 +7561,7 @@ assign ar_channel_Sum0_ARESETn = _guard401 ? Sum0_ARESETn : 1'd0; assign pd1_write_en = _guard410; -assign pd1_clk = clk; +assign pd1_clk = ap_clk; assign pd1_reset = reset; assign pd1_in = _guard413 ? 1'd1 : @@ -7577,7 +7577,7 @@ assign tdcc3_done_in = _guard437; assign aw_channel_B0_curr_addr_axi_out = _guard438 ? curr_addr_axi_B0_out : 64'd0; -assign aw_channel_B0_clk = clk; +assign aw_channel_B0_clk = ap_clk; assign aw_channel_B0_AWREADY = _guard439 ? B0_AWREADY : 1'd0; @@ -7587,7 +7587,7 @@ assign aw_channel_B0_ARESETn = _guard441 ? B0_ARESETn : 1'd0; assign fsm0_write_en = _guard454; -assign fsm0_clk = clk; +assign fsm0_clk = ap_clk; assign fsm0_reset = reset; assign fsm0_in = _guard459 ? 2'd1 : @@ -7595,7 +7595,7 @@ assign fsm0_in = _guard465 ? 2'd2 : 2'd0; assign fsm2_write_en = _guard484; -assign fsm2_clk = clk; +assign fsm2_clk = ap_clk; assign fsm2_reset = reset; assign fsm2_in = _guard489 ? 2'd1 : @@ -7609,7 +7609,7 @@ assign tdcc0_go_in = _guard512; assign ar_channel_A0_curr_addr_axi_out = _guard513 ? curr_addr_axi_A0_out : 64'd0; -assign ar_channel_A0_clk = clk; +assign ar_channel_A0_clk = ap_clk; assign ar_channel_A0_go = _guard514; assign ar_channel_A0_reset = reset; assign ar_channel_A0_ARREADY = @@ -7621,7 +7621,7 @@ assign ar_channel_A0_ARESETn = assign aw_channel_A0_curr_addr_axi_out = _guard517 ? curr_addr_axi_A0_out : 64'd0; -assign aw_channel_A0_clk = clk; +assign aw_channel_A0_clk = ap_clk; assign aw_channel_A0_AWREADY = _guard518 ? A0_AWREADY : 1'd0; @@ -7636,7 +7636,7 @@ assign invoke12_done_in = main_compute_done; assign invoke17_go_in = _guard531; assign invoke21_go_in = _guard537; assign pd2_write_en = _guard546; -assign pd2_clk = clk; +assign pd2_clk = ap_clk; assign pd2_reset = reset; assign pd2_in = _guard549 ? 1'd1 : @@ -7658,7 +7658,7 @@ assign write_channel_A0_curr_addr_axi_out = assign write_channel_A0_max_transfers_out = _guard570 ? max_transfers_A0_out : 8'd0; -assign write_channel_A0_clk = clk; +assign write_channel_A0_clk = ap_clk; assign write_channel_A0_mem_ref_read_data = _guard571 ? internal_mem_A0_read_data : 32'd0; @@ -7676,7 +7676,7 @@ assign write_channel_A0_curr_addr_axi_done = assign ar_channel_B0_curr_addr_axi_out = _guard576 ? curr_addr_axi_B0_out : 64'd0; -assign ar_channel_B0_clk = clk; +assign ar_channel_B0_clk = ap_clk; assign ar_channel_B0_go = _guard577; assign ar_channel_B0_reset = reset; assign ar_channel_B0_ARREADY = @@ -7686,7 +7686,7 @@ assign ar_channel_B0_ARESETn = _guard579 ? B0_ARESETn : 1'd0; assign signal_reg_write_en = _guard587; -assign signal_reg_clk = clk; +assign signal_reg_clk = ap_clk; assign signal_reg_reset = reset; assign signal_reg_in = _guard593 ? 1'd1 : @@ -7697,7 +7697,7 @@ assign wrapper_early_reset_static_par_thread0_done_in = _guard596; assign invoke24_done_in = bresp_channel_Sum0_done; assign tdcc1_done_in = _guard597; assign par1_done_in = _guard602; -assign bresp_channel_B0_clk = clk; +assign bresp_channel_B0_clk = ap_clk; assign bresp_channel_B0_go = _guard603; assign bresp_channel_B0_reset = reset; assign bresp_channel_B0_BVALID = @@ -7708,7 +7708,7 @@ assign internal_mem_Sum0_write_en = _guard606 ? main_compute_Sum0_write_en : _guard607 ? write_channel_Sum0_mem_ref_write_en : 1'd0; -assign internal_mem_Sum0_clk = clk; +assign internal_mem_Sum0_clk = ap_clk; assign internal_mem_Sum0_addr0 = _guard608 ? read_channel_Sum0_mem_ref_addr0 : _guard609 ? main_compute_Sum0_addr0 : @@ -7725,21 +7725,21 @@ assign internal_mem_Sum0_write_data = _guard615 ? main_compute_Sum0_write_data : 'x; assign pd_write_en = _guard624; -assign pd_clk = clk; +assign pd_clk = ap_clk; assign pd_reset = reset; assign pd_in = _guard627 ? 1'd1 : _guard632 ? 1'd0 : 1'd0; assign pd0_write_en = _guard641; -assign pd0_clk = clk; +assign pd0_clk = ap_clk; assign pd0_reset = reset; assign pd0_in = _guard644 ? 1'd1 : _guard649 ? 1'd0 : 1'd0; assign pd4_write_en = _guard658; -assign pd4_clk = clk; +assign pd4_clk = ap_clk; assign pd4_reset = reset; assign pd4_in = _guard661 ? 1'd1 : @@ -7749,7 +7749,7 @@ assign early_reset_static_par_thread0_go_in = _guard667; assign wrapper_early_reset_static_par_thread_done_in = _guard668; assign invoke22_done_in = aw_channel_Sum0_done; assign tdcc4_go_in = _guard674; -assign bresp_channel_A0_clk = clk; +assign bresp_channel_A0_clk = ap_clk; assign bresp_channel_A0_go = _guard675; assign bresp_channel_A0_reset = reset; assign bresp_channel_A0_BVALID = @@ -7763,13 +7763,13 @@ assign invoke21_done_in = bresp_channel_B0_done; assign max_transfers_A0_write_en = _guard690 ? aw_channel_A0_max_transfers_write_en : 1'd0; -assign max_transfers_A0_clk = clk; +assign max_transfers_A0_clk = ap_clk; assign max_transfers_A0_reset = reset; assign max_transfers_A0_in = aw_channel_A0_max_transfers_in; assign aw_channel_Sum0_curr_addr_axi_out = _guard692 ? curr_addr_axi_Sum0_out : 64'd0; -assign aw_channel_Sum0_clk = clk; +assign aw_channel_Sum0_clk = ap_clk; assign aw_channel_Sum0_AWREADY = _guard693 ? Sum0_AWREADY : 1'd0; @@ -7790,7 +7790,7 @@ assign write_channel_Sum0_curr_addr_axi_out = assign write_channel_Sum0_max_transfers_out = _guard699 ? max_transfers_Sum0_out : 8'd0; -assign write_channel_Sum0_clk = clk; +assign write_channel_Sum0_clk = ap_clk; assign write_channel_Sum0_mem_ref_read_data = _guard700 ? internal_mem_Sum0_read_data : 32'd0; @@ -7806,7 +7806,7 @@ assign write_channel_Sum0_curr_addr_axi_done = _guard704 ? curr_addr_axi_Sum0_done : 1'd0; assign pd3_write_en = _guard713; -assign pd3_clk = clk; +assign pd3_clk = ap_clk; assign pd3_reset = reset; assign pd3_in = _guard716 ? 1'd1 : @@ -7816,7 +7816,7 @@ assign tdcc4_done_in = _guard722; assign max_transfers_B0_write_en = _guard723 ? aw_channel_B0_max_transfers_write_en : 1'd0; -assign max_transfers_B0_clk = clk; +assign max_transfers_B0_clk = ap_clk; assign max_transfers_B0_reset = reset; assign max_transfers_B0_in = aw_channel_B0_max_transfers_in; assign curr_addr_internal_mem_Sum0_write_en = @@ -7824,7 +7824,7 @@ assign curr_addr_internal_mem_Sum0_write_en = _guard726 ? 1'd1 : _guard727 ? write_channel_Sum0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_Sum0_clk = clk; +assign curr_addr_internal_mem_Sum0_clk = ap_clk; assign curr_addr_internal_mem_Sum0_reset = reset; assign curr_addr_internal_mem_Sum0_in = _guard728 ? read_channel_Sum0_curr_addr_internal_mem_in : diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.futil b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.futil index d294bc0e5d..3e67016064 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.futil +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-axi-wrapped.futil @@ -133,8 +133,8 @@ component m_read_channel(ARESETn: 1, RVALID: 1, RLAST: 1, RDATA: 32, RRESP: 2) - n_RLAST = std_reg(1); read_data_reg = std_reg(32); bt_reg = std_reg(1); - curr_addr_internal_mem_incr = std_add(3); - curr_addr_axi_incr = std_add(64); + curr_addr_internal_mem_incr_1_1 = std_add(3); + curr_addr_axi_incr_4_2 = std_add(64); } wires { RREADY = rready.out; @@ -162,19 +162,19 @@ component m_read_channel(ARESETn: 1, RVALID: 1, RLAST: 1, RDATA: 32, RRESP: 2) - mem_ref.content_en = 1'd1; service_read_transfer[done] = mem_ref.done; } - group curr_addr_internal_mem_incr_group { - curr_addr_internal_mem_incr.left = curr_addr_internal_mem.out; - curr_addr_internal_mem_incr.right = 3'd1; + group curr_addr_internal_mem_incr_1_1_group { + curr_addr_internal_mem_incr_1_1.left = curr_addr_internal_mem.out; + curr_addr_internal_mem_incr_1_1.right = 3'd1; curr_addr_internal_mem.write_en = 1'd1; - curr_addr_internal_mem.in = curr_addr_internal_mem_incr.out; - curr_addr_internal_mem_incr_group[done] = curr_addr_internal_mem.done; + curr_addr_internal_mem.in = curr_addr_internal_mem_incr_1_1.out; + curr_addr_internal_mem_incr_1_1_group[done] = curr_addr_internal_mem.done; } - group curr_addr_axi_incr_group { - curr_addr_axi_incr.left = curr_addr_axi.out; - curr_addr_axi_incr.right = 64'd4; + group curr_addr_axi_incr_4_2_group { + curr_addr_axi_incr_4_2.left = curr_addr_axi.out; + curr_addr_axi_incr_4_2.right = 64'd4; curr_addr_axi.write_en = 1'd1; - curr_addr_axi.in = curr_addr_axi_incr.out; - curr_addr_axi_incr_group[done] = curr_addr_axi.done; + curr_addr_axi.in = curr_addr_axi_incr_4_2.out; + curr_addr_axi_incr_4_2_group[done] = curr_addr_axi.done; } } control { @@ -186,8 +186,8 @@ component m_read_channel(ARESETn: 1, RVALID: 1, RLAST: 1, RDATA: 32, RRESP: 2) - block_transfer; service_read_transfer; par { - curr_addr_internal_mem_incr_group; - curr_addr_axi_incr_group; + curr_addr_internal_mem_incr_1_1_group; + curr_addr_axi_incr_4_2_group; } } } @@ -205,9 +205,9 @@ component m_write_channel(ARESETn: 1, WREADY: 1) -> (WVALID: 1, WLAST: 1, WDATA: ref max_transfers = std_reg(8); n_finished_last_transfer = std_reg(1); bt_reg = std_reg(1); - curr_addr_internal_mem_incr = std_add(3); - curr_addr_axi_incr = std_add(64); - curr_transfer_count_incr = std_add(8); + curr_addr_internal_mem_incr_1_1 = std_add(3); + curr_addr_axi_incr_4_2 = std_add(64); + curr_transfer_count_incr_1_3 = std_add(8); } wires { WVALID = wvalid.out; @@ -231,26 +231,26 @@ component m_write_channel(ARESETn: 1, WREADY: 1) -> (WVALID: 1, WLAST: 1, WDATA: bt_reg.write_en = 1'd1; service_write_transfer[done] = bt_reg.out; } - group curr_addr_internal_mem_incr_group { - curr_addr_internal_mem_incr.left = curr_addr_internal_mem.out; - curr_addr_internal_mem_incr.right = 3'd1; + group curr_addr_internal_mem_incr_1_1_group { + curr_addr_internal_mem_incr_1_1.left = curr_addr_internal_mem.out; + curr_addr_internal_mem_incr_1_1.right = 3'd1; curr_addr_internal_mem.write_en = 1'd1; - curr_addr_internal_mem.in = curr_addr_internal_mem_incr.out; - curr_addr_internal_mem_incr_group[done] = curr_addr_internal_mem.done; + curr_addr_internal_mem.in = curr_addr_internal_mem_incr_1_1.out; + curr_addr_internal_mem_incr_1_1_group[done] = curr_addr_internal_mem.done; } - group curr_addr_axi_incr_group { - curr_addr_axi_incr.left = curr_addr_axi.out; - curr_addr_axi_incr.right = 64'd4; + group curr_addr_axi_incr_4_2_group { + curr_addr_axi_incr_4_2.left = curr_addr_axi.out; + curr_addr_axi_incr_4_2.right = 64'd4; curr_addr_axi.write_en = 1'd1; - curr_addr_axi.in = curr_addr_axi_incr.out; - curr_addr_axi_incr_group[done] = curr_addr_axi.done; + curr_addr_axi.in = curr_addr_axi_incr_4_2.out; + curr_addr_axi_incr_4_2_group[done] = curr_addr_axi.done; } - group curr_transfer_count_incr_group { - curr_transfer_count_incr.left = curr_transfer_count.out; - curr_transfer_count_incr.right = 8'd1; + group curr_transfer_count_incr_1_3_group { + curr_transfer_count_incr_1_3.left = curr_transfer_count.out; + curr_transfer_count_incr_1_3.right = 8'd1; curr_transfer_count.write_en = 1'd1; - curr_transfer_count.in = curr_transfer_count_incr.out; - curr_transfer_count_incr_group[done] = curr_transfer_count.done; + curr_transfer_count.in = curr_transfer_count_incr_1_3.out; + curr_transfer_count_incr_1_3_group[done] = curr_transfer_count.done; } } control { @@ -262,9 +262,9 @@ component m_write_channel(ARESETn: 1, WREADY: 1) -> (WVALID: 1, WLAST: 1, WDATA: invoke bt_reg(in=1'd0)(); service_write_transfer; par { - curr_addr_internal_mem_incr_group; - curr_transfer_count_incr_group; - curr_addr_axi_incr_group; + curr_addr_internal_mem_incr_1_1_group; + curr_transfer_count_incr_1_3_group; + curr_addr_axi_incr_4_2_group; invoke w_handshake_occurred(in=1'd0)(); } } @@ -296,7 +296,7 @@ component m_bresp_channel(ARESETn: 1, BVALID: 1) -> (BREADY: 1) { } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); curr_addr_internal_mem_A0 = std_reg(3); diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v index 8baa0b908c..c2f7460952 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add-verilog.v @@ -327,7 +327,7 @@ module std_fp_div_pipe #( running <= running; end - always_comb begin + always @* begin if (acc >= {1'b0, right}) begin acc_next = acc - right; {acc_next, quotient_next} = {acc_next[WIDTH-1:0], quotient, 1'b1}; @@ -1172,7 +1172,7 @@ module std_bit_slice #( input wire logic [IN_WIDTH-1:0] in, output logic [OUT_WIDTH-1:0] out ); - assign out = in[END_IDX:START_IDX]; + assign out = in[END_IDX:START_IDX]; `ifdef VERILATOR always_comb begin @@ -1188,6 +1188,74 @@ module std_bit_slice #( endmodule +module std_skid_buffer #( + parameter WIDTH = 32 +)( + input wire logic [WIDTH-1:0] in, + input wire logic i_valid, + input wire logic i_ready, + input wire logic clk, + input wire logic reset, + output logic [WIDTH-1:0] out, + output logic o_valid, + output logic o_ready +); + logic [WIDTH-1:0] val; + logic bypass_rg; + always @(posedge clk) begin + // Reset + if (reset) begin + // Internal Registers + val <= '0; + bypass_rg <= 1'b1; + end + // Out of reset + else begin + // Bypass state + if (bypass_rg) begin + if (!i_ready && i_valid) begin + val <= in; // Data skid happened, store to buffer + bypass_rg <= 1'b0; // To skid mode + end + end + // Skid state + else begin + if (i_ready) begin + bypass_rg <= 1'b1; // Back to bypass mode + end + end + end + end + + assign o_ready = bypass_rg; + assign out = bypass_rg ? in : val; + assign o_valid = bypass_rg ? i_valid : 1'b1; +endmodule + +module std_bypass_reg #( + parameter WIDTH = 32 +)( + input wire logic [WIDTH-1:0] in, + input wire logic write_en, + input wire logic clk, + input wire logic reset, + output logic [WIDTH-1:0] out, + output logic done +); + logic [WIDTH-1:0] val; + assign out = write_en ? in : val; + + always_ff @(posedge clk) begin + if (reset) begin + val <= 0; + done <= 0; + end else if (write_en) begin + val <= in; + done <= 1'd1; + end else done <= 1'd0; + end +endmodule + module undef #( parameter WIDTH = 32 ) ( @@ -1338,76 +1406,76 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; -logic adder1_left; -logic adder1_right; -logic adder1_out; -logic adder2_left; -logic adder2_right; -logic adder2_out; logic ud_out; -logic ud0_out; logic ud1_out; logic ud2_out; +logic ud3_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic signal_reg1_in; +logic signal_reg1_write_en; +logic signal_reg1_clk; +logic signal_reg1_reset; +logic signal_reg1_out; +logic signal_reg1_done; +logic signal_reg2_in; +logic signal_reg2_write_en; +logic signal_reg2_clk; +logic signal_reg2_reset; +logic signal_reg2_out; +logic signal_reg2_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic do_ar_transfer_go_in; logic do_ar_transfer_go_out; logic do_ar_transfer_done_in; logic do_ar_transfer_done_out; -logic early_reset_perform_reads_group0_go_in; -logic early_reset_perform_reads_group0_go_out; -logic early_reset_perform_reads_group0_done_in; -logic early_reset_perform_reads_group0_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic early_reset_static_par1_go_in; -logic early_reset_static_par1_go_out; -logic early_reset_static_par1_done_in; -logic early_reset_static_par1_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_perform_reads_group0_go_in; -logic wrapper_early_reset_perform_reads_group0_go_out; -logic wrapper_early_reset_perform_reads_group0_done_in; -logic wrapper_early_reset_perform_reads_group0_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par1_go_in; -logic wrapper_early_reset_static_par1_go_out; -logic wrapper_early_reset_static_par1_done_in; -logic wrapper_early_reset_static_par1_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic early_reset_static_par_thread1_go_in; +logic early_reset_static_par_thread1_go_out; +logic early_reset_static_par_thread1_done_in; +logic early_reset_static_par_thread1_done_out; +logic early_reset_perform_reads_group00_go_in; +logic early_reset_perform_reads_group00_go_out; +logic early_reset_perform_reads_group00_done_in; +logic early_reset_perform_reads_group00_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_perform_reads_group00_go_in; +logic wrapper_early_reset_perform_reads_group00_go_out; +logic wrapper_early_reset_perform_reads_group00_done_in; +logic wrapper_early_reset_perform_reads_group00_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread1_go_in; +logic wrapper_early_reset_static_par_thread1_go_out; +logic wrapper_early_reset_static_par_thread1_done_in; +logic wrapper_early_reset_static_par_thread1_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -1492,54 +1560,11 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); -std_add # ( - .WIDTH(1) -) adder1 ( - .left(adder1_left), - .out(adder1_out), - .right(adder1_right) -); -std_add # ( - .WIDTH(1) -) adder2 ( - .left(adder2_left), - .out(adder2_out), - .right(adder2_right) -); undef # ( .WIDTH(1) ) ud ( .out(ud_out) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); undef # ( .WIDTH(1) ) ud1 ( @@ -1550,6 +1575,11 @@ undef # ( ) ud2 ( .out(ud2_out) ); +undef # ( + .WIDTH(1) +) ud3 ( + .out(ud3_out) +); std_reg # ( .WIDTH(1) ) signal_reg ( @@ -1560,15 +1590,45 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg1 ( + .clk(signal_reg1_clk), + .done(signal_reg1_done), + .in(signal_reg1_in), + .out(signal_reg1_out), + .reset(signal_reg1_reset), + .write_en(signal_reg1_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg2 ( + .clk(signal_reg2_clk), + .done(signal_reg2_done), + .in(signal_reg2_in), + .out(signal_reg2_out), + .reset(signal_reg2_reset), + .write_en(signal_reg2_write_en) +); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -1584,99 +1644,99 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_perform_reads_group0_go ( - .in(early_reset_perform_reads_group0_go_in), - .out(early_reset_perform_reads_group0_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_perform_reads_group0_done ( - .in(early_reset_perform_reads_group0_done_in), - .out(early_reset_perform_reads_group0_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread1_go ( + .in(early_reset_static_par_thread1_go_in), + .out(early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread1_done ( + .in(early_reset_static_par_thread1_done_in), + .out(early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_go ( - .in(early_reset_static_par1_go_in), - .out(early_reset_static_par1_go_out) +) early_reset_perform_reads_group00_go ( + .in(early_reset_perform_reads_group00_go_in), + .out(early_reset_perform_reads_group00_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_done ( - .in(early_reset_static_par1_done_in), - .out(early_reset_static_par1_done_out) +) early_reset_perform_reads_group00_done ( + .in(early_reset_perform_reads_group00_done_in), + .out(early_reset_perform_reads_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_reads_group0_go ( - .in(wrapper_early_reset_perform_reads_group0_go_in), - .out(wrapper_early_reset_perform_reads_group0_go_out) +) wrapper_early_reset_perform_reads_group00_go ( + .in(wrapper_early_reset_perform_reads_group00_go_in), + .out(wrapper_early_reset_perform_reads_group00_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_reads_group0_done ( - .in(wrapper_early_reset_perform_reads_group0_done_in), - .out(wrapper_early_reset_perform_reads_group0_done_out) +) wrapper_early_reset_perform_reads_group00_done ( + .in(wrapper_early_reset_perform_reads_group00_done_in), + .out(wrapper_early_reset_perform_reads_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_go ( - .in(wrapper_early_reset_static_par1_go_in), - .out(wrapper_early_reset_static_par1_go_out) +) wrapper_early_reset_static_par_thread1_go ( + .in(wrapper_early_reset_static_par_thread1_go_in), + .out(wrapper_early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_done ( - .in(wrapper_early_reset_static_par1_done_in), - .out(wrapper_early_reset_static_par1_done_out) +) wrapper_early_reset_static_par_thread1_done ( + .in(wrapper_early_reset_static_par_thread1_done_in), + .out(wrapper_early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) @@ -1691,475 +1751,415 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par0_go_out; -wire _guard2 = early_reset_static_par0_go_out; -wire _guard3 = do_ar_transfer_done_out; +wire _guard1 = signal_reg1_out; +wire _guard2 = _guard0 & _guard0; +wire _guard3 = signal_reg1_out; wire _guard4 = ~_guard3; -wire _guard5 = fsm0_out == 3'd3; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = tdcc_go_out; -wire _guard8 = _guard6 & _guard7; -wire _guard9 = tdcc_done_out; -wire _guard10 = do_ar_transfer_go_out; -wire _guard11 = do_ar_transfer_go_out; -wire _guard12 = do_ar_transfer_go_out; -wire _guard13 = do_ar_transfer_go_out; -wire _guard14 = do_ar_transfer_go_out; -wire _guard15 = early_reset_perform_reads_group0_go_out; -wire _guard16 = early_reset_static_par_go_out; -wire _guard17 = _guard15 | _guard16; -wire _guard18 = early_reset_static_par0_go_out; -wire _guard19 = _guard17 | _guard18; -wire _guard20 = early_reset_static_par1_go_out; -wire _guard21 = _guard19 | _guard20; -wire _guard22 = fsm_out == 1'd0; -wire _guard23 = ~_guard22; -wire _guard24 = early_reset_static_par0_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = fsm_out == 1'd0; -wire _guard27 = ~_guard26; -wire _guard28 = early_reset_perform_reads_group0_go_out; -wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = ~_guard30; -wire _guard32 = early_reset_static_par1_go_out; +wire _guard5 = _guard2 & _guard4; +wire _guard6 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = _guard1 | _guard7; +wire _guard9 = _guard0 & _guard0; +wire _guard10 = signal_reg1_out; +wire _guard11 = ~_guard10; +wire _guard12 = _guard9 & _guard11; +wire _guard13 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = signal_reg1_out; +wire _guard16 = do_ar_transfer_done_out; +wire _guard17 = ~_guard16; +wire _guard18 = fsm_out == 3'd3; +wire _guard19 = _guard17 & _guard18; +wire _guard20 = tdcc_go_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = tdcc_done_out; +wire _guard23 = do_ar_transfer_go_out; +wire _guard24 = do_ar_transfer_go_out; +wire _guard25 = do_ar_transfer_go_out; +wire _guard26 = do_ar_transfer_go_out; +wire _guard27 = do_ar_transfer_go_out; +wire _guard28 = fsm_out == 3'd6; +wire _guard29 = fsm_out == 3'd0; +wire _guard30 = wrapper_early_reset_static_par_thread_done_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = tdcc_go_out; wire _guard33 = _guard31 & _guard32; -wire _guard34 = fsm_out == 1'd0; -wire _guard35 = early_reset_perform_reads_group0_go_out; -wire _guard36 = _guard34 & _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = early_reset_static_par_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard36 | _guard39; -wire _guard41 = fsm_out == 1'd0; -wire _guard42 = early_reset_static_par0_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard40 | _guard43; -wire _guard45 = fsm_out == 1'd0; -wire _guard46 = early_reset_static_par1_go_out; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = _guard44 | _guard47; -wire _guard49 = fsm_out == 1'd0; -wire _guard50 = ~_guard49; -wire _guard51 = early_reset_static_par_go_out; -wire _guard52 = _guard50 & _guard51; -wire _guard53 = early_reset_perform_reads_group0_go_out; -wire _guard54 = early_reset_perform_reads_group0_go_out; -wire _guard55 = wrapper_early_reset_static_par0_go_out; -wire _guard56 = fsm_out == 1'd0; -wire _guard57 = signal_reg_out; -wire _guard58 = _guard56 & _guard57; -wire _guard59 = ar_handshake_occurred_out; -wire _guard60 = ~_guard59; -wire _guard61 = do_ar_transfer_go_out; -wire _guard62 = _guard60 & _guard61; -wire _guard63 = early_reset_static_par0_go_out; -wire _guard64 = _guard62 | _guard63; -wire _guard65 = arvalid_out; -wire _guard66 = ARREADY; +wire _guard34 = _guard28 | _guard33; +wire _guard35 = fsm_out == 3'd1; +wire _guard36 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard37 = comb_reg_out; +wire _guard38 = _guard36 & _guard37; +wire _guard39 = _guard35 & _guard38; +wire _guard40 = tdcc_go_out; +wire _guard41 = _guard39 & _guard40; +wire _guard42 = _guard34 | _guard41; +wire _guard43 = fsm_out == 3'd5; +wire _guard44 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard45 = comb_reg_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = _guard43 & _guard46; +wire _guard48 = tdcc_go_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = _guard42 | _guard49; +wire _guard51 = fsm_out == 3'd2; +wire _guard52 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard53 = _guard51 & _guard52; +wire _guard54 = tdcc_go_out; +wire _guard55 = _guard53 & _guard54; +wire _guard56 = _guard50 | _guard55; +wire _guard57 = fsm_out == 3'd3; +wire _guard58 = do_ar_transfer_done_out; +wire _guard59 = _guard57 & _guard58; +wire _guard60 = tdcc_go_out; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = _guard56 | _guard61; +wire _guard63 = fsm_out == 3'd4; +wire _guard64 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard65 = _guard63 & _guard64; +wire _guard66 = tdcc_go_out; wire _guard67 = _guard65 & _guard66; -wire _guard68 = do_ar_transfer_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = early_reset_static_par0_go_out; -wire _guard71 = early_reset_perform_reads_group0_go_out; -wire _guard72 = early_reset_perform_reads_group0_go_out; -wire _guard73 = early_reset_perform_reads_group0_go_out; -wire _guard74 = early_reset_perform_reads_group0_go_out; -wire _guard75 = early_reset_static_par_go_out; -wire _guard76 = early_reset_static_par_go_out; -wire _guard77 = wrapper_early_reset_static_par1_go_out; -wire _guard78 = wrapper_early_reset_static_par_done_out; -wire _guard79 = ~_guard78; -wire _guard80 = fsm0_out == 3'd0; -wire _guard81 = _guard79 & _guard80; -wire _guard82 = tdcc_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = fsm_out == 1'd0; -wire _guard85 = signal_reg_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = early_reset_static_par_go_out; -wire _guard88 = early_reset_static_par1_go_out; -wire _guard89 = _guard87 | _guard88; -wire _guard90 = early_reset_static_par_go_out; -wire _guard91 = early_reset_static_par1_go_out; -wire _guard92 = fsm_out == 1'd0; -wire _guard93 = signal_reg_out; +wire _guard68 = _guard62 | _guard67; +wire _guard69 = fsm_out == 3'd1; +wire _guard70 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard71 = comb_reg_out; +wire _guard72 = ~_guard71; +wire _guard73 = _guard70 & _guard72; +wire _guard74 = _guard69 & _guard73; +wire _guard75 = tdcc_go_out; +wire _guard76 = _guard74 & _guard75; +wire _guard77 = _guard68 | _guard76; +wire _guard78 = fsm_out == 3'd5; +wire _guard79 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard80 = comb_reg_out; +wire _guard81 = ~_guard80; +wire _guard82 = _guard79 & _guard81; +wire _guard83 = _guard78 & _guard82; +wire _guard84 = tdcc_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = _guard77 | _guard85; +wire _guard87 = fsm_out == 3'd1; +wire _guard88 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard89 = comb_reg_out; +wire _guard90 = ~_guard89; +wire _guard91 = _guard88 & _guard90; +wire _guard92 = _guard87 & _guard91; +wire _guard93 = tdcc_go_out; wire _guard94 = _guard92 & _guard93; -wire _guard95 = early_reset_static_par1_go_out; -wire _guard96 = early_reset_static_par1_go_out; -wire _guard97 = fsm0_out == 3'd6; -wire _guard98 = fsm0_out == 3'd0; -wire _guard99 = wrapper_early_reset_static_par_done_out; -wire _guard100 = _guard98 & _guard99; +wire _guard95 = fsm_out == 3'd5; +wire _guard96 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard97 = comb_reg_out; +wire _guard98 = ~_guard97; +wire _guard99 = _guard96 & _guard98; +wire _guard100 = _guard95 & _guard99; wire _guard101 = tdcc_go_out; wire _guard102 = _guard100 & _guard101; -wire _guard103 = _guard97 | _guard102; -wire _guard104 = fsm0_out == 3'd1; -wire _guard105 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard106 = comb_reg_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = _guard104 & _guard107; -wire _guard109 = tdcc_go_out; -wire _guard110 = _guard108 & _guard109; -wire _guard111 = _guard103 | _guard110; -wire _guard112 = fsm0_out == 3'd5; -wire _guard113 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard114 = comb_reg_out; +wire _guard103 = _guard94 | _guard102; +wire _guard104 = fsm_out == 3'd4; +wire _guard105 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard106 = _guard104 & _guard105; +wire _guard107 = tdcc_go_out; +wire _guard108 = _guard106 & _guard107; +wire _guard109 = fsm_out == 3'd1; +wire _guard110 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard111 = comb_reg_out; +wire _guard112 = _guard110 & _guard111; +wire _guard113 = _guard109 & _guard112; +wire _guard114 = tdcc_go_out; wire _guard115 = _guard113 & _guard114; -wire _guard116 = _guard112 & _guard115; -wire _guard117 = tdcc_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = _guard111 | _guard118; -wire _guard120 = fsm0_out == 3'd2; -wire _guard121 = wrapper_early_reset_static_par0_done_out; +wire _guard116 = fsm_out == 3'd5; +wire _guard117 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard118 = comb_reg_out; +wire _guard119 = _guard117 & _guard118; +wire _guard120 = _guard116 & _guard119; +wire _guard121 = tdcc_go_out; wire _guard122 = _guard120 & _guard121; -wire _guard123 = tdcc_go_out; -wire _guard124 = _guard122 & _guard123; -wire _guard125 = _guard119 | _guard124; -wire _guard126 = fsm0_out == 3'd3; -wire _guard127 = do_ar_transfer_done_out; +wire _guard123 = _guard115 | _guard122; +wire _guard124 = fsm_out == 3'd3; +wire _guard125 = do_ar_transfer_done_out; +wire _guard126 = _guard124 & _guard125; +wire _guard127 = tdcc_go_out; wire _guard128 = _guard126 & _guard127; -wire _guard129 = tdcc_go_out; -wire _guard130 = _guard128 & _guard129; -wire _guard131 = _guard125 | _guard130; -wire _guard132 = fsm0_out == 3'd4; -wire _guard133 = wrapper_early_reset_static_par1_done_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = tdcc_go_out; -wire _guard136 = _guard134 & _guard135; -wire _guard137 = _guard131 | _guard136; -wire _guard138 = fsm0_out == 3'd1; -wire _guard139 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard140 = comb_reg_out; -wire _guard141 = ~_guard140; -wire _guard142 = _guard139 & _guard141; -wire _guard143 = _guard138 & _guard142; -wire _guard144 = tdcc_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = _guard137 | _guard145; -wire _guard147 = fsm0_out == 3'd5; -wire _guard148 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard149 = comb_reg_out; -wire _guard150 = ~_guard149; -wire _guard151 = _guard148 & _guard150; -wire _guard152 = _guard147 & _guard151; -wire _guard153 = tdcc_go_out; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = _guard146 | _guard154; -wire _guard156 = fsm0_out == 3'd1; -wire _guard157 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard158 = comb_reg_out; -wire _guard159 = ~_guard158; -wire _guard160 = _guard157 & _guard159; -wire _guard161 = _guard156 & _guard160; -wire _guard162 = tdcc_go_out; -wire _guard163 = _guard161 & _guard162; -wire _guard164 = fsm0_out == 3'd5; -wire _guard165 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard166 = comb_reg_out; -wire _guard167 = ~_guard166; -wire _guard168 = _guard165 & _guard167; -wire _guard169 = _guard164 & _guard168; -wire _guard170 = tdcc_go_out; +wire _guard129 = fsm_out == 3'd0; +wire _guard130 = wrapper_early_reset_static_par_thread_done_out; +wire _guard131 = _guard129 & _guard130; +wire _guard132 = tdcc_go_out; +wire _guard133 = _guard131 & _guard132; +wire _guard134 = fsm_out == 3'd6; +wire _guard135 = fsm_out == 3'd2; +wire _guard136 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard137 = _guard135 & _guard136; +wire _guard138 = tdcc_go_out; +wire _guard139 = _guard137 & _guard138; +wire _guard140 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard141 = ar_handshake_occurred_out; +wire _guard142 = ~_guard141; +wire _guard143 = do_ar_transfer_go_out; +wire _guard144 = _guard142 & _guard143; +wire _guard145 = early_reset_static_par_thread0_go_out; +wire _guard146 = _guard144 | _guard145; +wire _guard147 = arvalid_out; +wire _guard148 = ARREADY; +wire _guard149 = _guard147 & _guard148; +wire _guard150 = do_ar_transfer_go_out; +wire _guard151 = _guard149 & _guard150; +wire _guard152 = early_reset_static_par_thread0_go_out; +wire _guard153 = signal_reg0_out; +wire _guard154 = _guard0 & _guard0; +wire _guard155 = signal_reg0_out; +wire _guard156 = ~_guard155; +wire _guard157 = _guard154 & _guard156; +wire _guard158 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = _guard153 | _guard159; +wire _guard161 = _guard0 & _guard0; +wire _guard162 = signal_reg0_out; +wire _guard163 = ~_guard162; +wire _guard164 = _guard161 & _guard163; +wire _guard165 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard166 = _guard164 & _guard165; +wire _guard167 = signal_reg0_out; +wire _guard168 = wrapper_early_reset_static_par_thread_done_out; +wire _guard169 = ~_guard168; +wire _guard170 = fsm_out == 3'd0; wire _guard171 = _guard169 & _guard170; -wire _guard172 = _guard163 | _guard171; -wire _guard173 = fsm0_out == 3'd4; -wire _guard174 = wrapper_early_reset_static_par1_done_out; -wire _guard175 = _guard173 & _guard174; -wire _guard176 = tdcc_go_out; -wire _guard177 = _guard175 & _guard176; -wire _guard178 = fsm0_out == 3'd1; -wire _guard179 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard180 = comb_reg_out; -wire _guard181 = _guard179 & _guard180; -wire _guard182 = _guard178 & _guard181; -wire _guard183 = tdcc_go_out; -wire _guard184 = _guard182 & _guard183; -wire _guard185 = fsm0_out == 3'd5; -wire _guard186 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard187 = comb_reg_out; -wire _guard188 = _guard186 & _guard187; -wire _guard189 = _guard185 & _guard188; +wire _guard172 = tdcc_go_out; +wire _guard173 = _guard171 & _guard172; +wire _guard174 = early_reset_perform_reads_group00_go_out; +wire _guard175 = early_reset_perform_reads_group00_go_out; +wire _guard176 = early_reset_perform_reads_group00_go_out; +wire _guard177 = early_reset_perform_reads_group00_go_out; +wire _guard178 = early_reset_static_par_thread_go_out; +wire _guard179 = early_reset_static_par_thread_go_out; +wire _guard180 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard181 = ~_guard180; +wire _guard182 = fsm_out == 3'd1; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = tdcc_go_out; +wire _guard185 = _guard183 & _guard184; +wire _guard186 = wrapper_early_reset_perform_reads_group00_done_out; +wire _guard187 = ~_guard186; +wire _guard188 = fsm_out == 3'd5; +wire _guard189 = _guard187 & _guard188; wire _guard190 = tdcc_go_out; wire _guard191 = _guard189 & _guard190; -wire _guard192 = _guard184 | _guard191; -wire _guard193 = fsm0_out == 3'd3; -wire _guard194 = do_ar_transfer_done_out; -wire _guard195 = _guard193 & _guard194; -wire _guard196 = tdcc_go_out; -wire _guard197 = _guard195 & _guard196; -wire _guard198 = fsm0_out == 3'd0; -wire _guard199 = wrapper_early_reset_static_par_done_out; -wire _guard200 = _guard198 & _guard199; -wire _guard201 = tdcc_go_out; -wire _guard202 = _guard200 & _guard201; -wire _guard203 = fsm0_out == 3'd6; -wire _guard204 = fsm0_out == 3'd2; -wire _guard205 = wrapper_early_reset_static_par0_done_out; +wire _guard192 = _guard185 | _guard191; +wire _guard193 = early_reset_static_par_thread_go_out; +wire _guard194 = early_reset_static_par_thread1_go_out; +wire _guard195 = _guard193 | _guard194; +wire _guard196 = early_reset_static_par_thread_go_out; +wire _guard197 = early_reset_static_par_thread1_go_out; +wire _guard198 = signal_reg0_out; +wire _guard199 = wrapper_early_reset_perform_reads_group00_go_out; +wire _guard200 = signal_reg2_out; +wire _guard201 = _guard0 & _guard0; +wire _guard202 = signal_reg2_out; +wire _guard203 = ~_guard202; +wire _guard204 = _guard201 & _guard203; +wire _guard205 = wrapper_early_reset_static_par_thread1_go_out; wire _guard206 = _guard204 & _guard205; -wire _guard207 = tdcc_go_out; -wire _guard208 = _guard206 & _guard207; -wire _guard209 = early_reset_static_par_go_out; -wire _guard210 = early_reset_static_par_go_out; -wire _guard211 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard212 = ~_guard211; -wire _guard213 = fsm0_out == 3'd1; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc_go_out; -wire _guard216 = _guard214 & _guard215; -wire _guard217 = wrapper_early_reset_perform_reads_group0_done_out; -wire _guard218 = ~_guard217; -wire _guard219 = fsm0_out == 3'd5; +wire _guard207 = _guard200 | _guard206; +wire _guard208 = _guard0 & _guard0; +wire _guard209 = signal_reg2_out; +wire _guard210 = ~_guard209; +wire _guard211 = _guard208 & _guard210; +wire _guard212 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard213 = _guard211 & _guard212; +wire _guard214 = signal_reg2_out; +wire _guard215 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard216 = ~_guard215; +wire _guard217 = fsm_out == 3'd2; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = tdcc_go_out; wire _guard220 = _guard218 & _guard219; -wire _guard221 = tdcc_go_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = _guard216 | _guard222; -wire _guard224 = do_ar_transfer_go_out; -wire _guard225 = early_reset_static_par0_go_out; -wire _guard226 = _guard224 | _guard225; -wire _guard227 = ARREADY; -wire _guard228 = arvalid_out; -wire _guard229 = _guard227 & _guard228; -wire _guard230 = do_ar_transfer_go_out; +wire _guard221 = do_ar_transfer_go_out; +wire _guard222 = early_reset_static_par_thread0_go_out; +wire _guard223 = _guard221 | _guard222; +wire _guard224 = ARREADY; +wire _guard225 = arvalid_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = do_ar_transfer_go_out; +wire _guard228 = _guard226 & _guard227; +wire _guard229 = ARREADY; +wire _guard230 = arvalid_out; wire _guard231 = _guard229 & _guard230; -wire _guard232 = ARREADY; -wire _guard233 = arvalid_out; +wire _guard232 = ~_guard231; +wire _guard233 = do_ar_transfer_go_out; wire _guard234 = _guard232 & _guard233; -wire _guard235 = ~_guard234; -wire _guard236 = do_ar_transfer_go_out; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = early_reset_static_par0_go_out; -wire _guard239 = _guard237 | _guard238; -wire _guard240 = fsm_out == 1'd0; -wire _guard241 = signal_reg_out; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = fsm_out == 1'd0; -wire _guard244 = signal_reg_out; -wire _guard245 = ~_guard244; -wire _guard246 = _guard243 & _guard245; -wire _guard247 = wrapper_early_reset_static_par_go_out; -wire _guard248 = _guard246 & _guard247; -wire _guard249 = _guard242 | _guard248; -wire _guard250 = fsm_out == 1'd0; +wire _guard235 = early_reset_static_par_thread0_go_out; +wire _guard236 = _guard234 | _guard235; +wire _guard237 = signal_reg_out; +wire _guard238 = _guard0 & _guard0; +wire _guard239 = signal_reg_out; +wire _guard240 = ~_guard239; +wire _guard241 = _guard238 & _guard240; +wire _guard242 = wrapper_early_reset_static_par_thread_go_out; +wire _guard243 = _guard241 & _guard242; +wire _guard244 = _guard237 | _guard243; +wire _guard245 = _guard0 & _guard0; +wire _guard246 = signal_reg_out; +wire _guard247 = ~_guard246; +wire _guard248 = _guard245 & _guard247; +wire _guard249 = wrapper_early_reset_static_par_thread_go_out; +wire _guard250 = _guard248 & _guard249; wire _guard251 = signal_reg_out; -wire _guard252 = ~_guard251; -wire _guard253 = _guard250 & _guard252; -wire _guard254 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = _guard249 | _guard255; -wire _guard257 = fsm_out == 1'd0; -wire _guard258 = signal_reg_out; -wire _guard259 = ~_guard258; -wire _guard260 = _guard257 & _guard259; -wire _guard261 = wrapper_early_reset_static_par0_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = _guard256 | _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = ~_guard265; -wire _guard267 = _guard264 & _guard266; -wire _guard268 = wrapper_early_reset_static_par1_go_out; -wire _guard269 = _guard267 & _guard268; -wire _guard270 = _guard263 | _guard269; -wire _guard271 = fsm_out == 1'd0; -wire _guard272 = signal_reg_out; -wire _guard273 = ~_guard272; -wire _guard274 = _guard271 & _guard273; -wire _guard275 = wrapper_early_reset_static_par_go_out; +wire _guard252 = wrapper_early_reset_static_par_thread_go_out; +wire _guard253 = signal_reg1_out; +wire _guard254 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard255 = ~_guard254; +wire _guard256 = fsm_out == 3'd4; +wire _guard257 = _guard255 & _guard256; +wire _guard258 = tdcc_go_out; +wire _guard259 = _guard257 & _guard258; +wire _guard260 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard261 = signal_reg_out; +wire _guard262 = do_ar_transfer_go_out; +wire _guard263 = early_reset_static_par_thread1_go_out; +wire _guard264 = _guard262 | _guard263; +wire _guard265 = arvalid_out; +wire _guard266 = ARREADY; +wire _guard267 = _guard265 & _guard266; +wire _guard268 = ~_guard267; +wire _guard269 = ar_handshake_occurred_out; +wire _guard270 = ~_guard269; +wire _guard271 = _guard268 & _guard270; +wire _guard272 = do_ar_transfer_go_out; +wire _guard273 = _guard271 & _guard272; +wire _guard274 = arvalid_out; +wire _guard275 = ARREADY; wire _guard276 = _guard274 & _guard275; -wire _guard277 = fsm_out == 1'd0; -wire _guard278 = signal_reg_out; -wire _guard279 = ~_guard278; -wire _guard280 = _guard277 & _guard279; -wire _guard281 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard282 = _guard280 & _guard281; -wire _guard283 = _guard276 | _guard282; -wire _guard284 = fsm_out == 1'd0; -wire _guard285 = signal_reg_out; -wire _guard286 = ~_guard285; -wire _guard287 = _guard284 & _guard286; -wire _guard288 = wrapper_early_reset_static_par0_go_out; -wire _guard289 = _guard287 & _guard288; -wire _guard290 = _guard283 | _guard289; -wire _guard291 = fsm_out == 1'd0; -wire _guard292 = signal_reg_out; -wire _guard293 = ~_guard292; -wire _guard294 = _guard291 & _guard293; -wire _guard295 = wrapper_early_reset_static_par1_go_out; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = _guard290 | _guard296; -wire _guard298 = fsm_out == 1'd0; -wire _guard299 = signal_reg_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = wrapper_early_reset_perform_reads_group0_go_out; -wire _guard302 = do_ar_transfer_go_out; -wire _guard303 = early_reset_static_par1_go_out; -wire _guard304 = _guard302 | _guard303; -wire _guard305 = arvalid_out; -wire _guard306 = ARREADY; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = ~_guard307; -wire _guard309 = ar_handshake_occurred_out; -wire _guard310 = ~_guard309; -wire _guard311 = _guard308 & _guard310; -wire _guard312 = do_ar_transfer_go_out; -wire _guard313 = _guard311 & _guard312; -wire _guard314 = arvalid_out; -wire _guard315 = ARREADY; -wire _guard316 = _guard314 & _guard315; -wire _guard317 = ar_handshake_occurred_out; -wire _guard318 = _guard316 | _guard317; -wire _guard319 = do_ar_transfer_go_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = early_reset_static_par1_go_out; -wire _guard322 = _guard320 | _guard321; -wire _guard323 = early_reset_static_par1_go_out; -wire _guard324 = early_reset_static_par1_go_out; -wire _guard325 = wrapper_early_reset_static_par0_done_out; -wire _guard326 = ~_guard325; -wire _guard327 = fsm0_out == 3'd2; -wire _guard328 = _guard326 & _guard327; -wire _guard329 = tdcc_go_out; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = fsm_out == 1'd0; -wire _guard332 = signal_reg_out; -wire _guard333 = _guard331 & _guard332; -wire _guard334 = wrapper_early_reset_static_par1_done_out; -wire _guard335 = ~_guard334; -wire _guard336 = fsm0_out == 3'd4; -wire _guard337 = _guard335 & _guard336; -wire _guard338 = tdcc_go_out; -wire _guard339 = _guard337 & _guard338; -wire _guard340 = fsm0_out == 3'd6; -wire _guard341 = wrapper_early_reset_static_par_go_out; -assign adder1_left = - _guard1 ? fsm_out : +wire _guard277 = ar_handshake_occurred_out; +wire _guard278 = _guard276 | _guard277; +wire _guard279 = do_ar_transfer_go_out; +wire _guard280 = _guard278 & _guard279; +wire _guard281 = early_reset_static_par_thread1_go_out; +wire _guard282 = _guard280 | _guard281; +wire _guard283 = early_reset_static_par_thread1_go_out; +wire _guard284 = early_reset_static_par_thread1_go_out; +wire _guard285 = fsm_out == 3'd6; +wire _guard286 = signal_reg2_out; +assign signal_reg1_write_en = _guard8; +assign signal_reg1_clk = clk; +assign signal_reg1_reset = reset; +assign signal_reg1_in = + _guard14 ? 1'd1 : + _guard15 ? 1'd0 : 1'd0; -assign adder1_right = _guard2; -assign do_ar_transfer_go_in = _guard8; -assign done = _guard9; +assign do_ar_transfer_go_in = _guard21; +assign done = _guard22; assign ARPROT = - _guard10 ? 3'd6 : + _guard23 ? 3'd6 : 3'd0; assign ARSIZE = - _guard11 ? 3'd2 : + _guard24 ? 3'd2 : 3'd0; assign ARLEN = - _guard12 ? arlen_out : + _guard25 ? arlen_out : 8'd0; assign ARADDR = - _guard13 ? curr_addr_axi_out : + _guard26 ? curr_addr_axi_out : 64'd0; assign ARBURST = - _guard14 ? 2'd1 : + _guard27 ? 2'd1 : 2'd0; assign ARVALID = arvalid_out; -assign fsm_write_en = _guard21; +assign fsm_write_en = _guard86; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard25 ? adder1_out : - _guard29 ? adder_out : - _guard33 ? adder2_out : - _guard48 ? 1'd0 : - _guard52 ? adder0_out : - 1'd0; -assign adder_left = - _guard53 ? fsm_out : - 1'd0; -assign adder_right = _guard54; -assign early_reset_static_par0_go_in = _guard55; -assign wrapper_early_reset_static_par1_done_in = _guard58; -assign ar_handshake_occurred_write_en = _guard64; + _guard103 ? 3'd6 : + _guard108 ? 3'd5 : + _guard123 ? 3'd2 : + _guard128 ? 3'd4 : + _guard133 ? 3'd1 : + _guard134 ? 3'd0 : + _guard139 ? 3'd3 : + 3'd0; +assign early_reset_static_par_thread1_go_in = _guard140; +assign ar_handshake_occurred_write_en = _guard146; assign ar_handshake_occurred_clk = clk; assign ar_handshake_occurred_reset = reset; assign ar_handshake_occurred_in = - _guard69 ? 1'd1 : - _guard70 ? 1'd0 : + _guard151 ? 1'd1 : + _guard152 ? 1'd0 : 'x; -assign comb_reg_write_en = _guard71; +assign signal_reg0_write_en = _guard160; +assign signal_reg0_clk = clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard166 ? 1'd1 : + _guard167 ? 1'd0 : + 1'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard173; +assign comb_reg_write_en = _guard174; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard72 ? perform_reads_out : + _guard175 ? perform_reads_out : 1'd0; -assign early_reset_perform_reads_group0_done_in = ud_out; +assign early_reset_static_par_thread0_done_in = ud1_out; assign perform_reads_left = - _guard73 ? txn_count_out : + _guard176 ? txn_count_out : 32'd0; assign perform_reads_right = - _guard74 ? txn_n_out : + _guard177 ? txn_n_out : 32'd0; -assign arlen_write_en = _guard75; +assign arlen_write_en = _guard178; assign arlen_clk = clk; assign arlen_reset = reset; assign arlen_in = 8'd7; -assign early_reset_static_par1_go_in = _guard77; -assign wrapper_early_reset_static_par_go_in = _guard83; -assign wrapper_early_reset_perform_reads_group0_done_in = _guard86; -assign txn_count_write_en = _guard89; +assign wrapper_early_reset_perform_reads_group00_go_in = _guard192; +assign txn_count_write_en = _guard195; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard90 ? 32'd0 : - _guard91 ? txn_adder_out : + _guard196 ? 32'd0 : + _guard197 ? txn_adder_out : 'x; -assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard94; +assign wrapper_early_reset_perform_reads_group00_done_in = _guard198; assign tdcc_go_in = go; -assign adder2_left = - _guard95 ? fsm_out : - 1'd0; -assign adder2_right = _guard96; -assign fsm0_write_en = _guard155; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard172 ? 3'd6 : - _guard177 ? 3'd5 : - _guard192 ? 3'd2 : - _guard197 ? 3'd4 : - _guard202 ? 3'd1 : - _guard203 ? 3'd0 : - _guard208 ? 3'd3 : - 3'd0; -assign adder0_left = - _guard209 ? fsm_out : +assign early_reset_static_par_thread1_done_in = ud2_out; +assign early_reset_perform_reads_group00_go_in = _guard199; +assign signal_reg2_write_en = _guard207; +assign signal_reg2_clk = clk; +assign signal_reg2_reset = reset; +assign signal_reg2_in = + _guard213 ? 1'd1 : + _guard214 ? 1'd0 : 1'd0; -assign adder0_right = _guard210; -assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_reads_group0_go_in = _guard223; -assign bt_reg_write_en = _guard226; +assign wrapper_early_reset_static_par_thread0_go_in = _guard220; +assign bt_reg_write_en = _guard223; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard231 ? 1'd1 : - _guard239 ? 1'd0 : + _guard228 ? 1'd1 : + _guard236 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard270; +assign signal_reg_write_en = _guard244; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard297 ? 1'd1 : - _guard300 ? 1'd0 : + _guard250 ? 1'd1 : + _guard251 ? 1'd0 : 1'd0; -assign early_reset_perform_reads_group0_go_in = _guard301; -assign arvalid_write_en = _guard304; +assign early_reset_static_par_thread_go_in = _guard252; +assign wrapper_early_reset_static_par_thread0_done_in = _guard253; +assign wrapper_early_reset_static_par_thread1_go_in = _guard259; +assign early_reset_static_par_thread0_go_in = _guard260; +assign wrapper_early_reset_static_par_thread_done_in = _guard261; +assign arvalid_write_en = _guard264; assign arvalid_clk = clk; assign arvalid_reset = reset; assign arvalid_in = - _guard313 ? 1'd1 : - _guard322 ? 1'd0 : + _guard273 ? 1'd1 : + _guard282 ? 1'd0 : 'x; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign wrapper_early_reset_static_par0_go_in = _guard330; -assign wrapper_early_reset_static_par0_done_in = _guard333; -assign wrapper_early_reset_static_par1_go_in = _guard339; -assign tdcc_done_in = _guard340; -assign early_reset_static_par_go_in = _guard341; +assign tdcc_done_in = _guard285; +assign early_reset_perform_reads_group00_done_in = ud3_out; +assign wrapper_early_reset_static_par_thread1_done_in = _guard286; +assign early_reset_static_par_thread_done_in = ud_out; assign do_ar_transfer_done_in = bt_reg_out; -assign early_reset_static_par1_done_in = ud2_out; // COMPONENT END: m_ar_channel endmodule module m_aw_channel( @@ -2228,76 +2228,76 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; -logic adder1_left; -logic adder1_right; -logic adder1_out; -logic adder2_left; -logic adder2_right; -logic adder2_out; logic ud_out; -logic ud0_out; logic ud1_out; logic ud2_out; +logic ud3_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic signal_reg1_in; +logic signal_reg1_write_en; +logic signal_reg1_clk; +logic signal_reg1_reset; +logic signal_reg1_out; +logic signal_reg1_done; +logic signal_reg2_in; +logic signal_reg2_write_en; +logic signal_reg2_clk; +logic signal_reg2_reset; +logic signal_reg2_out; +logic signal_reg2_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic do_aw_transfer_go_in; logic do_aw_transfer_go_out; logic do_aw_transfer_done_in; logic do_aw_transfer_done_out; -logic early_reset_perform_writes_group0_go_in; -logic early_reset_perform_writes_group0_go_out; -logic early_reset_perform_writes_group0_done_in; -logic early_reset_perform_writes_group0_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic early_reset_static_par1_go_in; -logic early_reset_static_par1_go_out; -logic early_reset_static_par1_done_in; -logic early_reset_static_par1_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_perform_writes_group0_go_in; -logic wrapper_early_reset_perform_writes_group0_go_out; -logic wrapper_early_reset_perform_writes_group0_done_in; -logic wrapper_early_reset_perform_writes_group0_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par1_go_in; -logic wrapper_early_reset_static_par1_go_out; -logic wrapper_early_reset_static_par1_done_in; -logic wrapper_early_reset_static_par1_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic early_reset_static_par_thread1_go_in; +logic early_reset_static_par_thread1_go_out; +logic early_reset_static_par_thread1_done_in; +logic early_reset_static_par_thread1_done_out; +logic early_reset_perform_writes_group00_go_in; +logic early_reset_perform_writes_group00_go_out; +logic early_reset_perform_writes_group00_done_in; +logic early_reset_perform_writes_group00_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_perform_writes_group00_go_in; +logic wrapper_early_reset_perform_writes_group00_go_out; +logic wrapper_early_reset_perform_writes_group00_done_in; +logic wrapper_early_reset_perform_writes_group00_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread1_go_in; +logic wrapper_early_reset_static_par_thread1_go_out; +logic wrapper_early_reset_static_par_thread1_done_in; +logic wrapper_early_reset_static_par_thread1_done_out; logic tdcc_go_in; logic tdcc_go_out; logic tdcc_done_in; @@ -2382,54 +2382,11 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); -std_add # ( - .WIDTH(1) -) adder1 ( - .left(adder1_left), - .out(adder1_out), - .right(adder1_right) -); -std_add # ( - .WIDTH(1) -) adder2 ( - .left(adder2_left), - .out(adder2_out), - .right(adder2_right) -); undef # ( .WIDTH(1) ) ud ( .out(ud_out) ); -undef # ( - .WIDTH(1) -) ud0 ( - .out(ud0_out) -); undef # ( .WIDTH(1) ) ud1 ( @@ -2440,7 +2397,12 @@ undef # ( ) ud2 ( .out(ud2_out) ); -std_reg # ( +undef # ( + .WIDTH(1) +) ud3 ( + .out(ud3_out) +); +std_reg # ( .WIDTH(1) ) signal_reg ( .clk(signal_reg_clk), @@ -2450,15 +2412,45 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg1 ( + .clk(signal_reg1_clk), + .done(signal_reg1_done), + .in(signal_reg1_in), + .out(signal_reg1_out), + .reset(signal_reg1_reset), + .write_en(signal_reg1_write_en) +); +std_reg # ( + .WIDTH(1) +) signal_reg2 ( + .clk(signal_reg2_clk), + .done(signal_reg2_done), + .in(signal_reg2_in), + .out(signal_reg2_out), + .reset(signal_reg2_reset), + .write_en(signal_reg2_write_en) +); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -2474,99 +2466,99 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_perform_writes_group0_go ( - .in(early_reset_perform_writes_group0_go_in), - .out(early_reset_perform_writes_group0_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_perform_writes_group0_done ( - .in(early_reset_perform_writes_group0_done_in), - .out(early_reset_perform_writes_group0_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread1_go ( + .in(early_reset_static_par_thread1_go_in), + .out(early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread1_done ( + .in(early_reset_static_par_thread1_done_in), + .out(early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_go ( - .in(early_reset_static_par1_go_in), - .out(early_reset_static_par1_go_out) +) early_reset_perform_writes_group00_go ( + .in(early_reset_perform_writes_group00_go_in), + .out(early_reset_perform_writes_group00_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par1_done ( - .in(early_reset_static_par1_done_in), - .out(early_reset_static_par1_done_out) +) early_reset_perform_writes_group00_done ( + .in(early_reset_perform_writes_group00_done_in), + .out(early_reset_perform_writes_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_writes_group0_go ( - .in(wrapper_early_reset_perform_writes_group0_go_in), - .out(wrapper_early_reset_perform_writes_group0_go_out) +) wrapper_early_reset_perform_writes_group00_go ( + .in(wrapper_early_reset_perform_writes_group00_go_in), + .out(wrapper_early_reset_perform_writes_group00_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_perform_writes_group0_done ( - .in(wrapper_early_reset_perform_writes_group0_done_in), - .out(wrapper_early_reset_perform_writes_group0_done_out) +) wrapper_early_reset_perform_writes_group00_done ( + .in(wrapper_early_reset_perform_writes_group00_done_in), + .out(wrapper_early_reset_perform_writes_group00_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_go ( - .in(wrapper_early_reset_static_par1_go_in), - .out(wrapper_early_reset_static_par1_go_out) +) wrapper_early_reset_static_par_thread1_go ( + .in(wrapper_early_reset_static_par_thread1_go_in), + .out(wrapper_early_reset_static_par_thread1_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par1_done ( - .in(wrapper_early_reset_static_par1_done_in), - .out(wrapper_early_reset_static_par1_done_out) +) wrapper_early_reset_static_par_thread1_done ( + .in(wrapper_early_reset_static_par_thread1_done_in), + .out(wrapper_early_reset_static_par_thread1_done_out) ); std_wire # ( .WIDTH(1) @@ -2581,479 +2573,419 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par0_go_out; -wire _guard2 = early_reset_static_par0_go_out; -wire _guard3 = tdcc_done_out; -wire _guard4 = do_aw_transfer_go_out; -wire _guard5 = do_aw_transfer_go_out; -wire _guard6 = do_aw_transfer_go_out; -wire _guard7 = do_aw_transfer_go_out; -wire _guard8 = do_aw_transfer_go_out; -wire _guard9 = do_aw_transfer_go_out; -wire _guard10 = do_aw_transfer_go_out; -wire _guard11 = early_reset_perform_writes_group0_go_out; -wire _guard12 = early_reset_static_par_go_out; -wire _guard13 = _guard11 | _guard12; -wire _guard14 = early_reset_static_par0_go_out; -wire _guard15 = _guard13 | _guard14; -wire _guard16 = early_reset_static_par1_go_out; -wire _guard17 = _guard15 | _guard16; -wire _guard18 = fsm_out == 1'd0; -wire _guard19 = ~_guard18; -wire _guard20 = early_reset_static_par0_go_out; -wire _guard21 = _guard19 & _guard20; -wire _guard22 = fsm_out == 1'd0; -wire _guard23 = ~_guard22; -wire _guard24 = early_reset_perform_writes_group0_go_out; -wire _guard25 = _guard23 & _guard24; -wire _guard26 = fsm_out == 1'd0; -wire _guard27 = ~_guard26; -wire _guard28 = early_reset_static_par1_go_out; +wire _guard1 = signal_reg1_out; +wire _guard2 = _guard0 & _guard0; +wire _guard3 = signal_reg1_out; +wire _guard4 = ~_guard3; +wire _guard5 = _guard2 & _guard4; +wire _guard6 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard7 = _guard5 & _guard6; +wire _guard8 = _guard1 | _guard7; +wire _guard9 = _guard0 & _guard0; +wire _guard10 = signal_reg1_out; +wire _guard11 = ~_guard10; +wire _guard12 = _guard9 & _guard11; +wire _guard13 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = signal_reg1_out; +wire _guard16 = tdcc_done_out; +wire _guard17 = do_aw_transfer_go_out; +wire _guard18 = do_aw_transfer_go_out; +wire _guard19 = do_aw_transfer_go_out; +wire _guard20 = do_aw_transfer_go_out; +wire _guard21 = do_aw_transfer_go_out; +wire _guard22 = do_aw_transfer_go_out; +wire _guard23 = do_aw_transfer_go_out; +wire _guard24 = fsm_out == 3'd6; +wire _guard25 = fsm_out == 3'd0; +wire _guard26 = wrapper_early_reset_static_par_thread_done_out; +wire _guard27 = _guard25 & _guard26; +wire _guard28 = tdcc_go_out; wire _guard29 = _guard27 & _guard28; -wire _guard30 = fsm_out == 1'd0; -wire _guard31 = early_reset_perform_writes_group0_go_out; -wire _guard32 = _guard30 & _guard31; -wire _guard33 = fsm_out == 1'd0; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = _guard33 & _guard34; -wire _guard36 = _guard32 | _guard35; -wire _guard37 = fsm_out == 1'd0; -wire _guard38 = early_reset_static_par0_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard36 | _guard39; -wire _guard41 = fsm_out == 1'd0; -wire _guard42 = early_reset_static_par1_go_out; -wire _guard43 = _guard41 & _guard42; -wire _guard44 = _guard40 | _guard43; -wire _guard45 = fsm_out == 1'd0; -wire _guard46 = ~_guard45; -wire _guard47 = early_reset_static_par_go_out; -wire _guard48 = _guard46 & _guard47; -wire _guard49 = early_reset_perform_writes_group0_go_out; -wire _guard50 = early_reset_perform_writes_group0_go_out; -wire _guard51 = wrapper_early_reset_static_par0_go_out; -wire _guard52 = fsm_out == 1'd0; -wire _guard53 = signal_reg_out; -wire _guard54 = _guard52 & _guard53; -wire _guard55 = early_reset_perform_writes_group0_go_out; -wire _guard56 = early_reset_perform_writes_group0_go_out; -wire _guard57 = wrapper_early_reset_static_par1_go_out; -wire _guard58 = wrapper_early_reset_static_par_done_out; -wire _guard59 = ~_guard58; -wire _guard60 = fsm0_out == 3'd0; +wire _guard30 = _guard24 | _guard29; +wire _guard31 = fsm_out == 3'd1; +wire _guard32 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard33 = comb_reg_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = _guard31 & _guard34; +wire _guard36 = tdcc_go_out; +wire _guard37 = _guard35 & _guard36; +wire _guard38 = _guard30 | _guard37; +wire _guard39 = fsm_out == 3'd5; +wire _guard40 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard41 = comb_reg_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = _guard39 & _guard42; +wire _guard44 = tdcc_go_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = _guard38 | _guard45; +wire _guard47 = fsm_out == 3'd2; +wire _guard48 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = tdcc_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = _guard46 | _guard51; +wire _guard53 = fsm_out == 3'd3; +wire _guard54 = do_aw_transfer_done_out; +wire _guard55 = _guard53 & _guard54; +wire _guard56 = tdcc_go_out; +wire _guard57 = _guard55 & _guard56; +wire _guard58 = _guard52 | _guard57; +wire _guard59 = fsm_out == 3'd4; +wire _guard60 = wrapper_early_reset_static_par_thread1_done_out; wire _guard61 = _guard59 & _guard60; wire _guard62 = tdcc_go_out; wire _guard63 = _guard61 & _guard62; -wire _guard64 = early_reset_static_par_go_out; -wire _guard65 = early_reset_static_par1_go_out; -wire _guard66 = _guard64 | _guard65; -wire _guard67 = early_reset_static_par_go_out; -wire _guard68 = early_reset_static_par1_go_out; -wire _guard69 = fsm_out == 1'd0; -wire _guard70 = signal_reg_out; -wire _guard71 = _guard69 & _guard70; -wire _guard72 = early_reset_static_par1_go_out; -wire _guard73 = early_reset_static_par1_go_out; -wire _guard74 = fsm0_out == 3'd6; -wire _guard75 = fsm0_out == 3'd0; -wire _guard76 = wrapper_early_reset_static_par_done_out; -wire _guard77 = _guard75 & _guard76; -wire _guard78 = tdcc_go_out; -wire _guard79 = _guard77 & _guard78; -wire _guard80 = _guard74 | _guard79; -wire _guard81 = fsm0_out == 3'd1; -wire _guard82 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard83 = comb_reg_out; -wire _guard84 = _guard82 & _guard83; -wire _guard85 = _guard81 & _guard84; -wire _guard86 = tdcc_go_out; -wire _guard87 = _guard85 & _guard86; -wire _guard88 = _guard80 | _guard87; -wire _guard89 = fsm0_out == 3'd5; -wire _guard90 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard91 = comb_reg_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = _guard89 & _guard92; -wire _guard94 = tdcc_go_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = _guard88 | _guard95; -wire _guard97 = fsm0_out == 3'd2; -wire _guard98 = wrapper_early_reset_static_par0_done_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = tdcc_go_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = _guard96 | _guard101; -wire _guard103 = fsm0_out == 3'd3; -wire _guard104 = do_aw_transfer_done_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = tdcc_go_out; -wire _guard107 = _guard105 & _guard106; -wire _guard108 = _guard102 | _guard107; -wire _guard109 = fsm0_out == 3'd4; -wire _guard110 = wrapper_early_reset_static_par1_done_out; +wire _guard64 = _guard58 | _guard63; +wire _guard65 = fsm_out == 3'd1; +wire _guard66 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard67 = comb_reg_out; +wire _guard68 = ~_guard67; +wire _guard69 = _guard66 & _guard68; +wire _guard70 = _guard65 & _guard69; +wire _guard71 = tdcc_go_out; +wire _guard72 = _guard70 & _guard71; +wire _guard73 = _guard64 | _guard72; +wire _guard74 = fsm_out == 3'd5; +wire _guard75 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard76 = comb_reg_out; +wire _guard77 = ~_guard76; +wire _guard78 = _guard75 & _guard77; +wire _guard79 = _guard74 & _guard78; +wire _guard80 = tdcc_go_out; +wire _guard81 = _guard79 & _guard80; +wire _guard82 = _guard73 | _guard81; +wire _guard83 = fsm_out == 3'd1; +wire _guard84 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard85 = comb_reg_out; +wire _guard86 = ~_guard85; +wire _guard87 = _guard84 & _guard86; +wire _guard88 = _guard83 & _guard87; +wire _guard89 = tdcc_go_out; +wire _guard90 = _guard88 & _guard89; +wire _guard91 = fsm_out == 3'd5; +wire _guard92 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard93 = comb_reg_out; +wire _guard94 = ~_guard93; +wire _guard95 = _guard92 & _guard94; +wire _guard96 = _guard91 & _guard95; +wire _guard97 = tdcc_go_out; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = _guard90 | _guard98; +wire _guard100 = fsm_out == 3'd4; +wire _guard101 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard102 = _guard100 & _guard101; +wire _guard103 = tdcc_go_out; +wire _guard104 = _guard102 & _guard103; +wire _guard105 = fsm_out == 3'd1; +wire _guard106 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard107 = comb_reg_out; +wire _guard108 = _guard106 & _guard107; +wire _guard109 = _guard105 & _guard108; +wire _guard110 = tdcc_go_out; wire _guard111 = _guard109 & _guard110; -wire _guard112 = tdcc_go_out; -wire _guard113 = _guard111 & _guard112; -wire _guard114 = _guard108 | _guard113; -wire _guard115 = fsm0_out == 3'd1; -wire _guard116 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard117 = comb_reg_out; -wire _guard118 = ~_guard117; -wire _guard119 = _guard116 & _guard118; -wire _guard120 = _guard115 & _guard119; -wire _guard121 = tdcc_go_out; +wire _guard112 = fsm_out == 3'd5; +wire _guard113 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard114 = comb_reg_out; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = _guard112 & _guard115; +wire _guard117 = tdcc_go_out; +wire _guard118 = _guard116 & _guard117; +wire _guard119 = _guard111 | _guard118; +wire _guard120 = fsm_out == 3'd3; +wire _guard121 = do_aw_transfer_done_out; wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard114 | _guard122; -wire _guard124 = fsm0_out == 3'd5; -wire _guard125 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard126 = comb_reg_out; -wire _guard127 = ~_guard126; -wire _guard128 = _guard125 & _guard127; -wire _guard129 = _guard124 & _guard128; -wire _guard130 = tdcc_go_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = _guard123 | _guard131; -wire _guard133 = fsm0_out == 3'd1; -wire _guard134 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard135 = comb_reg_out; -wire _guard136 = ~_guard135; -wire _guard137 = _guard134 & _guard136; -wire _guard138 = _guard133 & _guard137; -wire _guard139 = tdcc_go_out; -wire _guard140 = _guard138 & _guard139; -wire _guard141 = fsm0_out == 3'd5; -wire _guard142 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard143 = comb_reg_out; -wire _guard144 = ~_guard143; -wire _guard145 = _guard142 & _guard144; -wire _guard146 = _guard141 & _guard145; -wire _guard147 = tdcc_go_out; -wire _guard148 = _guard146 & _guard147; -wire _guard149 = _guard140 | _guard148; -wire _guard150 = fsm0_out == 3'd4; -wire _guard151 = wrapper_early_reset_static_par1_done_out; -wire _guard152 = _guard150 & _guard151; -wire _guard153 = tdcc_go_out; -wire _guard154 = _guard152 & _guard153; -wire _guard155 = fsm0_out == 3'd1; -wire _guard156 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard157 = comb_reg_out; -wire _guard158 = _guard156 & _guard157; -wire _guard159 = _guard155 & _guard158; -wire _guard160 = tdcc_go_out; -wire _guard161 = _guard159 & _guard160; -wire _guard162 = fsm0_out == 3'd5; -wire _guard163 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard164 = comb_reg_out; +wire _guard123 = tdcc_go_out; +wire _guard124 = _guard122 & _guard123; +wire _guard125 = fsm_out == 3'd0; +wire _guard126 = wrapper_early_reset_static_par_thread_done_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = tdcc_go_out; +wire _guard129 = _guard127 & _guard128; +wire _guard130 = fsm_out == 3'd6; +wire _guard131 = fsm_out == 3'd2; +wire _guard132 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard133 = _guard131 & _guard132; +wire _guard134 = tdcc_go_out; +wire _guard135 = _guard133 & _guard134; +wire _guard136 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard137 = signal_reg0_out; +wire _guard138 = _guard0 & _guard0; +wire _guard139 = signal_reg0_out; +wire _guard140 = ~_guard139; +wire _guard141 = _guard138 & _guard140; +wire _guard142 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard143 = _guard141 & _guard142; +wire _guard144 = _guard137 | _guard143; +wire _guard145 = _guard0 & _guard0; +wire _guard146 = signal_reg0_out; +wire _guard147 = ~_guard146; +wire _guard148 = _guard145 & _guard147; +wire _guard149 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard150 = _guard148 & _guard149; +wire _guard151 = signal_reg0_out; +wire _guard152 = wrapper_early_reset_static_par_thread_done_out; +wire _guard153 = ~_guard152; +wire _guard154 = fsm_out == 3'd0; +wire _guard155 = _guard153 & _guard154; +wire _guard156 = tdcc_go_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = early_reset_perform_writes_group00_go_out; +wire _guard159 = early_reset_perform_writes_group00_go_out; +wire _guard160 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard161 = ~_guard160; +wire _guard162 = fsm_out == 3'd1; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = tdcc_go_out; wire _guard165 = _guard163 & _guard164; -wire _guard166 = _guard162 & _guard165; -wire _guard167 = tdcc_go_out; -wire _guard168 = _guard166 & _guard167; -wire _guard169 = _guard161 | _guard168; -wire _guard170 = fsm0_out == 3'd3; -wire _guard171 = do_aw_transfer_done_out; -wire _guard172 = _guard170 & _guard171; -wire _guard173 = tdcc_go_out; -wire _guard174 = _guard172 & _guard173; -wire _guard175 = fsm0_out == 3'd0; -wire _guard176 = wrapper_early_reset_static_par_done_out; -wire _guard177 = _guard175 & _guard176; -wire _guard178 = tdcc_go_out; -wire _guard179 = _guard177 & _guard178; -wire _guard180 = fsm0_out == 3'd6; -wire _guard181 = fsm0_out == 3'd2; -wire _guard182 = wrapper_early_reset_static_par0_done_out; +wire _guard166 = wrapper_early_reset_perform_writes_group00_done_out; +wire _guard167 = ~_guard166; +wire _guard168 = fsm_out == 3'd5; +wire _guard169 = _guard167 & _guard168; +wire _guard170 = tdcc_go_out; +wire _guard171 = _guard169 & _guard170; +wire _guard172 = _guard165 | _guard171; +wire _guard173 = early_reset_static_par_thread_go_out; +wire _guard174 = early_reset_static_par_thread1_go_out; +wire _guard175 = _guard173 | _guard174; +wire _guard176 = early_reset_static_par_thread_go_out; +wire _guard177 = early_reset_static_par_thread1_go_out; +wire _guard178 = do_aw_transfer_done_out; +wire _guard179 = ~_guard178; +wire _guard180 = fsm_out == 3'd3; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = tdcc_go_out; wire _guard183 = _guard181 & _guard182; -wire _guard184 = tdcc_go_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = do_aw_transfer_done_out; -wire _guard187 = ~_guard186; -wire _guard188 = fsm0_out == 3'd3; -wire _guard189 = _guard187 & _guard188; -wire _guard190 = tdcc_go_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = early_reset_perform_writes_group0_go_out; -wire _guard193 = early_reset_perform_writes_group0_go_out; -wire _guard194 = early_reset_static_par_go_out; -wire _guard195 = early_reset_static_par_go_out; -wire _guard196 = fsm_out == 1'd0; -wire _guard197 = signal_reg_out; -wire _guard198 = _guard196 & _guard197; -wire _guard199 = do_aw_transfer_go_out; -wire _guard200 = early_reset_static_par0_go_out; -wire _guard201 = _guard199 | _guard200; -wire _guard202 = AWREADY; -wire _guard203 = awvalid_out; -wire _guard204 = _guard202 & _guard203; -wire _guard205 = do_aw_transfer_go_out; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = AWREADY; -wire _guard208 = awvalid_out; -wire _guard209 = _guard207 & _guard208; -wire _guard210 = ~_guard209; -wire _guard211 = do_aw_transfer_go_out; -wire _guard212 = _guard210 & _guard211; -wire _guard213 = early_reset_static_par0_go_out; -wire _guard214 = _guard212 | _guard213; -wire _guard215 = early_reset_static_par_go_out; -wire _guard216 = early_reset_static_par_go_out; -wire _guard217 = fsm_out == 1'd0; -wire _guard218 = signal_reg_out; -wire _guard219 = _guard217 & _guard218; -wire _guard220 = fsm_out == 1'd0; -wire _guard221 = signal_reg_out; -wire _guard222 = ~_guard221; -wire _guard223 = _guard220 & _guard222; -wire _guard224 = wrapper_early_reset_static_par_go_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = _guard219 | _guard225; -wire _guard227 = fsm_out == 1'd0; +wire _guard184 = signal_reg0_out; +wire _guard185 = early_reset_perform_writes_group00_go_out; +wire _guard186 = early_reset_perform_writes_group00_go_out; +wire _guard187 = signal_reg2_out; +wire _guard188 = _guard0 & _guard0; +wire _guard189 = signal_reg2_out; +wire _guard190 = ~_guard189; +wire _guard191 = _guard188 & _guard190; +wire _guard192 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard193 = _guard191 & _guard192; +wire _guard194 = _guard187 | _guard193; +wire _guard195 = _guard0 & _guard0; +wire _guard196 = signal_reg2_out; +wire _guard197 = ~_guard196; +wire _guard198 = _guard195 & _guard197; +wire _guard199 = wrapper_early_reset_static_par_thread1_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = signal_reg2_out; +wire _guard202 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard203 = ~_guard202; +wire _guard204 = fsm_out == 3'd2; +wire _guard205 = _guard203 & _guard204; +wire _guard206 = tdcc_go_out; +wire _guard207 = _guard205 & _guard206; +wire _guard208 = do_aw_transfer_go_out; +wire _guard209 = early_reset_static_par_thread0_go_out; +wire _guard210 = _guard208 | _guard209; +wire _guard211 = AWREADY; +wire _guard212 = awvalid_out; +wire _guard213 = _guard211 & _guard212; +wire _guard214 = do_aw_transfer_go_out; +wire _guard215 = _guard213 & _guard214; +wire _guard216 = AWREADY; +wire _guard217 = awvalid_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = ~_guard218; +wire _guard220 = do_aw_transfer_go_out; +wire _guard221 = _guard219 & _guard220; +wire _guard222 = early_reset_static_par_thread0_go_out; +wire _guard223 = _guard221 | _guard222; +wire _guard224 = early_reset_static_par_thread_go_out; +wire _guard225 = early_reset_static_par_thread_go_out; +wire _guard226 = signal_reg_out; +wire _guard227 = _guard0 & _guard0; wire _guard228 = signal_reg_out; wire _guard229 = ~_guard228; wire _guard230 = _guard227 & _guard229; -wire _guard231 = wrapper_early_reset_perform_writes_group0_go_out; +wire _guard231 = wrapper_early_reset_static_par_thread_go_out; wire _guard232 = _guard230 & _guard231; wire _guard233 = _guard226 | _guard232; -wire _guard234 = fsm_out == 1'd0; +wire _guard234 = _guard0 & _guard0; wire _guard235 = signal_reg_out; wire _guard236 = ~_guard235; wire _guard237 = _guard234 & _guard236; -wire _guard238 = wrapper_early_reset_static_par0_go_out; +wire _guard238 = wrapper_early_reset_static_par_thread_go_out; wire _guard239 = _guard237 & _guard238; -wire _guard240 = _guard233 | _guard239; -wire _guard241 = fsm_out == 1'd0; -wire _guard242 = signal_reg_out; -wire _guard243 = ~_guard242; -wire _guard244 = _guard241 & _guard243; -wire _guard245 = wrapper_early_reset_static_par1_go_out; +wire _guard240 = signal_reg_out; +wire _guard241 = wrapper_early_reset_static_par_thread_go_out; +wire _guard242 = signal_reg1_out; +wire _guard243 = wrapper_early_reset_static_par_thread1_done_out; +wire _guard244 = ~_guard243; +wire _guard245 = fsm_out == 3'd4; wire _guard246 = _guard244 & _guard245; -wire _guard247 = _guard240 | _guard246; -wire _guard248 = fsm_out == 1'd0; -wire _guard249 = signal_reg_out; -wire _guard250 = ~_guard249; -wire _guard251 = _guard248 & _guard250; -wire _guard252 = wrapper_early_reset_static_par_go_out; -wire _guard253 = _guard251 & _guard252; -wire _guard254 = fsm_out == 1'd0; -wire _guard255 = signal_reg_out; -wire _guard256 = ~_guard255; -wire _guard257 = _guard254 & _guard256; -wire _guard258 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard259 = _guard257 & _guard258; -wire _guard260 = _guard253 | _guard259; -wire _guard261 = fsm_out == 1'd0; -wire _guard262 = signal_reg_out; -wire _guard263 = ~_guard262; -wire _guard264 = _guard261 & _guard263; -wire _guard265 = wrapper_early_reset_static_par0_go_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = _guard260 | _guard266; -wire _guard268 = fsm_out == 1'd0; -wire _guard269 = signal_reg_out; -wire _guard270 = ~_guard269; -wire _guard271 = _guard268 & _guard270; -wire _guard272 = wrapper_early_reset_static_par1_go_out; -wire _guard273 = _guard271 & _guard272; -wire _guard274 = _guard267 | _guard273; -wire _guard275 = fsm_out == 1'd0; -wire _guard276 = signal_reg_out; -wire _guard277 = _guard275 & _guard276; -wire _guard278 = wrapper_early_reset_perform_writes_group0_go_out; -wire _guard279 = early_reset_static_par1_go_out; -wire _guard280 = early_reset_static_par1_go_out; -wire _guard281 = aw_handshake_occurred_out; -wire _guard282 = ~_guard281; -wire _guard283 = do_aw_transfer_go_out; -wire _guard284 = _guard282 & _guard283; -wire _guard285 = early_reset_static_par0_go_out; -wire _guard286 = _guard284 | _guard285; -wire _guard287 = awvalid_out; -wire _guard288 = AWREADY; -wire _guard289 = _guard287 & _guard288; -wire _guard290 = do_aw_transfer_go_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = early_reset_static_par0_go_out; -wire _guard293 = wrapper_early_reset_static_par0_done_out; -wire _guard294 = ~_guard293; -wire _guard295 = fsm0_out == 3'd2; -wire _guard296 = _guard294 & _guard295; -wire _guard297 = tdcc_go_out; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = fsm_out == 1'd0; -wire _guard300 = signal_reg_out; -wire _guard301 = _guard299 & _guard300; -wire _guard302 = wrapper_early_reset_static_par1_done_out; -wire _guard303 = ~_guard302; -wire _guard304 = fsm0_out == 3'd4; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = tdcc_go_out; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = fsm0_out == 3'd6; -wire _guard309 = do_aw_transfer_go_out; -wire _guard310 = early_reset_static_par1_go_out; -wire _guard311 = _guard309 | _guard310; -wire _guard312 = awvalid_out; -wire _guard313 = AWREADY; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = ~_guard314; -wire _guard316 = aw_handshake_occurred_out; -wire _guard317 = ~_guard316; -wire _guard318 = _guard315 & _guard317; -wire _guard319 = do_aw_transfer_go_out; -wire _guard320 = _guard318 & _guard319; -wire _guard321 = awvalid_out; -wire _guard322 = AWREADY; -wire _guard323 = _guard321 & _guard322; -wire _guard324 = aw_handshake_occurred_out; -wire _guard325 = _guard323 | _guard324; -wire _guard326 = do_aw_transfer_go_out; -wire _guard327 = _guard325 & _guard326; -wire _guard328 = early_reset_static_par1_go_out; -wire _guard329 = _guard327 | _guard328; -wire _guard330 = wrapper_early_reset_static_par_go_out; -wire _guard331 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard332 = ~_guard331; -wire _guard333 = fsm0_out == 3'd1; -wire _guard334 = _guard332 & _guard333; -wire _guard335 = tdcc_go_out; -wire _guard336 = _guard334 & _guard335; -wire _guard337 = wrapper_early_reset_perform_writes_group0_done_out; -wire _guard338 = ~_guard337; -wire _guard339 = fsm0_out == 3'd5; -wire _guard340 = _guard338 & _guard339; -wire _guard341 = tdcc_go_out; -wire _guard342 = _guard340 & _guard341; -wire _guard343 = _guard336 | _guard342; -assign adder1_left = - _guard1 ? fsm_out : +wire _guard247 = tdcc_go_out; +wire _guard248 = _guard246 & _guard247; +wire _guard249 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard250 = signal_reg_out; +wire _guard251 = early_reset_static_par_thread1_go_out; +wire _guard252 = early_reset_static_par_thread1_go_out; +wire _guard253 = aw_handshake_occurred_out; +wire _guard254 = ~_guard253; +wire _guard255 = do_aw_transfer_go_out; +wire _guard256 = _guard254 & _guard255; +wire _guard257 = early_reset_static_par_thread0_go_out; +wire _guard258 = _guard256 | _guard257; +wire _guard259 = awvalid_out; +wire _guard260 = AWREADY; +wire _guard261 = _guard259 & _guard260; +wire _guard262 = do_aw_transfer_go_out; +wire _guard263 = _guard261 & _guard262; +wire _guard264 = early_reset_static_par_thread0_go_out; +wire _guard265 = fsm_out == 3'd6; +wire _guard266 = wrapper_early_reset_perform_writes_group00_go_out; +wire _guard267 = do_aw_transfer_go_out; +wire _guard268 = early_reset_static_par_thread1_go_out; +wire _guard269 = _guard267 | _guard268; +wire _guard270 = awvalid_out; +wire _guard271 = AWREADY; +wire _guard272 = _guard270 & _guard271; +wire _guard273 = ~_guard272; +wire _guard274 = aw_handshake_occurred_out; +wire _guard275 = ~_guard274; +wire _guard276 = _guard273 & _guard275; +wire _guard277 = do_aw_transfer_go_out; +wire _guard278 = _guard276 & _guard277; +wire _guard279 = awvalid_out; +wire _guard280 = AWREADY; +wire _guard281 = _guard279 & _guard280; +wire _guard282 = aw_handshake_occurred_out; +wire _guard283 = _guard281 | _guard282; +wire _guard284 = do_aw_transfer_go_out; +wire _guard285 = _guard283 & _guard284; +wire _guard286 = early_reset_static_par_thread1_go_out; +wire _guard287 = _guard285 | _guard286; +wire _guard288 = signal_reg2_out; +assign signal_reg1_write_en = _guard8; +assign signal_reg1_clk = clk; +assign signal_reg1_reset = reset; +assign signal_reg1_in = + _guard14 ? 1'd1 : + _guard15 ? 1'd0 : 1'd0; -assign adder1_right = _guard2; -assign done = _guard3; +assign done = _guard16; assign AWADDR = - _guard4 ? curr_addr_axi_out : + _guard17 ? curr_addr_axi_out : 64'd0; assign AWPROT = - _guard5 ? 3'd6 : + _guard18 ? 3'd6 : 3'd0; assign AWSIZE = - _guard6 ? 3'd2 : + _guard19 ? 3'd2 : 3'd0; assign max_transfers_in = 8'd7; assign AWVALID = awvalid_out; assign AWBURST = - _guard8 ? 2'd1 : + _guard21 ? 2'd1 : 2'd0; assign AWLEN = - _guard9 ? awlen_out : + _guard22 ? awlen_out : 8'd0; -assign max_transfers_write_en = _guard10; -assign fsm_write_en = _guard17; +assign max_transfers_write_en = _guard23; +assign fsm_write_en = _guard82; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard21 ? adder1_out : - _guard25 ? adder_out : - _guard29 ? adder2_out : - _guard44 ? 1'd0 : - _guard48 ? adder0_out : - 1'd0; -assign adder_left = - _guard49 ? fsm_out : + _guard99 ? 3'd6 : + _guard104 ? 3'd5 : + _guard119 ? 3'd2 : + _guard124 ? 3'd4 : + _guard129 ? 3'd1 : + _guard130 ? 3'd0 : + _guard135 ? 3'd3 : + 3'd0; +assign early_reset_static_par_thread1_go_in = _guard136; +assign signal_reg0_write_en = _guard144; +assign signal_reg0_clk = clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard150 ? 1'd1 : + _guard151 ? 1'd0 : 1'd0; -assign adder_right = _guard50; -assign early_reset_static_par0_go_in = _guard51; -assign wrapper_early_reset_static_par1_done_in = _guard54; -assign comb_reg_write_en = _guard55; +assign wrapper_early_reset_static_par_thread_go_in = _guard157; +assign comb_reg_write_en = _guard158; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard56 ? perform_writes_out : + _guard159 ? perform_writes_out : 1'd0; -assign early_reset_static_par1_go_in = _guard57; -assign wrapper_early_reset_static_par_go_in = _guard63; -assign early_reset_perform_writes_group0_done_in = ud_out; -assign txn_count_write_en = _guard66; +assign early_reset_static_par_thread0_done_in = ud1_out; +assign wrapper_early_reset_perform_writes_group00_go_in = _guard172; +assign txn_count_write_en = _guard175; assign txn_count_clk = clk; assign txn_count_reset = reset; assign txn_count_in = - _guard67 ? 32'd0 : - _guard68 ? txn_adder_out : + _guard176 ? 32'd0 : + _guard177 ? txn_adder_out : 'x; -assign early_reset_static_par0_done_in = ud1_out; -assign wrapper_early_reset_static_par_done_in = _guard71; assign tdcc_go_in = go; -assign adder2_left = - _guard72 ? fsm_out : - 1'd0; -assign adder2_right = _guard73; -assign fsm0_write_en = _guard132; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard149 ? 3'd6 : - _guard154 ? 3'd5 : - _guard169 ? 3'd2 : - _guard174 ? 3'd4 : - _guard179 ? 3'd1 : - _guard180 ? 3'd0 : - _guard185 ? 3'd3 : - 3'd0; -assign do_aw_transfer_go_in = _guard191; +assign early_reset_static_par_thread1_done_in = ud2_out; +assign do_aw_transfer_go_in = _guard183; assign do_aw_transfer_done_in = bt_reg_out; +assign wrapper_early_reset_perform_writes_group00_done_in = _guard184; assign perform_writes_left = - _guard192 ? txn_count_out : + _guard185 ? txn_count_out : 32'd0; assign perform_writes_right = - _guard193 ? txn_n_out : + _guard186 ? txn_n_out : 32'd0; -assign adder0_left = - _guard194 ? fsm_out : +assign signal_reg2_write_en = _guard194; +assign signal_reg2_clk = clk; +assign signal_reg2_reset = reset; +assign signal_reg2_in = + _guard200 ? 1'd1 : + _guard201 ? 1'd0 : 1'd0; -assign adder0_right = _guard195; -assign early_reset_static_par_done_in = ud0_out; -assign wrapper_early_reset_perform_writes_group0_done_in = _guard198; -assign bt_reg_write_en = _guard201; +assign wrapper_early_reset_static_par_thread0_go_in = _guard207; +assign bt_reg_write_en = _guard210; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard206 ? 1'd1 : - _guard214 ? 1'd0 : + _guard215 ? 1'd1 : + _guard223 ? 1'd0 : 'x; -assign awlen_write_en = _guard215; +assign awlen_write_en = _guard224; assign awlen_clk = clk; assign awlen_reset = reset; assign awlen_in = 8'd7; -assign signal_reg_write_en = _guard247; +assign signal_reg_write_en = _guard233; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard274 ? 1'd1 : - _guard277 ? 1'd0 : + _guard239 ? 1'd1 : + _guard240 ? 1'd0 : 1'd0; -assign early_reset_perform_writes_group0_go_in = _guard278; +assign early_reset_static_par_thread_go_in = _guard241; +assign wrapper_early_reset_static_par_thread0_done_in = _guard242; +assign wrapper_early_reset_static_par_thread1_go_in = _guard248; +assign early_reset_static_par_thread0_go_in = _guard249; +assign wrapper_early_reset_static_par_thread_done_in = _guard250; assign txn_adder_left = txn_count_out; assign txn_adder_right = 32'd1; -assign aw_handshake_occurred_write_en = _guard286; +assign aw_handshake_occurred_write_en = _guard258; assign aw_handshake_occurred_clk = clk; assign aw_handshake_occurred_reset = reset; assign aw_handshake_occurred_in = - _guard291 ? 1'd1 : - _guard292 ? 1'd0 : + _guard263 ? 1'd1 : + _guard264 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par0_go_in = _guard298; -assign wrapper_early_reset_static_par0_done_in = _guard301; -assign wrapper_early_reset_static_par1_go_in = _guard307; -assign tdcc_done_in = _guard308; -assign awvalid_write_en = _guard311; +assign tdcc_done_in = _guard265; +assign early_reset_perform_writes_group00_go_in = _guard266; +assign awvalid_write_en = _guard269; assign awvalid_clk = clk; assign awvalid_reset = reset; assign awvalid_in = - _guard320 ? 1'd1 : - _guard329 ? 1'd0 : + _guard278 ? 1'd1 : + _guard287 ? 1'd0 : 'x; -assign early_reset_static_par_go_in = _guard330; -assign early_reset_static_par1_done_in = ud2_out; -assign wrapper_early_reset_perform_writes_group0_go_in = _guard343; +assign wrapper_early_reset_static_par_thread1_done_in = _guard288; +assign early_reset_static_par_thread_done_in = ud_out; +assign early_reset_perform_writes_group00_done_in = ud3_out; // COMPONENT END: m_aw_channel endmodule module m_read_channel( @@ -3107,12 +3039,12 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic [2:0] curr_addr_internal_mem_incr_left; -logic [2:0] curr_addr_internal_mem_incr_right; -logic [2:0] curr_addr_internal_mem_incr_out; -logic [63:0] curr_addr_axi_incr_left; -logic [63:0] curr_addr_axi_incr_right; -logic [63:0] curr_addr_axi_incr_out; +logic [2:0] curr_addr_internal_mem_incr_1_1_left; +logic [2:0] curr_addr_internal_mem_incr_1_1_right; +logic [2:0] curr_addr_internal_mem_incr_1_1_out; +logic [63:0] curr_addr_axi_incr_4_2_left; +logic [63:0] curr_addr_axi_incr_4_2_right; +logic [63:0] curr_addr_axi_incr_4_2_out; logic pd_in; logic pd_write_en; logic pd_clk; @@ -3139,14 +3071,14 @@ logic service_read_transfer_go_in; logic service_read_transfer_go_out; logic service_read_transfer_done_in; logic service_read_transfer_done_out; -logic curr_addr_internal_mem_incr_group_go_in; -logic curr_addr_internal_mem_incr_group_go_out; -logic curr_addr_internal_mem_incr_group_done_in; -logic curr_addr_internal_mem_incr_group_done_out; -logic curr_addr_axi_incr_group_go_in; -logic curr_addr_axi_incr_group_go_out; -logic curr_addr_axi_incr_group_done_in; -logic curr_addr_axi_incr_group_done_out; +logic curr_addr_internal_mem_incr_1_1_group_go_in; +logic curr_addr_internal_mem_incr_1_1_group_go_out; +logic curr_addr_internal_mem_incr_1_1_group_done_in; +logic curr_addr_internal_mem_incr_1_1_group_done_out; +logic curr_addr_axi_incr_4_2_group_go_in; +logic curr_addr_axi_incr_4_2_group_go_out; +logic curr_addr_axi_incr_4_2_group_done_in; +logic curr_addr_axi_incr_4_2_group_done_out; logic invoke0_go_in; logic invoke0_go_out; logic invoke0_done_in; @@ -3205,17 +3137,17 @@ std_reg # ( ); std_add # ( .WIDTH(3) -) curr_addr_internal_mem_incr ( - .left(curr_addr_internal_mem_incr_left), - .out(curr_addr_internal_mem_incr_out), - .right(curr_addr_internal_mem_incr_right) +) curr_addr_internal_mem_incr_1_1 ( + .left(curr_addr_internal_mem_incr_1_1_left), + .out(curr_addr_internal_mem_incr_1_1_out), + .right(curr_addr_internal_mem_incr_1_1_right) ); std_add # ( .WIDTH(64) -) curr_addr_axi_incr ( - .left(curr_addr_axi_incr_left), - .out(curr_addr_axi_incr_out), - .right(curr_addr_axi_incr_right) +) curr_addr_axi_incr_4_2 ( + .left(curr_addr_axi_incr_4_2_left), + .out(curr_addr_axi_incr_4_2_out), + .right(curr_addr_axi_incr_4_2_right) ); std_reg # ( .WIDTH(1) @@ -3273,27 +3205,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_go ( - .in(curr_addr_internal_mem_incr_group_go_in), - .out(curr_addr_internal_mem_incr_group_go_out) +) curr_addr_internal_mem_incr_1_1_group_go ( + .in(curr_addr_internal_mem_incr_1_1_group_go_in), + .out(curr_addr_internal_mem_incr_1_1_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_done ( - .in(curr_addr_internal_mem_incr_group_done_in), - .out(curr_addr_internal_mem_incr_group_done_out) +) curr_addr_internal_mem_incr_1_1_group_done ( + .in(curr_addr_internal_mem_incr_1_1_group_done_in), + .out(curr_addr_internal_mem_incr_1_1_group_done_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_go ( - .in(curr_addr_axi_incr_group_go_in), - .out(curr_addr_axi_incr_group_go_out) +) curr_addr_axi_incr_4_2_group_go ( + .in(curr_addr_axi_incr_4_2_group_go_in), + .out(curr_addr_axi_incr_4_2_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_done ( - .in(curr_addr_axi_incr_group_done_in), - .out(curr_addr_axi_incr_group_done_out) +) curr_addr_axi_incr_4_2_group_done ( + .in(curr_addr_axi_incr_4_2_group_done_in), + .out(curr_addr_axi_incr_4_2_group_done_out) ); std_wire # ( .WIDTH(1) @@ -3344,144 +3276,144 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = pd0_out; -wire _guard2 = curr_addr_axi_incr_group_done_out; -wire _guard3 = _guard1 | _guard2; -wire _guard4 = ~_guard3; -wire _guard5 = par0_go_out; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = curr_addr_internal_mem_incr_group_go_out; -wire _guard8 = curr_addr_internal_mem_incr_group_go_out; -wire _guard9 = tdcc_done_out; -wire _guard10 = service_read_transfer_go_out; -wire _guard11 = curr_addr_axi_incr_group_go_out; -wire _guard12 = curr_addr_axi_incr_group_go_out; -wire _guard13 = curr_addr_internal_mem_incr_group_go_out; -wire _guard14 = service_read_transfer_go_out; -wire _guard15 = service_read_transfer_go_out; -wire _guard16 = service_read_transfer_go_out; -wire _guard17 = curr_addr_internal_mem_incr_group_go_out; -wire _guard18 = fsm_out == 3'd5; -wire _guard19 = fsm_out == 3'd0; -wire _guard20 = invoke0_done_out; +wire _guard1 = tdcc_done_out; +wire _guard2 = service_read_transfer_go_out; +wire _guard3 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard4 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard5 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard6 = service_read_transfer_go_out; +wire _guard7 = service_read_transfer_go_out; +wire _guard8 = service_read_transfer_go_out; +wire _guard9 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard10 = fsm_out == 3'd5; +wire _guard11 = fsm_out == 3'd0; +wire _guard12 = invoke0_done_out; +wire _guard13 = n_RLAST_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = _guard11 & _guard14; +wire _guard16 = tdcc_go_out; +wire _guard17 = _guard15 & _guard16; +wire _guard18 = _guard10 | _guard17; +wire _guard19 = fsm_out == 3'd4; +wire _guard20 = par0_done_out; wire _guard21 = n_RLAST_out; wire _guard22 = _guard20 & _guard21; wire _guard23 = _guard19 & _guard22; wire _guard24 = tdcc_go_out; wire _guard25 = _guard23 & _guard24; wire _guard26 = _guard18 | _guard25; -wire _guard27 = fsm_out == 3'd4; -wire _guard28 = par0_done_out; -wire _guard29 = n_RLAST_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = _guard27 & _guard30; -wire _guard32 = tdcc_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = _guard26 | _guard33; -wire _guard35 = fsm_out == 3'd1; -wire _guard36 = invoke1_done_out; +wire _guard27 = fsm_out == 3'd1; +wire _guard28 = invoke1_done_out; +wire _guard29 = _guard27 & _guard28; +wire _guard30 = tdcc_go_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = _guard26 | _guard31; +wire _guard33 = fsm_out == 3'd2; +wire _guard34 = block_transfer_done_out; +wire _guard35 = _guard33 & _guard34; +wire _guard36 = tdcc_go_out; wire _guard37 = _guard35 & _guard36; -wire _guard38 = tdcc_go_out; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = _guard34 | _guard39; -wire _guard41 = fsm_out == 3'd2; -wire _guard42 = block_transfer_done_out; +wire _guard38 = _guard32 | _guard37; +wire _guard39 = fsm_out == 3'd3; +wire _guard40 = service_read_transfer_done_out; +wire _guard41 = _guard39 & _guard40; +wire _guard42 = tdcc_go_out; wire _guard43 = _guard41 & _guard42; -wire _guard44 = tdcc_go_out; -wire _guard45 = _guard43 & _guard44; -wire _guard46 = _guard40 | _guard45; -wire _guard47 = fsm_out == 3'd3; -wire _guard48 = service_read_transfer_done_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = tdcc_go_out; -wire _guard51 = _guard49 & _guard50; -wire _guard52 = _guard46 | _guard51; -wire _guard53 = fsm_out == 3'd0; -wire _guard54 = invoke0_done_out; -wire _guard55 = n_RLAST_out; -wire _guard56 = ~_guard55; -wire _guard57 = _guard54 & _guard56; -wire _guard58 = _guard53 & _guard57; -wire _guard59 = tdcc_go_out; -wire _guard60 = _guard58 & _guard59; -wire _guard61 = _guard52 | _guard60; -wire _guard62 = fsm_out == 3'd4; -wire _guard63 = par0_done_out; -wire _guard64 = n_RLAST_out; -wire _guard65 = ~_guard64; -wire _guard66 = _guard63 & _guard65; -wire _guard67 = _guard62 & _guard66; -wire _guard68 = tdcc_go_out; -wire _guard69 = _guard67 & _guard68; -wire _guard70 = _guard61 | _guard69; -wire _guard71 = fsm_out == 3'd0; -wire _guard72 = invoke0_done_out; +wire _guard44 = _guard38 | _guard43; +wire _guard45 = fsm_out == 3'd0; +wire _guard46 = invoke0_done_out; +wire _guard47 = n_RLAST_out; +wire _guard48 = ~_guard47; +wire _guard49 = _guard46 & _guard48; +wire _guard50 = _guard45 & _guard49; +wire _guard51 = tdcc_go_out; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = _guard44 | _guard52; +wire _guard54 = fsm_out == 3'd4; +wire _guard55 = par0_done_out; +wire _guard56 = n_RLAST_out; +wire _guard57 = ~_guard56; +wire _guard58 = _guard55 & _guard57; +wire _guard59 = _guard54 & _guard58; +wire _guard60 = tdcc_go_out; +wire _guard61 = _guard59 & _guard60; +wire _guard62 = _guard53 | _guard61; +wire _guard63 = fsm_out == 3'd0; +wire _guard64 = invoke0_done_out; +wire _guard65 = n_RLAST_out; +wire _guard66 = ~_guard65; +wire _guard67 = _guard64 & _guard66; +wire _guard68 = _guard63 & _guard67; +wire _guard69 = tdcc_go_out; +wire _guard70 = _guard68 & _guard69; +wire _guard71 = fsm_out == 3'd4; +wire _guard72 = par0_done_out; wire _guard73 = n_RLAST_out; wire _guard74 = ~_guard73; wire _guard75 = _guard72 & _guard74; wire _guard76 = _guard71 & _guard75; wire _guard77 = tdcc_go_out; wire _guard78 = _guard76 & _guard77; -wire _guard79 = fsm_out == 3'd4; -wire _guard80 = par0_done_out; -wire _guard81 = n_RLAST_out; -wire _guard82 = ~_guard81; -wire _guard83 = _guard80 & _guard82; -wire _guard84 = _guard79 & _guard83; -wire _guard85 = tdcc_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard78 | _guard86; -wire _guard88 = fsm_out == 3'd1; -wire _guard89 = invoke1_done_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = tdcc_go_out; -wire _guard92 = _guard90 & _guard91; -wire _guard93 = fsm_out == 3'd3; -wire _guard94 = service_read_transfer_done_out; -wire _guard95 = _guard93 & _guard94; -wire _guard96 = tdcc_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = fsm_out == 3'd0; -wire _guard99 = invoke0_done_out; -wire _guard100 = n_RLAST_out; -wire _guard101 = _guard99 & _guard100; -wire _guard102 = _guard98 & _guard101; -wire _guard103 = tdcc_go_out; -wire _guard104 = _guard102 & _guard103; -wire _guard105 = fsm_out == 3'd4; -wire _guard106 = par0_done_out; -wire _guard107 = n_RLAST_out; +wire _guard79 = _guard70 | _guard78; +wire _guard80 = fsm_out == 3'd1; +wire _guard81 = invoke1_done_out; +wire _guard82 = _guard80 & _guard81; +wire _guard83 = tdcc_go_out; +wire _guard84 = _guard82 & _guard83; +wire _guard85 = fsm_out == 3'd3; +wire _guard86 = service_read_transfer_done_out; +wire _guard87 = _guard85 & _guard86; +wire _guard88 = tdcc_go_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = fsm_out == 3'd0; +wire _guard91 = invoke0_done_out; +wire _guard92 = n_RLAST_out; +wire _guard93 = _guard91 & _guard92; +wire _guard94 = _guard90 & _guard93; +wire _guard95 = tdcc_go_out; +wire _guard96 = _guard94 & _guard95; +wire _guard97 = fsm_out == 3'd4; +wire _guard98 = par0_done_out; +wire _guard99 = n_RLAST_out; +wire _guard100 = _guard98 & _guard99; +wire _guard101 = _guard97 & _guard100; +wire _guard102 = tdcc_go_out; +wire _guard103 = _guard101 & _guard102; +wire _guard104 = _guard96 | _guard103; +wire _guard105 = fsm_out == 3'd5; +wire _guard106 = fsm_out == 3'd2; +wire _guard107 = block_transfer_done_out; wire _guard108 = _guard106 & _guard107; -wire _guard109 = _guard105 & _guard108; -wire _guard110 = tdcc_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = _guard104 | _guard111; -wire _guard113 = fsm_out == 3'd5; -wire _guard114 = fsm_out == 3'd2; -wire _guard115 = block_transfer_done_out; -wire _guard116 = _guard114 & _guard115; -wire _guard117 = tdcc_go_out; -wire _guard118 = _guard116 & _guard117; -wire _guard119 = rready_out; -wire _guard120 = RVALID; -wire _guard121 = _guard119 & _guard120; +wire _guard109 = tdcc_go_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard112 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard113 = rready_out; +wire _guard114 = RVALID; +wire _guard115 = _guard113 & _guard114; +wire _guard116 = block_transfer_go_out; +wire _guard117 = _guard115 & _guard116; +wire _guard118 = rready_out; +wire _guard119 = RVALID; +wire _guard120 = _guard118 & _guard119; +wire _guard121 = ~_guard120; wire _guard122 = block_transfer_go_out; wire _guard123 = _guard121 & _guard122; -wire _guard124 = rready_out; -wire _guard125 = RVALID; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = ~_guard126; -wire _guard128 = block_transfer_go_out; -wire _guard129 = _guard127 & _guard128; -wire _guard130 = block_transfer_go_out; -wire _guard131 = invoke0_done_out; -wire _guard132 = ~_guard131; -wire _guard133 = fsm_out == 3'd0; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = tdcc_go_out; +wire _guard124 = block_transfer_go_out; +wire _guard125 = pd0_out; +wire _guard126 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard127 = _guard125 | _guard126; +wire _guard128 = ~_guard127; +wire _guard129 = par0_go_out; +wire _guard130 = _guard128 & _guard129; +wire _guard131 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard132 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard133 = invoke0_done_out; +wire _guard134 = ~_guard133; +wire _guard135 = fsm_out == 3'd0; wire _guard136 = _guard134 & _guard135; -wire _guard137 = curr_addr_axi_incr_group_go_out; -wire _guard138 = curr_addr_axi_incr_group_go_out; +wire _guard137 = tdcc_go_out; +wire _guard138 = _guard136 & _guard137; wire _guard139 = pd_out; wire _guard140 = pd0_out; wire _guard141 = _guard139 & _guard140; @@ -3522,11 +3454,11 @@ wire _guard175 = _guard173 | _guard174; wire _guard176 = pd_out; wire _guard177 = pd0_out; wire _guard178 = _guard176 & _guard177; -wire _guard179 = curr_addr_internal_mem_incr_group_done_out; +wire _guard179 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard180 = par0_go_out; wire _guard181 = _guard179 & _guard180; wire _guard182 = _guard178 | _guard181; -wire _guard183 = curr_addr_internal_mem_incr_group_done_out; +wire _guard183 = curr_addr_internal_mem_incr_1_1_group_done_out; wire _guard184 = par0_go_out; wire _guard185 = _guard183 & _guard184; wire _guard186 = pd_out; @@ -3535,28 +3467,28 @@ wire _guard188 = _guard186 & _guard187; wire _guard189 = pd_out; wire _guard190 = pd0_out; wire _guard191 = _guard189 & _guard190; -wire _guard192 = curr_addr_axi_incr_group_done_out; +wire _guard192 = curr_addr_axi_incr_4_2_group_done_out; wire _guard193 = par0_go_out; wire _guard194 = _guard192 & _guard193; wire _guard195 = _guard191 | _guard194; -wire _guard196 = curr_addr_axi_incr_group_done_out; +wire _guard196 = curr_addr_axi_incr_4_2_group_done_out; wire _guard197 = par0_go_out; wire _guard198 = _guard196 & _guard197; wire _guard199 = pd_out; wire _guard200 = pd0_out; wire _guard201 = _guard199 & _guard200; wire _guard202 = fsm_out == 3'd5; -wire _guard203 = block_transfer_done_out; -wire _guard204 = ~_guard203; -wire _guard205 = fsm_out == 3'd2; -wire _guard206 = _guard204 & _guard205; -wire _guard207 = tdcc_go_out; +wire _guard203 = pd_out; +wire _guard204 = curr_addr_internal_mem_incr_1_1_group_done_out; +wire _guard205 = _guard203 | _guard204; +wire _guard206 = ~_guard205; +wire _guard207 = par0_go_out; wire _guard208 = _guard206 & _guard207; -wire _guard209 = pd_out; -wire _guard210 = curr_addr_internal_mem_incr_group_done_out; -wire _guard211 = _guard209 | _guard210; -wire _guard212 = ~_guard211; -wire _guard213 = par0_go_out; +wire _guard209 = block_transfer_done_out; +wire _guard210 = ~_guard209; +wire _guard211 = fsm_out == 3'd2; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = tdcc_go_out; wire _guard214 = _guard212 & _guard213; wire _guard215 = block_transfer_go_out; wire _guard216 = service_read_transfer_go_out; @@ -3586,44 +3518,44 @@ wire _guard239 = fsm_out == 3'd4; wire _guard240 = _guard238 & _guard239; wire _guard241 = tdcc_go_out; wire _guard242 = _guard240 & _guard241; -assign curr_addr_axi_incr_group_go_in = _guard6; -assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_incr_right = 3'd1; -assign done = _guard9; -assign mem_ref_content_en = _guard10; -assign curr_addr_axi_write_en = _guard11; -assign curr_addr_axi_in = curr_addr_axi_incr_out; +assign done = _guard1; +assign mem_ref_content_en = _guard2; +assign curr_addr_axi_write_en = _guard3; +assign curr_addr_axi_in = curr_addr_axi_incr_4_2_out; assign RREADY = rready_out; -assign curr_addr_internal_mem_write_en = _guard13; +assign curr_addr_internal_mem_write_en = _guard5; assign mem_ref_write_data = read_data_reg_out; -assign mem_ref_write_en = _guard15; +assign mem_ref_write_en = _guard7; assign mem_ref_addr0 = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_in = curr_addr_internal_mem_incr_out; -assign fsm_write_en = _guard70; +assign curr_addr_internal_mem_in = curr_addr_internal_mem_incr_1_1_out; +assign fsm_write_en = _guard62; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard87 ? 3'd5 : - _guard92 ? 3'd2 : - _guard97 ? 3'd4 : - _guard112 ? 3'd1 : - _guard113 ? 3'd0 : - _guard118 ? 3'd3 : + _guard79 ? 3'd5 : + _guard84 ? 3'd2 : + _guard89 ? 3'd4 : + _guard104 ? 3'd1 : + _guard105 ? 3'd0 : + _guard110 ? 3'd3 : 3'd0; +assign curr_addr_axi_incr_4_2_group_done_in = curr_addr_axi_done; +assign curr_addr_axi_incr_4_2_left = curr_addr_axi_out; +assign curr_addr_axi_incr_4_2_right = 64'd4; assign block_transfer_done_in = bt_reg_out; assign service_read_transfer_done_in = mem_ref_done; assign read_data_reg_write_en = - _guard123 ? 1'd1 : - _guard129 ? 1'd0 : + _guard117 ? 1'd1 : + _guard123 ? 1'd0 : 1'd0; assign read_data_reg_clk = clk; assign read_data_reg_reset = reset; assign read_data_reg_in = RDATA; +assign curr_addr_axi_incr_4_2_group_go_in = _guard130; +assign curr_addr_internal_mem_incr_1_1_left = curr_addr_internal_mem_out; +assign curr_addr_internal_mem_incr_1_1_right = 3'd1; assign tdcc_go_in = go; -assign invoke0_go_in = _guard136; -assign curr_addr_axi_incr_left = curr_addr_axi_out; -assign curr_addr_axi_incr_right = 64'd4; -assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; +assign invoke0_go_in = _guard138; assign par0_done_in = _guard141; assign n_RLAST_write_en = _guard144; assign n_RLAST_clk = clk; @@ -3641,6 +3573,7 @@ assign bt_reg_in = _guard167 ? 1'd1 : _guard175 ? 1'd0 : 'x; +assign curr_addr_internal_mem_incr_1_1_group_done_in = curr_addr_internal_mem_done; assign pd_write_en = _guard182; assign pd_clk = clk; assign pd_reset = reset; @@ -3656,8 +3589,8 @@ assign pd0_in = _guard201 ? 1'd0 : 1'd0; assign tdcc_done_in = _guard202; -assign block_transfer_go_in = _guard208; -assign curr_addr_internal_mem_incr_group_go_in = _guard214; +assign curr_addr_internal_mem_incr_1_1_group_go_in = _guard208; +assign block_transfer_go_in = _guard214; assign invoke1_done_in = bt_reg_done; assign rready_write_en = _guard217; assign rready_clk = clk; @@ -3667,7 +3600,6 @@ assign rready_in = _guard230 ? 1'd0 : 'x; assign service_read_transfer_go_in = _guard236; -assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; assign par0_go_in = _guard242; // COMPONENT END: m_read_channel endmodule @@ -3731,24 +3663,15 @@ logic bt_reg_clk; logic bt_reg_reset; logic bt_reg_out; logic bt_reg_done; -logic [2:0] curr_addr_internal_mem_incr_left; -logic [2:0] curr_addr_internal_mem_incr_right; -logic [2:0] curr_addr_internal_mem_incr_out; -logic [63:0] curr_addr_axi_incr_left; -logic [63:0] curr_addr_axi_incr_right; -logic [63:0] curr_addr_axi_incr_out; -logic [7:0] curr_transfer_count_incr_left; -logic [7:0] curr_transfer_count_incr_right; -logic [7:0] curr_transfer_count_incr_out; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; +logic [2:0] curr_addr_internal_mem_incr_1_1_left; +logic [2:0] curr_addr_internal_mem_incr_1_1_right; +logic [2:0] curr_addr_internal_mem_incr_1_1_out; +logic [63:0] curr_addr_axi_incr_4_2_left; +logic [63:0] curr_addr_axi_incr_4_2_right; +logic [63:0] curr_addr_axi_incr_4_2_out; +logic [7:0] curr_transfer_count_incr_1_3_left; +logic [7:0] curr_transfer_count_incr_1_3_right; +logic [7:0] curr_transfer_count_incr_1_3_out; logic ud_out; logic signal_reg_in; logic signal_reg_write_en; @@ -3774,24 +3697,24 @@ logic pd1_clk; logic pd1_reset; logic pd1_out; logic pd1_done; -logic [2:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [2:0] fsm0_out; -logic fsm0_done; +logic [2:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [2:0] fsm_out; +logic fsm_done; logic service_write_transfer_go_in; logic service_write_transfer_go_out; logic service_write_transfer_done_in; logic service_write_transfer_done_out; -logic curr_addr_internal_mem_incr_group_go_in; -logic curr_addr_internal_mem_incr_group_go_out; -logic curr_addr_internal_mem_incr_group_done_in; -logic curr_addr_internal_mem_incr_group_done_out; -logic curr_addr_axi_incr_group_go_in; -logic curr_addr_axi_incr_group_go_out; -logic curr_addr_axi_incr_group_done_in; -logic curr_addr_axi_incr_group_done_out; +logic curr_addr_internal_mem_incr_1_1_group_go_in; +logic curr_addr_internal_mem_incr_1_1_group_go_out; +logic curr_addr_internal_mem_incr_1_1_group_done_in; +logic curr_addr_internal_mem_incr_1_1_group_done_out; +logic curr_addr_axi_incr_4_2_group_go_in; +logic curr_addr_axi_incr_4_2_group_go_out; +logic curr_addr_axi_incr_4_2_group_done_in; +logic curr_addr_axi_incr_4_2_group_done_out; logic invoke0_go_in; logic invoke0_go_out; logic invoke0_done_in; @@ -3804,14 +3727,14 @@ logic invoke2_go_in; logic invoke2_go_out; logic invoke2_done_in; logic invoke2_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -3872,41 +3795,24 @@ std_reg # ( ); std_add # ( .WIDTH(3) -) curr_addr_internal_mem_incr ( - .left(curr_addr_internal_mem_incr_left), - .out(curr_addr_internal_mem_incr_out), - .right(curr_addr_internal_mem_incr_right) +) curr_addr_internal_mem_incr_1_1 ( + .left(curr_addr_internal_mem_incr_1_1_left), + .out(curr_addr_internal_mem_incr_1_1_out), + .right(curr_addr_internal_mem_incr_1_1_right) ); std_add # ( .WIDTH(64) -) curr_addr_axi_incr ( - .left(curr_addr_axi_incr_left), - .out(curr_addr_axi_incr_out), - .right(curr_addr_axi_incr_right) +) curr_addr_axi_incr_4_2 ( + .left(curr_addr_axi_incr_4_2_left), + .out(curr_addr_axi_incr_4_2_out), + .right(curr_addr_axi_incr_4_2_right) ); std_add # ( .WIDTH(8) -) curr_transfer_count_incr ( - .left(curr_transfer_count_incr_left), - .out(curr_transfer_count_incr_out), - .right(curr_transfer_count_incr_right) -); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) +) curr_transfer_count_incr_1_3 ( + .left(curr_transfer_count_incr_1_3_left), + .out(curr_transfer_count_incr_1_3_out), + .right(curr_transfer_count_incr_1_3_right) ); undef # ( .WIDTH(1) @@ -3955,13 +3861,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_wire # ( .WIDTH(1) @@ -3977,27 +3883,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_go ( - .in(curr_addr_internal_mem_incr_group_go_in), - .out(curr_addr_internal_mem_incr_group_go_out) +) curr_addr_internal_mem_incr_1_1_group_go ( + .in(curr_addr_internal_mem_incr_1_1_group_go_in), + .out(curr_addr_internal_mem_incr_1_1_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_internal_mem_incr_group_done ( - .in(curr_addr_internal_mem_incr_group_done_in), - .out(curr_addr_internal_mem_incr_group_done_out) +) curr_addr_internal_mem_incr_1_1_group_done ( + .in(curr_addr_internal_mem_incr_1_1_group_done_in), + .out(curr_addr_internal_mem_incr_1_1_group_done_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_go ( - .in(curr_addr_axi_incr_group_go_in), - .out(curr_addr_axi_incr_group_go_out) +) curr_addr_axi_incr_4_2_group_go ( + .in(curr_addr_axi_incr_4_2_group_go_in), + .out(curr_addr_axi_incr_4_2_group_go_out) ); std_wire # ( .WIDTH(1) -) curr_addr_axi_incr_group_done ( - .in(curr_addr_axi_incr_group_done_in), - .out(curr_addr_axi_incr_group_done_out) +) curr_addr_axi_incr_4_2_group_done ( + .in(curr_addr_axi_incr_4_2_group_done_in), + .out(curr_addr_axi_incr_4_2_group_done_out) ); std_wire # ( .WIDTH(1) @@ -4037,27 +3943,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) @@ -4084,466 +3990,439 @@ std_wire # ( .out(tdcc_done_out) ); wire _guard0 = 1; -wire _guard1 = pd1_out; -wire _guard2 = curr_addr_axi_incr_group_done_out; -wire _guard3 = _guard1 | _guard2; -wire _guard4 = ~_guard3; -wire _guard5 = par0_go_out; -wire _guard6 = _guard4 & _guard5; -wire _guard7 = curr_addr_internal_mem_incr_group_go_out; -wire _guard8 = curr_addr_internal_mem_incr_group_go_out; -wire _guard9 = tdcc_done_out; +wire _guard1 = tdcc_done_out; +wire _guard2 = service_write_transfer_go_out; +wire _guard3 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard4 = service_write_transfer_go_out; +wire _guard5 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard6 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard7 = invoke0_go_out; +wire _guard8 = _guard6 | _guard7; +wire _guard9 = max_transfers_out == curr_transfer_count_out; wire _guard10 = service_write_transfer_go_out; -wire _guard11 = curr_addr_axi_incr_group_go_out; -wire _guard12 = service_write_transfer_go_out; -wire _guard13 = curr_addr_axi_incr_group_go_out; -wire _guard14 = curr_addr_internal_mem_incr_group_go_out; -wire _guard15 = invoke0_go_out; -wire _guard16 = _guard14 | _guard15; -wire _guard17 = max_transfers_out == curr_transfer_count_out; -wire _guard18 = service_write_transfer_go_out; -wire _guard19 = _guard17 & _guard18; -wire _guard20 = max_transfers_out != curr_transfer_count_out; -wire _guard21 = service_write_transfer_go_out; -wire _guard22 = _guard20 & _guard21; -wire _guard23 = service_write_transfer_go_out; -wire _guard24 = curr_addr_internal_mem_incr_group_go_out; -wire _guard25 = invoke0_go_out; -wire _guard26 = early_reset_static_par_go_out; -wire _guard27 = fsm_out == 1'd0; -wire _guard28 = ~_guard27; -wire _guard29 = early_reset_static_par_go_out; -wire _guard30 = _guard28 & _guard29; -wire _guard31 = fsm_out == 1'd0; -wire _guard32 = early_reset_static_par_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_static_par_go_out; -wire _guard35 = early_reset_static_par_go_out; -wire _guard36 = invoke2_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm0_out == 3'd2; +wire _guard11 = _guard9 & _guard10; +wire _guard12 = max_transfers_out != curr_transfer_count_out; +wire _guard13 = service_write_transfer_go_out; +wire _guard14 = _guard12 & _guard13; +wire _guard15 = service_write_transfer_go_out; +wire _guard16 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard17 = invoke0_go_out; +wire _guard18 = fsm_out == 3'd5; +wire _guard19 = fsm_out == 3'd0; +wire _guard20 = invoke0_done_out; +wire _guard21 = _guard19 & _guard20; +wire _guard22 = tdcc_go_out; +wire _guard23 = _guard21 & _guard22; +wire _guard24 = _guard18 | _guard23; +wire _guard25 = fsm_out == 3'd1; +wire _guard26 = invoke1_done_out; +wire _guard27 = n_finished_last_transfer_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = _guard25 & _guard28; +wire _guard30 = tdcc_go_out; +wire _guard31 = _guard29 & _guard30; +wire _guard32 = _guard24 | _guard31; +wire _guard33 = fsm_out == 3'd4; +wire _guard34 = par0_done_out; +wire _guard35 = n_finished_last_transfer_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = _guard33 & _guard36; +wire _guard38 = tdcc_go_out; wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = early_reset_static_par_go_out; -wire _guard43 = early_reset_static_par_go_out; -wire _guard44 = service_write_transfer_go_out; -wire _guard45 = wvalid_out; -wire _guard46 = WREADY; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = ~_guard47; -wire _guard49 = w_handshake_occurred_out; -wire _guard50 = ~_guard49; -wire _guard51 = _guard48 & _guard50; -wire _guard52 = service_write_transfer_go_out; -wire _guard53 = _guard51 & _guard52; -wire _guard54 = wvalid_out; -wire _guard55 = WREADY; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = w_handshake_occurred_out; -wire _guard58 = _guard56 | _guard57; -wire _guard59 = service_write_transfer_go_out; +wire _guard40 = _guard32 | _guard39; +wire _guard41 = fsm_out == 3'd2; +wire _guard42 = invoke2_done_out; +wire _guard43 = _guard41 & _guard42; +wire _guard44 = tdcc_go_out; +wire _guard45 = _guard43 & _guard44; +wire _guard46 = _guard40 | _guard45; +wire _guard47 = fsm_out == 3'd3; +wire _guard48 = service_write_transfer_done_out; +wire _guard49 = _guard47 & _guard48; +wire _guard50 = tdcc_go_out; +wire _guard51 = _guard49 & _guard50; +wire _guard52 = _guard46 | _guard51; +wire _guard53 = fsm_out == 3'd1; +wire _guard54 = invoke1_done_out; +wire _guard55 = n_finished_last_transfer_out; +wire _guard56 = ~_guard55; +wire _guard57 = _guard54 & _guard56; +wire _guard58 = _guard53 & _guard57; +wire _guard59 = tdcc_go_out; wire _guard60 = _guard58 & _guard59; -wire _guard61 = pd_out; -wire _guard62 = wrapper_early_reset_static_par_done_out; -wire _guard63 = _guard61 | _guard62; -wire _guard64 = ~_guard63; -wire _guard65 = par0_go_out; -wire _guard66 = _guard64 & _guard65; -wire _guard67 = max_transfers_out == curr_transfer_count_out; -wire _guard68 = wvalid_out; -wire _guard69 = WREADY; -wire _guard70 = _guard68 & _guard69; -wire _guard71 = _guard67 & _guard70; -wire _guard72 = service_write_transfer_go_out; -wire _guard73 = _guard71 & _guard72; -wire _guard74 = invoke1_go_out; -wire _guard75 = _guard73 | _guard74; -wire _guard76 = invoke1_go_out; -wire _guard77 = max_transfers_out == curr_transfer_count_out; -wire _guard78 = wvalid_out; -wire _guard79 = WREADY; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = _guard77 & _guard80; -wire _guard82 = service_write_transfer_go_out; -wire _guard83 = _guard81 & _guard82; -wire _guard84 = early_reset_static_par_go_out; -wire _guard85 = early_reset_static_par_go_out; -wire _guard86 = pd_out; -wire _guard87 = pd0_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = pd1_out; -wire _guard90 = _guard88 & _guard89; -wire _guard91 = curr_addr_axi_incr_group_done_out; -wire _guard92 = par0_go_out; -wire _guard93 = _guard91 & _guard92; -wire _guard94 = _guard90 | _guard93; -wire _guard95 = curr_addr_axi_incr_group_done_out; -wire _guard96 = par0_go_out; -wire _guard97 = _guard95 & _guard96; -wire _guard98 = pd_out; -wire _guard99 = pd0_out; -wire _guard100 = _guard98 & _guard99; -wire _guard101 = pd1_out; -wire _guard102 = _guard100 & _guard101; -wire _guard103 = fsm_out == 1'd0; -wire _guard104 = signal_reg_out; +wire _guard61 = _guard52 | _guard60; +wire _guard62 = fsm_out == 3'd4; +wire _guard63 = par0_done_out; +wire _guard64 = n_finished_last_transfer_out; +wire _guard65 = ~_guard64; +wire _guard66 = _guard63 & _guard65; +wire _guard67 = _guard62 & _guard66; +wire _guard68 = tdcc_go_out; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = _guard61 | _guard69; +wire _guard71 = fsm_out == 3'd1; +wire _guard72 = invoke1_done_out; +wire _guard73 = n_finished_last_transfer_out; +wire _guard74 = ~_guard73; +wire _guard75 = _guard72 & _guard74; +wire _guard76 = _guard71 & _guard75; +wire _guard77 = tdcc_go_out; +wire _guard78 = _guard76 & _guard77; +wire _guard79 = fsm_out == 3'd4; +wire _guard80 = par0_done_out; +wire _guard81 = n_finished_last_transfer_out; +wire _guard82 = ~_guard81; +wire _guard83 = _guard80 & _guard82; +wire _guard84 = _guard79 & _guard83; +wire _guard85 = tdcc_go_out; +wire _guard86 = _guard84 & _guard85; +wire _guard87 = _guard78 | _guard86; +wire _guard88 = fsm_out == 3'd1; +wire _guard89 = invoke1_done_out; +wire _guard90 = n_finished_last_transfer_out; +wire _guard91 = _guard89 & _guard90; +wire _guard92 = _guard88 & _guard91; +wire _guard93 = tdcc_go_out; +wire _guard94 = _guard92 & _guard93; +wire _guard95 = fsm_out == 3'd4; +wire _guard96 = par0_done_out; +wire _guard97 = n_finished_last_transfer_out; +wire _guard98 = _guard96 & _guard97; +wire _guard99 = _guard95 & _guard98; +wire _guard100 = tdcc_go_out; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = _guard94 | _guard101; +wire _guard103 = fsm_out == 3'd3; +wire _guard104 = service_write_transfer_done_out; wire _guard105 = _guard103 & _guard104; -wire _guard106 = invoke0_done_out; -wire _guard107 = ~_guard106; -wire _guard108 = fsm0_out == 3'd0; -wire _guard109 = _guard107 & _guard108; -wire _guard110 = tdcc_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = fsm0_out == 3'd5; -wire _guard113 = fsm0_out == 3'd0; -wire _guard114 = invoke0_done_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = tdcc_go_out; -wire _guard117 = _guard115 & _guard116; -wire _guard118 = _guard112 | _guard117; -wire _guard119 = fsm0_out == 3'd1; -wire _guard120 = invoke1_done_out; -wire _guard121 = n_finished_last_transfer_out; -wire _guard122 = _guard120 & _guard121; -wire _guard123 = _guard119 & _guard122; -wire _guard124 = tdcc_go_out; -wire _guard125 = _guard123 & _guard124; -wire _guard126 = _guard118 | _guard125; -wire _guard127 = fsm0_out == 3'd4; -wire _guard128 = par0_done_out; -wire _guard129 = n_finished_last_transfer_out; +wire _guard106 = tdcc_go_out; +wire _guard107 = _guard105 & _guard106; +wire _guard108 = fsm_out == 3'd0; +wire _guard109 = invoke0_done_out; +wire _guard110 = _guard108 & _guard109; +wire _guard111 = tdcc_go_out; +wire _guard112 = _guard110 & _guard111; +wire _guard113 = fsm_out == 3'd5; +wire _guard114 = fsm_out == 3'd2; +wire _guard115 = invoke2_done_out; +wire _guard116 = _guard114 & _guard115; +wire _guard117 = tdcc_go_out; +wire _guard118 = _guard116 & _guard117; +wire _guard119 = early_reset_static_par_thread_go_out; +wire _guard120 = early_reset_static_par_thread_go_out; +wire _guard121 = pd_out; +wire _guard122 = wrapper_early_reset_static_par_thread_done_out; +wire _guard123 = _guard121 | _guard122; +wire _guard124 = ~_guard123; +wire _guard125 = par0_go_out; +wire _guard126 = _guard124 & _guard125; +wire _guard127 = invoke2_done_out; +wire _guard128 = ~_guard127; +wire _guard129 = fsm_out == 3'd2; wire _guard130 = _guard128 & _guard129; -wire _guard131 = _guard127 & _guard130; -wire _guard132 = tdcc_go_out; -wire _guard133 = _guard131 & _guard132; -wire _guard134 = _guard126 | _guard133; -wire _guard135 = fsm0_out == 3'd2; -wire _guard136 = invoke2_done_out; -wire _guard137 = _guard135 & _guard136; -wire _guard138 = tdcc_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = _guard134 | _guard139; -wire _guard141 = fsm0_out == 3'd3; -wire _guard142 = service_write_transfer_done_out; -wire _guard143 = _guard141 & _guard142; -wire _guard144 = tdcc_go_out; -wire _guard145 = _guard143 & _guard144; -wire _guard146 = _guard140 | _guard145; -wire _guard147 = fsm0_out == 3'd1; -wire _guard148 = invoke1_done_out; -wire _guard149 = n_finished_last_transfer_out; -wire _guard150 = ~_guard149; -wire _guard151 = _guard148 & _guard150; -wire _guard152 = _guard147 & _guard151; -wire _guard153 = tdcc_go_out; +wire _guard131 = tdcc_go_out; +wire _guard132 = _guard130 & _guard131; +wire _guard133 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard134 = curr_addr_axi_incr_4_2_group_go_out; +wire _guard135 = early_reset_static_par_thread_go_out; +wire _guard136 = early_reset_static_par_thread_go_out; +wire _guard137 = pd1_out; +wire _guard138 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard139 = _guard137 | _guard138; +wire _guard140 = ~_guard139; +wire _guard141 = par0_go_out; +wire _guard142 = _guard140 & _guard141; +wire _guard143 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard144 = curr_addr_internal_mem_incr_1_1_group_go_out; +wire _guard145 = service_write_transfer_go_out; +wire _guard146 = wvalid_out; +wire _guard147 = WREADY; +wire _guard148 = _guard146 & _guard147; +wire _guard149 = ~_guard148; +wire _guard150 = w_handshake_occurred_out; +wire _guard151 = ~_guard150; +wire _guard152 = _guard149 & _guard151; +wire _guard153 = service_write_transfer_go_out; wire _guard154 = _guard152 & _guard153; -wire _guard155 = _guard146 | _guard154; -wire _guard156 = fsm0_out == 3'd4; -wire _guard157 = par0_done_out; -wire _guard158 = n_finished_last_transfer_out; -wire _guard159 = ~_guard158; -wire _guard160 = _guard157 & _guard159; -wire _guard161 = _guard156 & _guard160; -wire _guard162 = tdcc_go_out; -wire _guard163 = _guard161 & _guard162; -wire _guard164 = _guard155 | _guard163; -wire _guard165 = fsm0_out == 3'd1; -wire _guard166 = invoke1_done_out; -wire _guard167 = n_finished_last_transfer_out; -wire _guard168 = ~_guard167; -wire _guard169 = _guard166 & _guard168; -wire _guard170 = _guard165 & _guard169; -wire _guard171 = tdcc_go_out; -wire _guard172 = _guard170 & _guard171; -wire _guard173 = fsm0_out == 3'd4; -wire _guard174 = par0_done_out; -wire _guard175 = n_finished_last_transfer_out; -wire _guard176 = ~_guard175; -wire _guard177 = _guard174 & _guard176; -wire _guard178 = _guard173 & _guard177; -wire _guard179 = tdcc_go_out; -wire _guard180 = _guard178 & _guard179; -wire _guard181 = _guard172 | _guard180; -wire _guard182 = fsm0_out == 3'd1; -wire _guard183 = invoke1_done_out; -wire _guard184 = n_finished_last_transfer_out; -wire _guard185 = _guard183 & _guard184; -wire _guard186 = _guard182 & _guard185; -wire _guard187 = tdcc_go_out; -wire _guard188 = _guard186 & _guard187; -wire _guard189 = fsm0_out == 3'd4; -wire _guard190 = par0_done_out; -wire _guard191 = n_finished_last_transfer_out; -wire _guard192 = _guard190 & _guard191; -wire _guard193 = _guard189 & _guard192; -wire _guard194 = tdcc_go_out; +wire _guard155 = wvalid_out; +wire _guard156 = WREADY; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = w_handshake_occurred_out; +wire _guard159 = _guard157 | _guard158; +wire _guard160 = service_write_transfer_go_out; +wire _guard161 = _guard159 & _guard160; +wire _guard162 = max_transfers_out == curr_transfer_count_out; +wire _guard163 = wvalid_out; +wire _guard164 = WREADY; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard162 & _guard165; +wire _guard167 = service_write_transfer_go_out; +wire _guard168 = _guard166 & _guard167; +wire _guard169 = invoke1_go_out; +wire _guard170 = _guard168 | _guard169; +wire _guard171 = invoke1_go_out; +wire _guard172 = max_transfers_out == curr_transfer_count_out; +wire _guard173 = wvalid_out; +wire _guard174 = WREADY; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = _guard172 & _guard175; +wire _guard177 = service_write_transfer_go_out; +wire _guard178 = _guard176 & _guard177; +wire _guard179 = pd_out; +wire _guard180 = pd0_out; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = pd1_out; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard185 = par0_go_out; +wire _guard186 = _guard184 & _guard185; +wire _guard187 = _guard183 | _guard186; +wire _guard188 = curr_addr_axi_incr_4_2_group_done_out; +wire _guard189 = par0_go_out; +wire _guard190 = _guard188 & _guard189; +wire _guard191 = pd_out; +wire _guard192 = pd0_out; +wire _guard193 = _guard191 & _guard192; +wire _guard194 = pd1_out; wire _guard195 = _guard193 & _guard194; -wire _guard196 = _guard188 | _guard195; -wire _guard197 = fsm0_out == 3'd3; -wire _guard198 = service_write_transfer_done_out; +wire _guard196 = invoke0_done_out; +wire _guard197 = ~_guard196; +wire _guard198 = fsm_out == 3'd0; wire _guard199 = _guard197 & _guard198; wire _guard200 = tdcc_go_out; wire _guard201 = _guard199 & _guard200; -wire _guard202 = fsm0_out == 3'd0; -wire _guard203 = invoke0_done_out; +wire _guard202 = pd_out; +wire _guard203 = pd0_out; wire _guard204 = _guard202 & _guard203; -wire _guard205 = tdcc_go_out; +wire _guard205 = pd1_out; wire _guard206 = _guard204 & _guard205; -wire _guard207 = fsm0_out == 3'd5; -wire _guard208 = fsm0_out == 3'd2; -wire _guard209 = invoke2_done_out; +wire _guard207 = service_write_transfer_done_out; +wire _guard208 = ~_guard207; +wire _guard209 = fsm_out == 3'd3; wire _guard210 = _guard208 & _guard209; wire _guard211 = tdcc_go_out; wire _guard212 = _guard210 & _guard211; -wire _guard213 = curr_addr_axi_incr_group_go_out; -wire _guard214 = curr_addr_axi_incr_group_go_out; -wire _guard215 = pd_out; -wire _guard216 = pd0_out; -wire _guard217 = _guard215 & _guard216; -wire _guard218 = pd1_out; -wire _guard219 = _guard217 & _guard218; -wire _guard220 = service_write_transfer_done_out; -wire _guard221 = ~_guard220; -wire _guard222 = fsm0_out == 3'd3; -wire _guard223 = _guard221 & _guard222; -wire _guard224 = tdcc_go_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = invoke1_done_out; -wire _guard227 = ~_guard226; -wire _guard228 = fsm0_out == 3'd1; +wire _guard213 = invoke1_done_out; +wire _guard214 = ~_guard213; +wire _guard215 = fsm_out == 3'd1; +wire _guard216 = _guard214 & _guard215; +wire _guard217 = tdcc_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = service_write_transfer_go_out; +wire _guard220 = invoke2_go_out; +wire _guard221 = _guard219 | _guard220; +wire _guard222 = wvalid_out; +wire _guard223 = WREADY; +wire _guard224 = _guard222 & _guard223; +wire _guard225 = service_write_transfer_go_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = wvalid_out; +wire _guard228 = WREADY; wire _guard229 = _guard227 & _guard228; -wire _guard230 = tdcc_go_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = service_write_transfer_go_out; +wire _guard230 = ~_guard229; +wire _guard231 = service_write_transfer_go_out; +wire _guard232 = _guard230 & _guard231; wire _guard233 = invoke2_go_out; wire _guard234 = _guard232 | _guard233; -wire _guard235 = wvalid_out; -wire _guard236 = WREADY; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = service_write_transfer_go_out; -wire _guard239 = _guard237 & _guard238; -wire _guard240 = wvalid_out; -wire _guard241 = WREADY; -wire _guard242 = _guard240 & _guard241; -wire _guard243 = ~_guard242; -wire _guard244 = service_write_transfer_go_out; -wire _guard245 = _guard243 & _guard244; -wire _guard246 = invoke2_go_out; -wire _guard247 = _guard245 | _guard246; -wire _guard248 = fsm_out == 1'd0; -wire _guard249 = signal_reg_out; -wire _guard250 = _guard248 & _guard249; -wire _guard251 = fsm_out == 1'd0; -wire _guard252 = signal_reg_out; -wire _guard253 = ~_guard252; -wire _guard254 = _guard251 & _guard253; -wire _guard255 = wrapper_early_reset_static_par_go_out; -wire _guard256 = _guard254 & _guard255; -wire _guard257 = _guard250 | _guard256; -wire _guard258 = fsm_out == 1'd0; -wire _guard259 = signal_reg_out; -wire _guard260 = ~_guard259; -wire _guard261 = _guard258 & _guard260; -wire _guard262 = wrapper_early_reset_static_par_go_out; -wire _guard263 = _guard261 & _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = pd_out; -wire _guard268 = pd0_out; -wire _guard269 = _guard267 & _guard268; -wire _guard270 = pd1_out; -wire _guard271 = _guard269 & _guard270; -wire _guard272 = wrapper_early_reset_static_par_done_out; -wire _guard273 = par0_go_out; -wire _guard274 = _guard272 & _guard273; -wire _guard275 = _guard271 | _guard274; -wire _guard276 = wrapper_early_reset_static_par_done_out; -wire _guard277 = par0_go_out; -wire _guard278 = _guard276 & _guard277; -wire _guard279 = pd_out; -wire _guard280 = pd0_out; -wire _guard281 = _guard279 & _guard280; -wire _guard282 = pd1_out; -wire _guard283 = _guard281 & _guard282; -wire _guard284 = pd_out; -wire _guard285 = pd0_out; -wire _guard286 = _guard284 & _guard285; -wire _guard287 = pd1_out; -wire _guard288 = _guard286 & _guard287; -wire _guard289 = curr_addr_internal_mem_incr_group_done_out; -wire _guard290 = par0_go_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = _guard288 | _guard291; -wire _guard293 = curr_addr_internal_mem_incr_group_done_out; -wire _guard294 = par0_go_out; -wire _guard295 = _guard293 & _guard294; -wire _guard296 = pd_out; -wire _guard297 = pd0_out; -wire _guard298 = _guard296 & _guard297; -wire _guard299 = pd1_out; -wire _guard300 = _guard298 & _guard299; -wire _guard301 = w_handshake_occurred_out; -wire _guard302 = ~_guard301; -wire _guard303 = service_write_transfer_go_out; -wire _guard304 = _guard302 & _guard303; -wire _guard305 = early_reset_static_par_go_out; -wire _guard306 = _guard304 | _guard305; -wire _guard307 = wvalid_out; -wire _guard308 = WREADY; -wire _guard309 = _guard307 & _guard308; -wire _guard310 = service_write_transfer_go_out; +wire _guard235 = signal_reg_out; +wire _guard236 = _guard0 & _guard0; +wire _guard237 = signal_reg_out; +wire _guard238 = ~_guard237; +wire _guard239 = _guard236 & _guard238; +wire _guard240 = wrapper_early_reset_static_par_thread_go_out; +wire _guard241 = _guard239 & _guard240; +wire _guard242 = _guard235 | _guard241; +wire _guard243 = _guard0 & _guard0; +wire _guard244 = signal_reg_out; +wire _guard245 = ~_guard244; +wire _guard246 = _guard243 & _guard245; +wire _guard247 = wrapper_early_reset_static_par_thread_go_out; +wire _guard248 = _guard246 & _guard247; +wire _guard249 = signal_reg_out; +wire _guard250 = wrapper_early_reset_static_par_thread_go_out; +wire _guard251 = pd_out; +wire _guard252 = pd0_out; +wire _guard253 = _guard251 & _guard252; +wire _guard254 = pd1_out; +wire _guard255 = _guard253 & _guard254; +wire _guard256 = wrapper_early_reset_static_par_thread_done_out; +wire _guard257 = par0_go_out; +wire _guard258 = _guard256 & _guard257; +wire _guard259 = _guard255 | _guard258; +wire _guard260 = wrapper_early_reset_static_par_thread_done_out; +wire _guard261 = par0_go_out; +wire _guard262 = _guard260 & _guard261; +wire _guard263 = pd_out; +wire _guard264 = pd0_out; +wire _guard265 = _guard263 & _guard264; +wire _guard266 = pd1_out; +wire _guard267 = _guard265 & _guard266; +wire _guard268 = pd_out; +wire _guard269 = pd0_out; +wire _guard270 = _guard268 & _guard269; +wire _guard271 = pd1_out; +wire _guard272 = _guard270 & _guard271; +wire _guard273 = curr_addr_internal_mem_incr_1_1_group_done_out; +wire _guard274 = par0_go_out; +wire _guard275 = _guard273 & _guard274; +wire _guard276 = _guard272 | _guard275; +wire _guard277 = curr_addr_internal_mem_incr_1_1_group_done_out; +wire _guard278 = par0_go_out; +wire _guard279 = _guard277 & _guard278; +wire _guard280 = pd_out; +wire _guard281 = pd0_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = pd1_out; +wire _guard284 = _guard282 & _guard283; +wire _guard285 = signal_reg_out; +wire _guard286 = w_handshake_occurred_out; +wire _guard287 = ~_guard286; +wire _guard288 = service_write_transfer_go_out; +wire _guard289 = _guard287 & _guard288; +wire _guard290 = early_reset_static_par_thread_go_out; +wire _guard291 = _guard289 | _guard290; +wire _guard292 = wvalid_out; +wire _guard293 = WREADY; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = service_write_transfer_go_out; +wire _guard296 = _guard294 & _guard295; +wire _guard297 = wvalid_out; +wire _guard298 = WREADY; +wire _guard299 = _guard297 & _guard298; +wire _guard300 = ~_guard299; +wire _guard301 = service_write_transfer_go_out; +wire _guard302 = _guard300 & _guard301; +wire _guard303 = early_reset_static_par_thread_go_out; +wire _guard304 = _guard302 | _guard303; +wire _guard305 = fsm_out == 3'd5; +wire _guard306 = pd0_out; +wire _guard307 = curr_addr_internal_mem_incr_1_1_group_done_out; +wire _guard308 = _guard306 | _guard307; +wire _guard309 = ~_guard308; +wire _guard310 = par0_go_out; wire _guard311 = _guard309 & _guard310; -wire _guard312 = wvalid_out; -wire _guard313 = WREADY; -wire _guard314 = _guard312 & _guard313; -wire _guard315 = ~_guard314; -wire _guard316 = service_write_transfer_go_out; +wire _guard312 = par0_done_out; +wire _guard313 = ~_guard312; +wire _guard314 = fsm_out == 3'd4; +wire _guard315 = _guard313 & _guard314; +wire _guard316 = tdcc_go_out; wire _guard317 = _guard315 & _guard316; -wire _guard318 = early_reset_static_par_go_out; -wire _guard319 = _guard317 | _guard318; -wire _guard320 = fsm0_out == 3'd5; -wire _guard321 = wrapper_early_reset_static_par_go_out; -wire _guard322 = pd0_out; -wire _guard323 = curr_addr_internal_mem_incr_group_done_out; -wire _guard324 = _guard322 | _guard323; -wire _guard325 = ~_guard324; -wire _guard326 = par0_go_out; -wire _guard327 = _guard325 & _guard326; -wire _guard328 = par0_done_out; -wire _guard329 = ~_guard328; -wire _guard330 = fsm0_out == 3'd4; -wire _guard331 = _guard329 & _guard330; -wire _guard332 = tdcc_go_out; -wire _guard333 = _guard331 & _guard332; -assign curr_addr_axi_incr_group_go_in = _guard6; -assign curr_addr_internal_mem_incr_left = curr_addr_internal_mem_out; -assign curr_addr_internal_mem_incr_right = 3'd1; -assign done = _guard9; -assign mem_ref_content_en = _guard10; -assign curr_addr_axi_write_en = _guard11; +assign done = _guard1; +assign mem_ref_content_en = _guard2; +assign curr_addr_axi_write_en = _guard3; assign WVALID = wvalid_out; assign WDATA = - _guard12 ? mem_ref_read_data : + _guard4 ? mem_ref_read_data : 32'd0; -assign curr_addr_axi_in = curr_addr_axi_incr_out; -assign curr_addr_internal_mem_write_en = _guard16; +assign curr_addr_axi_in = curr_addr_axi_incr_4_2_out; +assign curr_addr_internal_mem_write_en = _guard8; assign mem_ref_write_en = 1'd0; assign WLAST = - _guard19 ? 1'd1 : - _guard22 ? 1'd0 : + _guard11 ? 1'd1 : + _guard14 ? 1'd0 : 1'd0; assign mem_ref_addr0 = curr_addr_internal_mem_out; assign curr_addr_internal_mem_in = - _guard24 ? curr_addr_internal_mem_incr_out : - _guard25 ? 3'd0 : + _guard16 ? curr_addr_internal_mem_incr_1_1_out : + _guard17 ? 3'd0 : 'x; -assign fsm_write_en = _guard26; +assign fsm_write_en = _guard70; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard30 ? adder_out : - _guard33 ? 1'd0 : - 1'd0; -assign adder_left = - _guard34 ? fsm_out : - 1'd0; -assign adder_right = _guard35; -assign invoke2_go_in = _guard41; -assign curr_transfer_count_write_en = _guard42; + _guard87 ? 3'd5 : + _guard102 ? 3'd2 : + _guard107 ? 3'd4 : + _guard112 ? 3'd1 : + _guard113 ? 3'd0 : + _guard118 ? 3'd3 : + 3'd0; +assign curr_transfer_count_incr_1_3_left = curr_transfer_count_out; +assign curr_transfer_count_incr_1_3_right = 8'd1; +assign wrapper_early_reset_static_par_thread_go_in = _guard126; +assign curr_addr_axi_incr_4_2_group_done_in = curr_addr_axi_done; +assign invoke2_go_in = _guard132; +assign curr_addr_axi_incr_4_2_left = curr_addr_axi_out; +assign curr_addr_axi_incr_4_2_right = 64'd4; +assign curr_transfer_count_write_en = _guard135; assign curr_transfer_count_clk = clk; assign curr_transfer_count_reset = reset; -assign curr_transfer_count_in = curr_transfer_count_incr_out; -assign wvalid_write_en = _guard44; +assign curr_transfer_count_in = curr_transfer_count_incr_1_3_out; +assign curr_addr_axi_incr_4_2_group_go_in = _guard142; +assign curr_addr_internal_mem_incr_1_1_left = curr_addr_internal_mem_out; +assign curr_addr_internal_mem_incr_1_1_right = 3'd1; +assign wvalid_write_en = _guard145; assign wvalid_clk = clk; assign wvalid_reset = reset; assign wvalid_in = - _guard53 ? 1'd1 : - _guard60 ? 1'd0 : + _guard154 ? 1'd1 : + _guard161 ? 1'd0 : 'x; -assign wrapper_early_reset_static_par_go_in = _guard66; -assign n_finished_last_transfer_write_en = _guard75; +assign n_finished_last_transfer_write_en = _guard170; assign n_finished_last_transfer_clk = clk; assign n_finished_last_transfer_reset = reset; assign n_finished_last_transfer_in = - _guard76 ? 1'd1 : - _guard83 ? 1'd0 : + _guard171 ? 1'd1 : + _guard178 ? 1'd0 : 'x; -assign curr_transfer_count_incr_left = curr_transfer_count_out; -assign curr_transfer_count_incr_right = 8'd1; -assign pd1_write_en = _guard94; +assign pd1_write_en = _guard187; assign pd1_clk = clk; assign pd1_reset = reset; assign pd1_in = - _guard97 ? 1'd1 : - _guard102 ? 1'd0 : + _guard190 ? 1'd1 : + _guard195 ? 1'd0 : 1'd0; -assign wrapper_early_reset_static_par_done_in = _guard105; assign tdcc_go_in = go; -assign invoke0_go_in = _guard111; +assign invoke0_go_in = _guard201; assign service_write_transfer_done_in = bt_reg_out; -assign fsm0_write_en = _guard164; -assign fsm0_clk = clk; -assign fsm0_reset = reset; -assign fsm0_in = - _guard181 ? 3'd5 : - _guard196 ? 3'd2 : - _guard201 ? 3'd4 : - _guard206 ? 3'd1 : - _guard207 ? 3'd0 : - _guard212 ? 3'd3 : - 3'd0; -assign curr_addr_axi_incr_left = curr_addr_axi_out; -assign curr_addr_axi_incr_right = 64'd4; -assign curr_addr_internal_mem_incr_group_done_in = curr_addr_internal_mem_done; -assign par0_done_in = _guard219; -assign service_write_transfer_go_in = _guard225; -assign early_reset_static_par_done_in = ud_out; +assign par0_done_in = _guard206; +assign service_write_transfer_go_in = _guard212; assign invoke0_done_in = curr_addr_internal_mem_done; -assign invoke1_go_in = _guard231; -assign bt_reg_write_en = _guard234; +assign invoke1_go_in = _guard218; +assign bt_reg_write_en = _guard221; assign bt_reg_clk = clk; assign bt_reg_reset = reset; assign bt_reg_in = - _guard239 ? 1'd1 : - _guard247 ? 1'd0 : + _guard226 ? 1'd1 : + _guard234 ? 1'd0 : 'x; -assign signal_reg_write_en = _guard257; +assign signal_reg_write_en = _guard242; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard263 ? 1'd1 : - _guard266 ? 1'd0 : + _guard248 ? 1'd1 : + _guard249 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread_go_in = _guard250; +assign curr_addr_internal_mem_incr_1_1_group_done_in = curr_addr_internal_mem_done; assign invoke2_done_in = bt_reg_done; -assign pd_write_en = _guard275; +assign pd_write_en = _guard259; assign pd_clk = clk; assign pd_reset = reset; assign pd_in = - _guard278 ? 1'd1 : - _guard283 ? 1'd0 : + _guard262 ? 1'd1 : + _guard267 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard292; +assign pd0_write_en = _guard276; assign pd0_clk = clk; assign pd0_reset = reset; assign pd0_in = - _guard295 ? 1'd1 : - _guard300 ? 1'd0 : + _guard279 ? 1'd1 : + _guard284 ? 1'd0 : 1'd0; -assign w_handshake_occurred_write_en = _guard306; +assign wrapper_early_reset_static_par_thread_done_in = _guard285; +assign w_handshake_occurred_write_en = _guard291; assign w_handshake_occurred_clk = clk; assign w_handshake_occurred_reset = reset; assign w_handshake_occurred_in = - _guard311 ? 1'd1 : - _guard319 ? 1'd0 : + _guard296 ? 1'd1 : + _guard304 ? 1'd0 : 'x; -assign tdcc_done_in = _guard320; -assign early_reset_static_par_go_in = _guard321; -assign curr_addr_internal_mem_incr_group_go_in = _guard327; +assign tdcc_done_in = _guard305; +assign curr_addr_internal_mem_incr_1_1_group_go_in = _guard311; +assign early_reset_static_par_thread_done_in = ud_out; assign invoke1_done_in = n_finished_last_transfer_done; -assign curr_addr_axi_incr_group_done_in = curr_addr_axi_done; -assign par0_go_in = _guard333; +assign par0_go_in = _guard317; // COMPONENT END: m_write_channel endmodule module m_bresp_channel( @@ -4752,6 +4631,7 @@ assign block_transfer_go_in = _guard66; // COMPONENT END: m_bresp_channel endmodule module wrapper( + input logic ap_clk, input logic A0_ARESETn, input logic A0_ARREADY, input logic A0_RVALID, @@ -4849,7 +4729,6 @@ module wrapper( output logic Sum0_WID, output logic Sum0_BID, input logic go, - input logic clk, input logic reset, output logic done ); @@ -5236,18 +5115,6 @@ logic bresp_channel_Sum0_go; logic bresp_channel_Sum0_clk; logic bresp_channel_Sum0_reset; logic bresp_channel_Sum0_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic adder0_left; -logic adder0_right; -logic adder0_out; logic ud_out; logic ud0_out; logic signal_reg_in; @@ -5256,84 +5123,90 @@ logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic signal_reg0_in; +logic signal_reg0_write_en; +logic signal_reg0_clk; +logic signal_reg0_reset; +logic signal_reg0_out; +logic signal_reg0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [1:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [1:0] fsm2_out; -logic fsm2_done; +logic [1:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [1:0] fsm1_out; +logic fsm1_done; logic pd1_in; logic pd1_write_en; logic pd1_clk; logic pd1_reset; logic pd1_out; logic pd1_done; -logic [1:0] fsm3_in; -logic fsm3_write_en; -logic fsm3_clk; -logic fsm3_reset; -logic [1:0] fsm3_out; -logic fsm3_done; +logic [1:0] fsm2_in; +logic fsm2_write_en; +logic fsm2_clk; +logic fsm2_reset; +logic [1:0] fsm2_out; +logic fsm2_done; logic pd2_in; logic pd2_write_en; logic pd2_clk; logic pd2_reset; logic pd2_out; logic pd2_done; -logic [1:0] fsm4_in; -logic fsm4_write_en; -logic fsm4_clk; -logic fsm4_reset; -logic [1:0] fsm4_out; -logic fsm4_done; +logic [1:0] fsm3_in; +logic fsm3_write_en; +logic fsm3_clk; +logic fsm3_reset; +logic [1:0] fsm3_out; +logic fsm3_done; logic pd3_in; logic pd3_write_en; logic pd3_clk; logic pd3_reset; logic pd3_out; logic pd3_done; -logic [1:0] fsm5_in; -logic fsm5_write_en; -logic fsm5_clk; -logic fsm5_reset; -logic [1:0] fsm5_out; -logic fsm5_done; +logic [1:0] fsm4_in; +logic fsm4_write_en; +logic fsm4_clk; +logic fsm4_reset; +logic [1:0] fsm4_out; +logic fsm4_done; logic pd4_in; logic pd4_write_en; logic pd4_clk; logic pd4_reset; logic pd4_out; logic pd4_done; -logic [2:0] fsm6_in; -logic fsm6_write_en; -logic fsm6_clk; -logic fsm6_reset; -logic [2:0] fsm6_out; -logic fsm6_done; +logic [2:0] fsm5_in; +logic fsm5_write_en; +logic fsm5_clk; +logic fsm5_reset; +logic [2:0] fsm5_out; +logic fsm5_done; logic invoke6_go_in; logic invoke6_go_out; logic invoke6_done_in; @@ -5398,22 +5271,22 @@ logic invoke24_go_in; logic invoke24_go_out; logic invoke24_done_in; logic invoke24_done_out; -logic early_reset_static_par_go_in; -logic early_reset_static_par_go_out; -logic early_reset_static_par_done_in; -logic early_reset_static_par_done_out; -logic early_reset_static_par0_go_in; -logic early_reset_static_par0_go_out; -logic early_reset_static_par0_done_in; -logic early_reset_static_par0_done_out; -logic wrapper_early_reset_static_par_go_in; -logic wrapper_early_reset_static_par_go_out; -logic wrapper_early_reset_static_par_done_in; -logic wrapper_early_reset_static_par_done_out; -logic wrapper_early_reset_static_par0_go_in; -logic wrapper_early_reset_static_par0_go_out; -logic wrapper_early_reset_static_par0_done_in; -logic wrapper_early_reset_static_par0_done_out; +logic early_reset_static_par_thread_go_in; +logic early_reset_static_par_thread_go_out; +logic early_reset_static_par_thread_done_in; +logic early_reset_static_par_thread_done_out; +logic early_reset_static_par_thread0_go_in; +logic early_reset_static_par_thread0_go_out; +logic early_reset_static_par_thread0_done_in; +logic early_reset_static_par_thread0_done_out; +logic wrapper_early_reset_static_par_thread_go_in; +logic wrapper_early_reset_static_par_thread_go_out; +logic wrapper_early_reset_static_par_thread_done_in; +logic wrapper_early_reset_static_par_thread_done_out; +logic wrapper_early_reset_static_par_thread0_go_in; +logic wrapper_early_reset_static_par_thread0_go_out; +logic wrapper_early_reset_static_par_thread0_done_in; +logic wrapper_early_reset_static_par_thread0_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -5918,30 +5791,6 @@ m_bresp_channel bresp_channel_Sum0 ( .go(bresp_channel_Sum0_go), .reset(bresp_channel_Sum0_reset) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); -std_add # ( - .WIDTH(1) -) adder0 ( - .left(adder0_left), - .out(adder0_out), - .right(adder0_right) -); undef # ( .WIDTH(1) ) ud ( @@ -5962,15 +5811,25 @@ std_reg # ( .reset(signal_reg_reset), .write_en(signal_reg_write_en) ); +std_reg # ( + .WIDTH(1) +) signal_reg0 ( + .clk(signal_reg0_clk), + .done(signal_reg0_done), + .in(signal_reg0_in), + .out(signal_reg0_out), + .reset(signal_reg0_reset), + .write_en(signal_reg0_write_en) +); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -5984,13 +5843,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -6004,13 +5863,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_reg # ( .WIDTH(1) @@ -6024,13 +5883,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm3 ( - .clk(fsm3_clk), - .done(fsm3_done), - .in(fsm3_in), - .out(fsm3_out), - .reset(fsm3_reset), - .write_en(fsm3_write_en) +) fsm2 ( + .clk(fsm2_clk), + .done(fsm2_done), + .in(fsm2_in), + .out(fsm2_out), + .reset(fsm2_reset), + .write_en(fsm2_write_en) ); std_reg # ( .WIDTH(1) @@ -6044,13 +5903,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm4 ( - .clk(fsm4_clk), - .done(fsm4_done), - .in(fsm4_in), - .out(fsm4_out), - .reset(fsm4_reset), - .write_en(fsm4_write_en) +) fsm3 ( + .clk(fsm3_clk), + .done(fsm3_done), + .in(fsm3_in), + .out(fsm3_out), + .reset(fsm3_reset), + .write_en(fsm3_write_en) ); std_reg # ( .WIDTH(1) @@ -6064,13 +5923,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm5 ( - .clk(fsm5_clk), - .done(fsm5_done), - .in(fsm5_in), - .out(fsm5_out), - .reset(fsm5_reset), - .write_en(fsm5_write_en) +) fsm4 ( + .clk(fsm4_clk), + .done(fsm4_done), + .in(fsm4_in), + .out(fsm4_out), + .reset(fsm4_reset), + .write_en(fsm4_write_en) ); std_reg # ( .WIDTH(1) @@ -6084,13 +5943,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm6 ( - .clk(fsm6_clk), - .done(fsm6_done), - .in(fsm6_in), - .out(fsm6_out), - .reset(fsm6_reset), - .write_en(fsm6_write_en) +) fsm5 ( + .clk(fsm5_clk), + .done(fsm5_done), + .in(fsm5_in), + .out(fsm5_out), + .reset(fsm5_reset), + .write_en(fsm5_write_en) ); std_wire # ( .WIDTH(1) @@ -6286,51 +6145,51 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_static_par_go ( - .in(early_reset_static_par_go_in), - .out(early_reset_static_par_go_out) +) early_reset_static_par_thread_go ( + .in(early_reset_static_par_thread_go_in), + .out(early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par_done ( - .in(early_reset_static_par_done_in), - .out(early_reset_static_par_done_out) +) early_reset_static_par_thread_done ( + .in(early_reset_static_par_thread_done_in), + .out(early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_go ( - .in(early_reset_static_par0_go_in), - .out(early_reset_static_par0_go_out) +) early_reset_static_par_thread0_go ( + .in(early_reset_static_par_thread0_go_in), + .out(early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_static_par0_done ( - .in(early_reset_static_par0_done_in), - .out(early_reset_static_par0_done_out) +) early_reset_static_par_thread0_done ( + .in(early_reset_static_par_thread0_done_in), + .out(early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_go ( - .in(wrapper_early_reset_static_par_go_in), - .out(wrapper_early_reset_static_par_go_out) +) wrapper_early_reset_static_par_thread_go ( + .in(wrapper_early_reset_static_par_thread_go_in), + .out(wrapper_early_reset_static_par_thread_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par_done ( - .in(wrapper_early_reset_static_par_done_in), - .out(wrapper_early_reset_static_par_done_out) +) wrapper_early_reset_static_par_thread_done ( + .in(wrapper_early_reset_static_par_thread_done_in), + .out(wrapper_early_reset_static_par_thread_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_go ( - .in(wrapper_early_reset_static_par0_go_in), - .out(wrapper_early_reset_static_par0_go_out) +) wrapper_early_reset_static_par_thread0_go ( + .in(wrapper_early_reset_static_par_thread0_go_in), + .out(wrapper_early_reset_static_par_thread0_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_static_par0_done ( - .in(wrapper_early_reset_static_par0_done_in), - .out(wrapper_early_reset_static_par0_done_out) +) wrapper_early_reset_static_par_thread0_done ( + .in(wrapper_early_reset_static_par_thread0_done_in), + .out(wrapper_early_reset_static_par_thread0_done_out) ); std_wire # ( .WIDTH(1) @@ -6441,19 +6300,19 @@ std_wire # ( .out(tdcc5_done_out) ); wire _guard0 = 1; -wire _guard1 = early_reset_static_par_go_out; +wire _guard1 = early_reset_static_par_thread_go_out; wire _guard2 = invoke7_go_out; wire _guard3 = invoke17_go_out; wire _guard4 = invoke7_go_out; wire _guard5 = invoke17_go_out; -wire _guard6 = early_reset_static_par_go_out; +wire _guard6 = early_reset_static_par_thread_go_out; wire _guard7 = invoke9_done_out; wire _guard8 = ~_guard7; -wire _guard9 = fsm1_out == 2'd1; +wire _guard9 = fsm0_out == 2'd1; wire _guard10 = _guard8 & _guard9; wire _guard11 = tdcc0_go_out; wire _guard12 = _guard10 & _guard11; -wire _guard13 = fsm3_out == 2'd3; +wire _guard13 = fsm2_out == 2'd3; wire _guard14 = invoke11_go_out; wire _guard15 = invoke11_go_out; wire _guard16 = invoke11_go_out; @@ -6514,741 +6373,712 @@ wire _guard70 = invoke16_go_out; wire _guard71 = invoke19_go_out; wire _guard72 = invoke19_go_out; wire _guard73 = invoke6_go_out; -wire _guard74 = early_reset_static_par_go_out; -wire _guard75 = early_reset_static_par0_go_out; -wire _guard76 = _guard74 | _guard75; -wire _guard77 = fsm_out == 1'd0; -wire _guard78 = ~_guard77; -wire _guard79 = early_reset_static_par_go_out; -wire _guard80 = _guard78 & _guard79; -wire _guard81 = fsm_out == 1'd0; -wire _guard82 = early_reset_static_par_go_out; +wire _guard74 = fsm_out == 2'd2; +wire _guard75 = fsm_out == 2'd0; +wire _guard76 = invoke6_done_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = tdcc_go_out; +wire _guard79 = _guard77 & _guard78; +wire _guard80 = _guard74 | _guard79; +wire _guard81 = fsm_out == 2'd1; +wire _guard82 = invoke7_done_out; wire _guard83 = _guard81 & _guard82; -wire _guard84 = fsm_out == 1'd0; -wire _guard85 = early_reset_static_par0_go_out; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = _guard83 | _guard86; -wire _guard88 = fsm_out == 1'd0; -wire _guard89 = ~_guard88; -wire _guard90 = early_reset_static_par0_go_out; +wire _guard84 = tdcc_go_out; +wire _guard85 = _guard83 & _guard84; +wire _guard86 = _guard80 | _guard85; +wire _guard87 = fsm_out == 2'd0; +wire _guard88 = invoke6_done_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = tdcc_go_out; wire _guard91 = _guard89 & _guard90; -wire _guard92 = early_reset_static_par_go_out; -wire _guard93 = early_reset_static_par_go_out; -wire _guard94 = fsm6_out == 3'd5; -wire _guard95 = fsm6_out == 3'd0; -wire _guard96 = wrapper_early_reset_static_par_done_out; +wire _guard92 = fsm_out == 2'd2; +wire _guard93 = fsm_out == 2'd1; +wire _guard94 = invoke7_done_out; +wire _guard95 = _guard93 & _guard94; +wire _guard96 = tdcc_go_out; wire _guard97 = _guard95 & _guard96; -wire _guard98 = tdcc5_go_out; -wire _guard99 = _guard97 & _guard98; -wire _guard100 = _guard94 | _guard99; -wire _guard101 = fsm6_out == 3'd1; -wire _guard102 = par0_done_out; +wire _guard98 = invoke18_done_out; +wire _guard99 = ~_guard98; +wire _guard100 = fsm2_out == 2'd2; +wire _guard101 = _guard99 & _guard100; +wire _guard102 = tdcc2_go_out; wire _guard103 = _guard101 & _guard102; -wire _guard104 = tdcc5_go_out; -wire _guard105 = _guard103 & _guard104; -wire _guard106 = _guard100 | _guard105; -wire _guard107 = fsm6_out == 3'd2; -wire _guard108 = invoke12_done_out; +wire _guard104 = pd2_out; +wire _guard105 = tdcc2_done_out; +wire _guard106 = _guard104 | _guard105; +wire _guard107 = ~_guard106; +wire _guard108 = par1_go_out; wire _guard109 = _guard107 & _guard108; -wire _guard110 = tdcc5_go_out; -wire _guard111 = _guard109 & _guard110; -wire _guard112 = _guard106 | _guard111; -wire _guard113 = fsm6_out == 3'd3; -wire _guard114 = wrapper_early_reset_static_par0_done_out; -wire _guard115 = _guard113 & _guard114; -wire _guard116 = tdcc5_go_out; -wire _guard117 = _guard115 & _guard116; -wire _guard118 = _guard112 | _guard117; -wire _guard119 = fsm6_out == 3'd4; -wire _guard120 = par1_done_out; -wire _guard121 = _guard119 & _guard120; -wire _guard122 = tdcc5_go_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard118 | _guard123; -wire _guard125 = fsm6_out == 3'd4; -wire _guard126 = par1_done_out; -wire _guard127 = _guard125 & _guard126; -wire _guard128 = tdcc5_go_out; -wire _guard129 = _guard127 & _guard128; -wire _guard130 = fsm6_out == 3'd1; -wire _guard131 = par0_done_out; -wire _guard132 = _guard130 & _guard131; -wire _guard133 = tdcc5_go_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = fsm6_out == 3'd3; -wire _guard136 = wrapper_early_reset_static_par0_done_out; -wire _guard137 = _guard135 & _guard136; -wire _guard138 = tdcc5_go_out; -wire _guard139 = _guard137 & _guard138; -wire _guard140 = fsm6_out == 3'd0; -wire _guard141 = wrapper_early_reset_static_par_done_out; -wire _guard142 = _guard140 & _guard141; -wire _guard143 = tdcc5_go_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = fsm6_out == 3'd5; -wire _guard146 = fsm6_out == 3'd2; -wire _guard147 = invoke12_done_out; -wire _guard148 = _guard146 & _guard147; -wire _guard149 = tdcc5_go_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = wrapper_early_reset_static_par0_go_out; -wire _guard152 = invoke18_done_out; -wire _guard153 = ~_guard152; -wire _guard154 = fsm3_out == 2'd2; -wire _guard155 = _guard153 & _guard154; -wire _guard156 = tdcc2_go_out; +wire _guard110 = invoke9_go_out; +wire _guard111 = early_reset_static_par_thread_go_out; +wire _guard112 = invoke20_go_out; +wire _guard113 = invoke9_go_out; +wire _guard114 = invoke20_go_out; +wire _guard115 = early_reset_static_par_thread_go_out; +wire _guard116 = invoke9_go_out; +wire _guard117 = invoke9_go_out; +wire _guard118 = invoke9_go_out; +wire _guard119 = invoke9_go_out; +wire _guard120 = invoke9_go_out; +wire _guard121 = invoke9_go_out; +wire _guard122 = invoke9_go_out; +wire _guard123 = invoke9_go_out; +wire _guard124 = invoke9_go_out; +wire _guard125 = invoke9_go_out; +wire _guard126 = invoke9_go_out; +wire _guard127 = invoke9_go_out; +wire _guard128 = invoke12_go_out; +wire _guard129 = invoke20_go_out; +wire _guard130 = invoke9_go_out; +wire _guard131 = invoke12_go_out; +wire _guard132 = invoke20_go_out; +wire _guard133 = invoke9_go_out; +wire _guard134 = invoke12_go_out; +wire _guard135 = invoke20_go_out; +wire _guard136 = invoke9_go_out; +wire _guard137 = invoke24_go_out; +wire _guard138 = invoke24_go_out; +wire _guard139 = signal_reg0_out; +wire _guard140 = _guard0 & _guard0; +wire _guard141 = signal_reg0_out; +wire _guard142 = ~_guard141; +wire _guard143 = _guard140 & _guard142; +wire _guard144 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = _guard139 | _guard145; +wire _guard147 = _guard0 & _guard0; +wire _guard148 = signal_reg0_out; +wire _guard149 = ~_guard148; +wire _guard150 = _guard147 & _guard149; +wire _guard151 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard152 = _guard150 & _guard151; +wire _guard153 = signal_reg0_out; +wire _guard154 = fsm3_out == 2'd3; +wire _guard155 = fsm3_out == 2'd0; +wire _guard156 = invoke19_done_out; wire _guard157 = _guard155 & _guard156; -wire _guard158 = pd2_out; -wire _guard159 = tdcc2_done_out; -wire _guard160 = _guard158 | _guard159; -wire _guard161 = ~_guard160; -wire _guard162 = par1_go_out; +wire _guard158 = tdcc3_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = _guard154 | _guard159; +wire _guard161 = fsm3_out == 2'd1; +wire _guard162 = invoke20_done_out; wire _guard163 = _guard161 & _guard162; -wire _guard164 = invoke9_go_out; -wire _guard165 = early_reset_static_par_go_out; -wire _guard166 = invoke20_go_out; -wire _guard167 = invoke9_go_out; -wire _guard168 = invoke20_go_out; -wire _guard169 = early_reset_static_par_go_out; -wire _guard170 = invoke9_go_out; -wire _guard171 = invoke9_go_out; -wire _guard172 = invoke9_go_out; -wire _guard173 = invoke9_go_out; -wire _guard174 = invoke9_go_out; -wire _guard175 = invoke9_go_out; -wire _guard176 = invoke9_go_out; -wire _guard177 = invoke9_go_out; -wire _guard178 = invoke9_go_out; -wire _guard179 = invoke9_go_out; -wire _guard180 = invoke9_go_out; -wire _guard181 = invoke9_go_out; -wire _guard182 = invoke12_go_out; -wire _guard183 = invoke20_go_out; -wire _guard184 = invoke9_go_out; -wire _guard185 = invoke12_go_out; -wire _guard186 = invoke20_go_out; -wire _guard187 = invoke9_go_out; -wire _guard188 = invoke12_go_out; -wire _guard189 = invoke20_go_out; -wire _guard190 = invoke9_go_out; -wire _guard191 = invoke24_go_out; -wire _guard192 = invoke24_go_out; -wire _guard193 = fsm3_out == 2'd3; -wire _guard194 = fsm3_out == 2'd0; -wire _guard195 = invoke16_done_out; -wire _guard196 = _guard194 & _guard195; -wire _guard197 = tdcc2_go_out; +wire _guard164 = tdcc3_go_out; +wire _guard165 = _guard163 & _guard164; +wire _guard166 = _guard160 | _guard165; +wire _guard167 = fsm3_out == 2'd2; +wire _guard168 = invoke21_done_out; +wire _guard169 = _guard167 & _guard168; +wire _guard170 = tdcc3_go_out; +wire _guard171 = _guard169 & _guard170; +wire _guard172 = _guard166 | _guard171; +wire _guard173 = fsm3_out == 2'd0; +wire _guard174 = invoke19_done_out; +wire _guard175 = _guard173 & _guard174; +wire _guard176 = tdcc3_go_out; +wire _guard177 = _guard175 & _guard176; +wire _guard178 = fsm3_out == 2'd3; +wire _guard179 = fsm3_out == 2'd2; +wire _guard180 = invoke21_done_out; +wire _guard181 = _guard179 & _guard180; +wire _guard182 = tdcc3_go_out; +wire _guard183 = _guard181 & _guard182; +wire _guard184 = fsm3_out == 2'd1; +wire _guard185 = invoke20_done_out; +wire _guard186 = _guard184 & _guard185; +wire _guard187 = tdcc3_go_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = fsm5_out == 3'd5; +wire _guard190 = fsm5_out == 3'd0; +wire _guard191 = wrapper_early_reset_static_par_thread_done_out; +wire _guard192 = _guard190 & _guard191; +wire _guard193 = tdcc5_go_out; +wire _guard194 = _guard192 & _guard193; +wire _guard195 = _guard189 | _guard194; +wire _guard196 = fsm5_out == 3'd1; +wire _guard197 = par0_done_out; wire _guard198 = _guard196 & _guard197; -wire _guard199 = _guard193 | _guard198; -wire _guard200 = fsm3_out == 2'd1; -wire _guard201 = invoke17_done_out; -wire _guard202 = _guard200 & _guard201; -wire _guard203 = tdcc2_go_out; +wire _guard199 = tdcc5_go_out; +wire _guard200 = _guard198 & _guard199; +wire _guard201 = _guard195 | _guard200; +wire _guard202 = fsm5_out == 3'd2; +wire _guard203 = invoke12_done_out; wire _guard204 = _guard202 & _guard203; -wire _guard205 = _guard199 | _guard204; -wire _guard206 = fsm3_out == 2'd2; -wire _guard207 = invoke18_done_out; -wire _guard208 = _guard206 & _guard207; -wire _guard209 = tdcc2_go_out; +wire _guard205 = tdcc5_go_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = _guard201 | _guard206; +wire _guard208 = fsm5_out == 3'd3; +wire _guard209 = wrapper_early_reset_static_par_thread0_done_out; wire _guard210 = _guard208 & _guard209; -wire _guard211 = _guard205 | _guard210; -wire _guard212 = fsm3_out == 2'd0; -wire _guard213 = invoke16_done_out; -wire _guard214 = _guard212 & _guard213; -wire _guard215 = tdcc2_go_out; +wire _guard211 = tdcc5_go_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = _guard207 | _guard212; +wire _guard214 = fsm5_out == 3'd4; +wire _guard215 = par1_done_out; wire _guard216 = _guard214 & _guard215; -wire _guard217 = fsm3_out == 2'd3; -wire _guard218 = fsm3_out == 2'd2; -wire _guard219 = invoke18_done_out; -wire _guard220 = _guard218 & _guard219; -wire _guard221 = tdcc2_go_out; +wire _guard217 = tdcc5_go_out; +wire _guard218 = _guard216 & _guard217; +wire _guard219 = _guard213 | _guard218; +wire _guard220 = fsm5_out == 3'd4; +wire _guard221 = par1_done_out; wire _guard222 = _guard220 & _guard221; -wire _guard223 = fsm3_out == 2'd1; -wire _guard224 = invoke17_done_out; -wire _guard225 = _guard223 & _guard224; -wire _guard226 = tdcc2_go_out; +wire _guard223 = tdcc5_go_out; +wire _guard224 = _guard222 & _guard223; +wire _guard225 = fsm5_out == 3'd1; +wire _guard226 = par0_done_out; wire _guard227 = _guard225 & _guard226; -wire _guard228 = fsm5_out == 2'd3; -wire _guard229 = fsm5_out == 2'd0; -wire _guard230 = invoke22_done_out; -wire _guard231 = _guard229 & _guard230; -wire _guard232 = tdcc4_go_out; -wire _guard233 = _guard231 & _guard232; -wire _guard234 = _guard228 | _guard233; -wire _guard235 = fsm5_out == 2'd1; -wire _guard236 = invoke23_done_out; +wire _guard228 = tdcc5_go_out; +wire _guard229 = _guard227 & _guard228; +wire _guard230 = fsm5_out == 3'd3; +wire _guard231 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = tdcc5_go_out; +wire _guard234 = _guard232 & _guard233; +wire _guard235 = fsm5_out == 3'd0; +wire _guard236 = wrapper_early_reset_static_par_thread_done_out; wire _guard237 = _guard235 & _guard236; -wire _guard238 = tdcc4_go_out; +wire _guard238 = tdcc5_go_out; wire _guard239 = _guard237 & _guard238; -wire _guard240 = _guard234 | _guard239; -wire _guard241 = fsm5_out == 2'd2; -wire _guard242 = invoke24_done_out; +wire _guard240 = fsm5_out == 3'd5; +wire _guard241 = fsm5_out == 3'd2; +wire _guard242 = invoke12_done_out; wire _guard243 = _guard241 & _guard242; -wire _guard244 = tdcc4_go_out; +wire _guard244 = tdcc5_go_out; wire _guard245 = _guard243 & _guard244; -wire _guard246 = _guard240 | _guard245; -wire _guard247 = fsm5_out == 2'd0; -wire _guard248 = invoke22_done_out; +wire _guard246 = wrapper_early_reset_static_par_thread_done_out; +wire _guard247 = ~_guard246; +wire _guard248 = fsm5_out == 3'd0; wire _guard249 = _guard247 & _guard248; -wire _guard250 = tdcc4_go_out; +wire _guard250 = tdcc5_go_out; wire _guard251 = _guard249 & _guard250; -wire _guard252 = fsm5_out == 2'd3; -wire _guard253 = fsm5_out == 2'd2; -wire _guard254 = invoke24_done_out; -wire _guard255 = _guard253 & _guard254; -wire _guard256 = tdcc4_go_out; -wire _guard257 = _guard255 & _guard256; -wire _guard258 = fsm5_out == 2'd1; -wire _guard259 = invoke23_done_out; -wire _guard260 = _guard258 & _guard259; -wire _guard261 = tdcc4_go_out; -wire _guard262 = _guard260 & _guard261; -wire _guard263 = fsm1_out == 2'd2; -wire _guard264 = invoke9_go_out; -wire _guard265 = early_reset_static_par_go_out; -wire _guard266 = early_reset_static_par0_go_out; -wire _guard267 = _guard265 | _guard266; -wire _guard268 = invoke20_go_out; -wire _guard269 = invoke9_go_out; -wire _guard270 = invoke20_go_out; -wire _guard271 = early_reset_static_par_go_out; -wire _guard272 = early_reset_static_par0_go_out; -wire _guard273 = _guard271 | _guard272; -wire _guard274 = invoke22_go_out; -wire _guard275 = invoke22_go_out; -wire _guard276 = invoke12_go_out; -wire _guard277 = invoke12_go_out; -wire _guard278 = invoke12_go_out; -wire _guard279 = invoke12_go_out; -wire _guard280 = invoke12_go_out; -wire _guard281 = invoke12_go_out; -wire _guard282 = fsm1_out == 2'd2; -wire _guard283 = fsm1_out == 2'd0; -wire _guard284 = invoke8_done_out; -wire _guard285 = _guard283 & _guard284; -wire _guard286 = tdcc0_go_out; -wire _guard287 = _guard285 & _guard286; -wire _guard288 = _guard282 | _guard287; -wire _guard289 = fsm1_out == 2'd1; -wire _guard290 = invoke9_done_out; -wire _guard291 = _guard289 & _guard290; -wire _guard292 = tdcc0_go_out; -wire _guard293 = _guard291 & _guard292; -wire _guard294 = _guard288 | _guard293; -wire _guard295 = fsm1_out == 2'd0; -wire _guard296 = invoke8_done_out; -wire _guard297 = _guard295 & _guard296; -wire _guard298 = tdcc0_go_out; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = fsm1_out == 2'd2; -wire _guard301 = fsm1_out == 2'd1; -wire _guard302 = invoke9_done_out; -wire _guard303 = _guard301 & _guard302; -wire _guard304 = tdcc0_go_out; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = fsm4_out == 2'd3; -wire _guard307 = fsm4_out == 2'd0; -wire _guard308 = invoke19_done_out; -wire _guard309 = _guard307 & _guard308; -wire _guard310 = tdcc3_go_out; -wire _guard311 = _guard309 & _guard310; -wire _guard312 = _guard306 | _guard311; -wire _guard313 = fsm4_out == 2'd1; -wire _guard314 = invoke20_done_out; -wire _guard315 = _guard313 & _guard314; -wire _guard316 = tdcc3_go_out; -wire _guard317 = _guard315 & _guard316; -wire _guard318 = _guard312 | _guard317; -wire _guard319 = fsm4_out == 2'd2; -wire _guard320 = invoke21_done_out; -wire _guard321 = _guard319 & _guard320; -wire _guard322 = tdcc3_go_out; -wire _guard323 = _guard321 & _guard322; -wire _guard324 = _guard318 | _guard323; -wire _guard325 = fsm4_out == 2'd0; -wire _guard326 = invoke19_done_out; +wire _guard252 = fsm0_out == 2'd2; +wire _guard253 = invoke9_go_out; +wire _guard254 = early_reset_static_par_thread_go_out; +wire _guard255 = early_reset_static_par_thread0_go_out; +wire _guard256 = _guard254 | _guard255; +wire _guard257 = invoke20_go_out; +wire _guard258 = invoke9_go_out; +wire _guard259 = invoke20_go_out; +wire _guard260 = early_reset_static_par_thread_go_out; +wire _guard261 = early_reset_static_par_thread0_go_out; +wire _guard262 = _guard260 | _guard261; +wire _guard263 = invoke22_go_out; +wire _guard264 = invoke22_go_out; +wire _guard265 = invoke12_go_out; +wire _guard266 = invoke12_go_out; +wire _guard267 = invoke12_go_out; +wire _guard268 = invoke12_go_out; +wire _guard269 = invoke12_go_out; +wire _guard270 = invoke12_go_out; +wire _guard271 = fsm1_out == 2'd2; +wire _guard272 = fsm1_out == 2'd0; +wire _guard273 = invoke10_done_out; +wire _guard274 = _guard272 & _guard273; +wire _guard275 = tdcc1_go_out; +wire _guard276 = _guard274 & _guard275; +wire _guard277 = _guard271 | _guard276; +wire _guard278 = fsm1_out == 2'd1; +wire _guard279 = invoke11_done_out; +wire _guard280 = _guard278 & _guard279; +wire _guard281 = tdcc1_go_out; +wire _guard282 = _guard280 & _guard281; +wire _guard283 = _guard277 | _guard282; +wire _guard284 = fsm1_out == 2'd0; +wire _guard285 = invoke10_done_out; +wire _guard286 = _guard284 & _guard285; +wire _guard287 = tdcc1_go_out; +wire _guard288 = _guard286 & _guard287; +wire _guard289 = fsm1_out == 2'd2; +wire _guard290 = fsm1_out == 2'd1; +wire _guard291 = invoke11_done_out; +wire _guard292 = _guard290 & _guard291; +wire _guard293 = tdcc1_go_out; +wire _guard294 = _guard292 & _guard293; +wire _guard295 = fsm4_out == 2'd3; +wire _guard296 = fsm4_out == 2'd0; +wire _guard297 = invoke22_done_out; +wire _guard298 = _guard296 & _guard297; +wire _guard299 = tdcc4_go_out; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = _guard295 | _guard300; +wire _guard302 = fsm4_out == 2'd1; +wire _guard303 = invoke23_done_out; +wire _guard304 = _guard302 & _guard303; +wire _guard305 = tdcc4_go_out; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = _guard301 | _guard306; +wire _guard308 = fsm4_out == 2'd2; +wire _guard309 = invoke24_done_out; +wire _guard310 = _guard308 & _guard309; +wire _guard311 = tdcc4_go_out; +wire _guard312 = _guard310 & _guard311; +wire _guard313 = _guard307 | _guard312; +wire _guard314 = fsm4_out == 2'd0; +wire _guard315 = invoke22_done_out; +wire _guard316 = _guard314 & _guard315; +wire _guard317 = tdcc4_go_out; +wire _guard318 = _guard316 & _guard317; +wire _guard319 = fsm4_out == 2'd3; +wire _guard320 = fsm4_out == 2'd2; +wire _guard321 = invoke24_done_out; +wire _guard322 = _guard320 & _guard321; +wire _guard323 = tdcc4_go_out; +wire _guard324 = _guard322 & _guard323; +wire _guard325 = fsm4_out == 2'd1; +wire _guard326 = invoke23_done_out; wire _guard327 = _guard325 & _guard326; -wire _guard328 = tdcc3_go_out; +wire _guard328 = tdcc4_go_out; wire _guard329 = _guard327 & _guard328; -wire _guard330 = fsm4_out == 2'd3; -wire _guard331 = fsm4_out == 2'd2; -wire _guard332 = invoke21_done_out; +wire _guard330 = invoke11_done_out; +wire _guard331 = ~_guard330; +wire _guard332 = fsm1_out == 2'd1; wire _guard333 = _guard331 & _guard332; -wire _guard334 = tdcc3_go_out; +wire _guard334 = tdcc1_go_out; wire _guard335 = _guard333 & _guard334; -wire _guard336 = fsm4_out == 2'd1; -wire _guard337 = invoke20_done_out; -wire _guard338 = _guard336 & _guard337; -wire _guard339 = tdcc3_go_out; -wire _guard340 = _guard338 & _guard339; -wire _guard341 = wrapper_early_reset_static_par_done_out; -wire _guard342 = ~_guard341; -wire _guard343 = fsm6_out == 3'd0; -wire _guard344 = _guard342 & _guard343; -wire _guard345 = tdcc5_go_out; -wire _guard346 = _guard344 & _guard345; -wire _guard347 = invoke11_done_out; -wire _guard348 = ~_guard347; -wire _guard349 = fsm2_out == 2'd1; -wire _guard350 = _guard348 & _guard349; -wire _guard351 = tdcc1_go_out; -wire _guard352 = _guard350 & _guard351; -wire _guard353 = invoke23_done_out; -wire _guard354 = ~_guard353; -wire _guard355 = fsm5_out == 2'd1; -wire _guard356 = _guard354 & _guard355; -wire _guard357 = tdcc4_go_out; -wire _guard358 = _guard356 & _guard357; -wire _guard359 = par1_done_out; -wire _guard360 = ~_guard359; -wire _guard361 = fsm6_out == 3'd4; -wire _guard362 = _guard360 & _guard361; -wire _guard363 = tdcc5_go_out; -wire _guard364 = _guard362 & _guard363; -wire _guard365 = early_reset_static_par_go_out; -wire _guard366 = early_reset_static_par0_go_out; -wire _guard367 = _guard365 | _guard366; +wire _guard336 = invoke23_done_out; +wire _guard337 = ~_guard336; +wire _guard338 = fsm4_out == 2'd1; +wire _guard339 = _guard337 & _guard338; +wire _guard340 = tdcc4_go_out; +wire _guard341 = _guard339 & _guard340; +wire _guard342 = par1_done_out; +wire _guard343 = ~_guard342; +wire _guard344 = fsm5_out == 3'd4; +wire _guard345 = _guard343 & _guard344; +wire _guard346 = tdcc5_go_out; +wire _guard347 = _guard345 & _guard346; +wire _guard348 = early_reset_static_par_thread_go_out; +wire _guard349 = early_reset_static_par_thread0_go_out; +wire _guard350 = _guard348 | _guard349; +wire _guard351 = invoke7_go_out; +wire _guard352 = invoke17_go_out; +wire _guard353 = invoke7_go_out; +wire _guard354 = early_reset_static_par_thread_go_out; +wire _guard355 = early_reset_static_par_thread0_go_out; +wire _guard356 = _guard354 | _guard355; +wire _guard357 = invoke17_go_out; +wire _guard358 = invoke7_go_out; +wire _guard359 = invoke7_go_out; +wire _guard360 = invoke7_go_out; +wire _guard361 = invoke7_go_out; +wire _guard362 = invoke7_go_out; +wire _guard363 = invoke7_go_out; +wire _guard364 = invoke7_go_out; +wire _guard365 = invoke7_go_out; +wire _guard366 = invoke7_go_out; +wire _guard367 = invoke7_go_out; wire _guard368 = invoke7_go_out; -wire _guard369 = invoke17_go_out; +wire _guard369 = invoke12_go_out; wire _guard370 = invoke7_go_out; -wire _guard371 = early_reset_static_par_go_out; -wire _guard372 = early_reset_static_par0_go_out; -wire _guard373 = _guard371 | _guard372; +wire _guard371 = invoke17_go_out; +wire _guard372 = invoke12_go_out; +wire _guard373 = invoke7_go_out; wire _guard374 = invoke17_go_out; -wire _guard375 = invoke7_go_out; +wire _guard375 = invoke12_go_out; wire _guard376 = invoke7_go_out; -wire _guard377 = invoke7_go_out; +wire _guard377 = invoke17_go_out; wire _guard378 = invoke7_go_out; -wire _guard379 = invoke7_go_out; -wire _guard380 = invoke7_go_out; -wire _guard381 = invoke7_go_out; -wire _guard382 = invoke7_go_out; -wire _guard383 = invoke7_go_out; -wire _guard384 = invoke7_go_out; -wire _guard385 = invoke7_go_out; -wire _guard386 = invoke12_go_out; -wire _guard387 = invoke7_go_out; -wire _guard388 = invoke17_go_out; -wire _guard389 = invoke12_go_out; -wire _guard390 = invoke7_go_out; -wire _guard391 = invoke17_go_out; -wire _guard392 = invoke12_go_out; -wire _guard393 = invoke7_go_out; -wire _guard394 = invoke17_go_out; -wire _guard395 = invoke7_go_out; -wire _guard396 = invoke20_go_out; -wire _guard397 = invoke20_go_out; -wire _guard398 = invoke20_go_out; -wire _guard399 = invoke20_go_out; -wire _guard400 = invoke20_go_out; -wire _guard401 = invoke20_go_out; -wire _guard402 = invoke20_go_out; -wire _guard403 = invoke20_go_out; -wire _guard404 = invoke20_go_out; -wire _guard405 = invoke11_go_out; -wire _guard406 = early_reset_static_par_go_out; -wire _guard407 = early_reset_static_par0_go_out; -wire _guard408 = _guard406 | _guard407; -wire _guard409 = invoke23_go_out; -wire _guard410 = invoke11_go_out; -wire _guard411 = early_reset_static_par_go_out; -wire _guard412 = early_reset_static_par0_go_out; -wire _guard413 = _guard411 | _guard412; -wire _guard414 = invoke23_go_out; -wire _guard415 = invoke10_go_out; -wire _guard416 = invoke10_go_out; -wire _guard417 = invoke10_go_out; -wire _guard418 = invoke10_go_out; +wire _guard379 = invoke20_go_out; +wire _guard380 = invoke20_go_out; +wire _guard381 = invoke20_go_out; +wire _guard382 = invoke20_go_out; +wire _guard383 = invoke20_go_out; +wire _guard384 = invoke20_go_out; +wire _guard385 = invoke20_go_out; +wire _guard386 = invoke20_go_out; +wire _guard387 = invoke20_go_out; +wire _guard388 = invoke11_go_out; +wire _guard389 = early_reset_static_par_thread_go_out; +wire _guard390 = early_reset_static_par_thread0_go_out; +wire _guard391 = _guard389 | _guard390; +wire _guard392 = invoke23_go_out; +wire _guard393 = invoke11_go_out; +wire _guard394 = early_reset_static_par_thread_go_out; +wire _guard395 = early_reset_static_par_thread0_go_out; +wire _guard396 = _guard394 | _guard395; +wire _guard397 = invoke23_go_out; +wire _guard398 = invoke10_go_out; +wire _guard399 = invoke10_go_out; +wire _guard400 = invoke10_go_out; +wire _guard401 = invoke10_go_out; +wire _guard402 = pd_out; +wire _guard403 = pd0_out; +wire _guard404 = _guard402 & _guard403; +wire _guard405 = pd1_out; +wire _guard406 = _guard404 & _guard405; +wire _guard407 = tdcc1_done_out; +wire _guard408 = par0_go_out; +wire _guard409 = _guard407 & _guard408; +wire _guard410 = _guard406 | _guard409; +wire _guard411 = tdcc1_done_out; +wire _guard412 = par0_go_out; +wire _guard413 = _guard411 & _guard412; +wire _guard414 = pd_out; +wire _guard415 = pd0_out; +wire _guard416 = _guard414 & _guard415; +wire _guard417 = pd1_out; +wire _guard418 = _guard416 & _guard417; wire _guard419 = pd_out; -wire _guard420 = pd0_out; -wire _guard421 = _guard419 & _guard420; -wire _guard422 = pd1_out; -wire _guard423 = _guard421 & _guard422; -wire _guard424 = tdcc1_done_out; -wire _guard425 = par0_go_out; -wire _guard426 = _guard424 & _guard425; -wire _guard427 = _guard423 | _guard426; -wire _guard428 = tdcc1_done_out; -wire _guard429 = par0_go_out; +wire _guard420 = tdcc_done_out; +wire _guard421 = _guard419 | _guard420; +wire _guard422 = ~_guard421; +wire _guard423 = par0_go_out; +wire _guard424 = _guard422 & _guard423; +wire _guard425 = invoke12_done_out; +wire _guard426 = ~_guard425; +wire _guard427 = fsm5_out == 3'd2; +wire _guard428 = _guard426 & _guard427; +wire _guard429 = tdcc5_go_out; wire _guard430 = _guard428 & _guard429; -wire _guard431 = pd_out; -wire _guard432 = pd0_out; -wire _guard433 = _guard431 & _guard432; -wire _guard434 = pd1_out; -wire _guard435 = _guard433 & _guard434; -wire _guard436 = fsm_out == 1'd0; -wire _guard437 = signal_reg_out; -wire _guard438 = _guard436 & _guard437; -wire _guard439 = pd_out; -wire _guard440 = tdcc_done_out; -wire _guard441 = _guard439 | _guard440; -wire _guard442 = ~_guard441; -wire _guard443 = par0_go_out; -wire _guard444 = _guard442 & _guard443; -wire _guard445 = invoke12_done_out; -wire _guard446 = ~_guard445; -wire _guard447 = fsm6_out == 3'd2; -wire _guard448 = _guard446 & _guard447; -wire _guard449 = tdcc5_go_out; -wire _guard450 = _guard448 & _guard449; -wire _guard451 = pd3_out; -wire _guard452 = tdcc3_done_out; -wire _guard453 = _guard451 | _guard452; -wire _guard454 = ~_guard453; -wire _guard455 = par1_go_out; -wire _guard456 = _guard454 & _guard455; -wire _guard457 = fsm4_out == 2'd3; -wire _guard458 = invoke19_go_out; -wire _guard459 = invoke19_go_out; -wire _guard460 = invoke19_go_out; -wire _guard461 = invoke19_go_out; -wire _guard462 = fsm0_out == 2'd2; -wire _guard463 = fsm0_out == 2'd0; -wire _guard464 = invoke6_done_out; +wire _guard431 = pd3_out; +wire _guard432 = tdcc3_done_out; +wire _guard433 = _guard431 | _guard432; +wire _guard434 = ~_guard433; +wire _guard435 = par1_go_out; +wire _guard436 = _guard434 & _guard435; +wire _guard437 = fsm3_out == 2'd3; +wire _guard438 = invoke19_go_out; +wire _guard439 = invoke19_go_out; +wire _guard440 = invoke19_go_out; +wire _guard441 = invoke19_go_out; +wire _guard442 = fsm0_out == 2'd2; +wire _guard443 = fsm0_out == 2'd0; +wire _guard444 = invoke8_done_out; +wire _guard445 = _guard443 & _guard444; +wire _guard446 = tdcc0_go_out; +wire _guard447 = _guard445 & _guard446; +wire _guard448 = _guard442 | _guard447; +wire _guard449 = fsm0_out == 2'd1; +wire _guard450 = invoke9_done_out; +wire _guard451 = _guard449 & _guard450; +wire _guard452 = tdcc0_go_out; +wire _guard453 = _guard451 & _guard452; +wire _guard454 = _guard448 | _guard453; +wire _guard455 = fsm0_out == 2'd0; +wire _guard456 = invoke8_done_out; +wire _guard457 = _guard455 & _guard456; +wire _guard458 = tdcc0_go_out; +wire _guard459 = _guard457 & _guard458; +wire _guard460 = fsm0_out == 2'd2; +wire _guard461 = fsm0_out == 2'd1; +wire _guard462 = invoke9_done_out; +wire _guard463 = _guard461 & _guard462; +wire _guard464 = tdcc0_go_out; wire _guard465 = _guard463 & _guard464; -wire _guard466 = tdcc_go_out; -wire _guard467 = _guard465 & _guard466; -wire _guard468 = _guard462 | _guard467; -wire _guard469 = fsm0_out == 2'd1; -wire _guard470 = invoke7_done_out; +wire _guard466 = fsm2_out == 2'd3; +wire _guard467 = fsm2_out == 2'd0; +wire _guard468 = invoke16_done_out; +wire _guard469 = _guard467 & _guard468; +wire _guard470 = tdcc2_go_out; wire _guard471 = _guard469 & _guard470; -wire _guard472 = tdcc_go_out; -wire _guard473 = _guard471 & _guard472; -wire _guard474 = _guard468 | _guard473; -wire _guard475 = fsm0_out == 2'd0; -wire _guard476 = invoke6_done_out; +wire _guard472 = _guard466 | _guard471; +wire _guard473 = fsm2_out == 2'd1; +wire _guard474 = invoke17_done_out; +wire _guard475 = _guard473 & _guard474; +wire _guard476 = tdcc2_go_out; wire _guard477 = _guard475 & _guard476; -wire _guard478 = tdcc_go_out; -wire _guard479 = _guard477 & _guard478; -wire _guard480 = fsm0_out == 2'd2; -wire _guard481 = fsm0_out == 2'd1; -wire _guard482 = invoke7_done_out; +wire _guard478 = _guard472 | _guard477; +wire _guard479 = fsm2_out == 2'd2; +wire _guard480 = invoke18_done_out; +wire _guard481 = _guard479 & _guard480; +wire _guard482 = tdcc2_go_out; wire _guard483 = _guard481 & _guard482; -wire _guard484 = tdcc_go_out; -wire _guard485 = _guard483 & _guard484; -wire _guard486 = fsm2_out == 2'd2; -wire _guard487 = fsm2_out == 2'd0; -wire _guard488 = invoke10_done_out; +wire _guard484 = _guard478 | _guard483; +wire _guard485 = fsm2_out == 2'd0; +wire _guard486 = invoke16_done_out; +wire _guard487 = _guard485 & _guard486; +wire _guard488 = tdcc2_go_out; wire _guard489 = _guard487 & _guard488; -wire _guard490 = tdcc1_go_out; -wire _guard491 = _guard489 & _guard490; -wire _guard492 = _guard486 | _guard491; -wire _guard493 = fsm2_out == 2'd1; -wire _guard494 = invoke11_done_out; +wire _guard490 = fsm2_out == 2'd3; +wire _guard491 = fsm2_out == 2'd2; +wire _guard492 = invoke18_done_out; +wire _guard493 = _guard491 & _guard492; +wire _guard494 = tdcc2_go_out; wire _guard495 = _guard493 & _guard494; -wire _guard496 = tdcc1_go_out; -wire _guard497 = _guard495 & _guard496; -wire _guard498 = _guard492 | _guard497; -wire _guard499 = fsm2_out == 2'd0; -wire _guard500 = invoke10_done_out; -wire _guard501 = _guard499 & _guard500; -wire _guard502 = tdcc1_go_out; -wire _guard503 = _guard501 & _guard502; -wire _guard504 = fsm2_out == 2'd2; -wire _guard505 = fsm2_out == 2'd1; -wire _guard506 = invoke11_done_out; -wire _guard507 = _guard505 & _guard506; -wire _guard508 = tdcc1_go_out; -wire _guard509 = _guard507 & _guard508; -wire _guard510 = invoke8_done_out; -wire _guard511 = ~_guard510; -wire _guard512 = fsm1_out == 2'd0; -wire _guard513 = _guard511 & _guard512; -wire _guard514 = tdcc0_go_out; -wire _guard515 = _guard513 & _guard514; -wire _guard516 = pd0_out; -wire _guard517 = tdcc0_done_out; -wire _guard518 = _guard516 | _guard517; -wire _guard519 = ~_guard518; -wire _guard520 = par0_go_out; -wire _guard521 = _guard519 & _guard520; -wire _guard522 = invoke6_go_out; -wire _guard523 = invoke6_go_out; -wire _guard524 = invoke6_go_out; -wire _guard525 = invoke6_go_out; -wire _guard526 = invoke16_go_out; -wire _guard527 = invoke16_go_out; -wire _guard528 = invoke16_go_out; -wire _guard529 = invoke16_go_out; -wire _guard530 = pd_out; -wire _guard531 = pd0_out; -wire _guard532 = _guard530 & _guard531; -wire _guard533 = pd1_out; -wire _guard534 = _guard532 & _guard533; -wire _guard535 = invoke17_done_out; -wire _guard536 = ~_guard535; -wire _guard537 = fsm3_out == 2'd1; -wire _guard538 = _guard536 & _guard537; -wire _guard539 = tdcc2_go_out; +wire _guard496 = fsm2_out == 2'd1; +wire _guard497 = invoke17_done_out; +wire _guard498 = _guard496 & _guard497; +wire _guard499 = tdcc2_go_out; +wire _guard500 = _guard498 & _guard499; +wire _guard501 = invoke8_done_out; +wire _guard502 = ~_guard501; +wire _guard503 = fsm0_out == 2'd0; +wire _guard504 = _guard502 & _guard503; +wire _guard505 = tdcc0_go_out; +wire _guard506 = _guard504 & _guard505; +wire _guard507 = pd0_out; +wire _guard508 = tdcc0_done_out; +wire _guard509 = _guard507 | _guard508; +wire _guard510 = ~_guard509; +wire _guard511 = par0_go_out; +wire _guard512 = _guard510 & _guard511; +wire _guard513 = invoke6_go_out; +wire _guard514 = invoke6_go_out; +wire _guard515 = invoke6_go_out; +wire _guard516 = invoke6_go_out; +wire _guard517 = invoke16_go_out; +wire _guard518 = invoke16_go_out; +wire _guard519 = invoke16_go_out; +wire _guard520 = invoke16_go_out; +wire _guard521 = pd_out; +wire _guard522 = pd0_out; +wire _guard523 = _guard521 & _guard522; +wire _guard524 = pd1_out; +wire _guard525 = _guard523 & _guard524; +wire _guard526 = invoke17_done_out; +wire _guard527 = ~_guard526; +wire _guard528 = fsm2_out == 2'd1; +wire _guard529 = _guard527 & _guard528; +wire _guard530 = tdcc2_go_out; +wire _guard531 = _guard529 & _guard530; +wire _guard532 = invoke21_done_out; +wire _guard533 = ~_guard532; +wire _guard534 = fsm3_out == 2'd2; +wire _guard535 = _guard533 & _guard534; +wire _guard536 = tdcc3_go_out; +wire _guard537 = _guard535 & _guard536; +wire _guard538 = pd2_out; +wire _guard539 = pd3_out; wire _guard540 = _guard538 & _guard539; -wire _guard541 = invoke21_done_out; -wire _guard542 = ~_guard541; -wire _guard543 = fsm4_out == 2'd2; -wire _guard544 = _guard542 & _guard543; -wire _guard545 = tdcc3_go_out; -wire _guard546 = _guard544 & _guard545; -wire _guard547 = early_reset_static_par0_go_out; -wire _guard548 = early_reset_static_par0_go_out; -wire _guard549 = pd2_out; -wire _guard550 = pd3_out; -wire _guard551 = _guard549 & _guard550; -wire _guard552 = pd4_out; -wire _guard553 = _guard551 & _guard552; -wire _guard554 = tdcc2_done_out; -wire _guard555 = par1_go_out; -wire _guard556 = _guard554 & _guard555; -wire _guard557 = _guard553 | _guard556; -wire _guard558 = tdcc2_done_out; -wire _guard559 = par1_go_out; +wire _guard541 = pd4_out; +wire _guard542 = _guard540 & _guard541; +wire _guard543 = tdcc2_done_out; +wire _guard544 = par1_go_out; +wire _guard545 = _guard543 & _guard544; +wire _guard546 = _guard542 | _guard545; +wire _guard547 = tdcc2_done_out; +wire _guard548 = par1_go_out; +wire _guard549 = _guard547 & _guard548; +wire _guard550 = pd2_out; +wire _guard551 = pd3_out; +wire _guard552 = _guard550 & _guard551; +wire _guard553 = pd4_out; +wire _guard554 = _guard552 & _guard553; +wire _guard555 = wrapper_early_reset_static_par_thread0_done_out; +wire _guard556 = ~_guard555; +wire _guard557 = fsm5_out == 3'd3; +wire _guard558 = _guard556 & _guard557; +wire _guard559 = tdcc5_go_out; wire _guard560 = _guard558 & _guard559; -wire _guard561 = pd2_out; -wire _guard562 = pd3_out; -wire _guard563 = _guard561 & _guard562; -wire _guard564 = pd4_out; -wire _guard565 = _guard563 & _guard564; -wire _guard566 = invoke16_done_out; -wire _guard567 = ~_guard566; -wire _guard568 = fsm3_out == 2'd0; -wire _guard569 = _guard567 & _guard568; -wire _guard570 = tdcc2_go_out; -wire _guard571 = _guard569 & _guard570; +wire _guard561 = invoke16_done_out; +wire _guard562 = ~_guard561; +wire _guard563 = fsm2_out == 2'd0; +wire _guard564 = _guard562 & _guard563; +wire _guard565 = tdcc2_go_out; +wire _guard566 = _guard564 & _guard565; +wire _guard567 = invoke17_go_out; +wire _guard568 = invoke17_go_out; +wire _guard569 = invoke17_go_out; +wire _guard570 = invoke17_go_out; +wire _guard571 = invoke17_go_out; wire _guard572 = invoke17_go_out; wire _guard573 = invoke17_go_out; wire _guard574 = invoke17_go_out; wire _guard575 = invoke17_go_out; -wire _guard576 = invoke17_go_out; -wire _guard577 = invoke17_go_out; -wire _guard578 = invoke17_go_out; -wire _guard579 = invoke17_go_out; -wire _guard580 = invoke17_go_out; -wire _guard581 = invoke8_go_out; -wire _guard582 = invoke8_go_out; -wire _guard583 = invoke8_go_out; -wire _guard584 = invoke8_go_out; -wire _guard585 = fsm_out == 1'd0; -wire _guard586 = signal_reg_out; -wire _guard587 = _guard585 & _guard586; -wire _guard588 = fsm_out == 1'd0; +wire _guard576 = invoke8_go_out; +wire _guard577 = invoke8_go_out; +wire _guard578 = invoke8_go_out; +wire _guard579 = invoke8_go_out; +wire _guard580 = signal_reg_out; +wire _guard581 = _guard0 & _guard0; +wire _guard582 = signal_reg_out; +wire _guard583 = ~_guard582; +wire _guard584 = _guard581 & _guard583; +wire _guard585 = wrapper_early_reset_static_par_thread_go_out; +wire _guard586 = _guard584 & _guard585; +wire _guard587 = _guard580 | _guard586; +wire _guard588 = _guard0 & _guard0; wire _guard589 = signal_reg_out; wire _guard590 = ~_guard589; wire _guard591 = _guard588 & _guard590; -wire _guard592 = wrapper_early_reset_static_par_go_out; +wire _guard592 = wrapper_early_reset_static_par_thread_go_out; wire _guard593 = _guard591 & _guard592; -wire _guard594 = _guard587 | _guard593; -wire _guard595 = fsm_out == 1'd0; -wire _guard596 = signal_reg_out; -wire _guard597 = ~_guard596; -wire _guard598 = _guard595 & _guard597; -wire _guard599 = wrapper_early_reset_static_par0_go_out; +wire _guard594 = signal_reg_out; +wire _guard595 = wrapper_early_reset_static_par_thread_go_out; +wire _guard596 = signal_reg0_out; +wire _guard597 = fsm1_out == 2'd2; +wire _guard598 = pd2_out; +wire _guard599 = pd3_out; wire _guard600 = _guard598 & _guard599; -wire _guard601 = _guard594 | _guard600; -wire _guard602 = fsm_out == 1'd0; -wire _guard603 = signal_reg_out; -wire _guard604 = ~_guard603; -wire _guard605 = _guard602 & _guard604; -wire _guard606 = wrapper_early_reset_static_par_go_out; -wire _guard607 = _guard605 & _guard606; -wire _guard608 = fsm_out == 1'd0; -wire _guard609 = signal_reg_out; -wire _guard610 = ~_guard609; -wire _guard611 = _guard608 & _guard610; -wire _guard612 = wrapper_early_reset_static_par0_go_out; -wire _guard613 = _guard611 & _guard612; -wire _guard614 = _guard607 | _guard613; -wire _guard615 = fsm_out == 1'd0; -wire _guard616 = signal_reg_out; -wire _guard617 = _guard615 & _guard616; -wire _guard618 = fsm2_out == 2'd2; -wire _guard619 = pd2_out; -wire _guard620 = pd3_out; -wire _guard621 = _guard619 & _guard620; -wire _guard622 = pd4_out; +wire _guard601 = pd4_out; +wire _guard602 = _guard600 & _guard601; +wire _guard603 = invoke21_go_out; +wire _guard604 = invoke21_go_out; +wire _guard605 = invoke11_go_out; +wire _guard606 = invoke12_go_out; +wire _guard607 = invoke23_go_out; +wire _guard608 = invoke11_go_out; +wire _guard609 = invoke12_go_out; +wire _guard610 = invoke23_go_out; +wire _guard611 = invoke11_go_out; +wire _guard612 = invoke12_go_out; +wire _guard613 = invoke23_go_out; +wire _guard614 = invoke11_go_out; +wire _guard615 = invoke12_go_out; +wire _guard616 = pd_out; +wire _guard617 = pd0_out; +wire _guard618 = _guard616 & _guard617; +wire _guard619 = pd1_out; +wire _guard620 = _guard618 & _guard619; +wire _guard621 = tdcc_done_out; +wire _guard622 = par0_go_out; wire _guard623 = _guard621 & _guard622; -wire _guard624 = invoke21_go_out; -wire _guard625 = invoke21_go_out; -wire _guard626 = invoke11_go_out; -wire _guard627 = invoke12_go_out; -wire _guard628 = invoke23_go_out; -wire _guard629 = invoke11_go_out; -wire _guard630 = invoke12_go_out; -wire _guard631 = invoke23_go_out; -wire _guard632 = invoke11_go_out; -wire _guard633 = invoke12_go_out; -wire _guard634 = invoke23_go_out; -wire _guard635 = invoke11_go_out; -wire _guard636 = invoke12_go_out; -wire _guard637 = pd_out; -wire _guard638 = pd0_out; -wire _guard639 = _guard637 & _guard638; -wire _guard640 = pd1_out; -wire _guard641 = _guard639 & _guard640; -wire _guard642 = tdcc_done_out; +wire _guard624 = _guard620 | _guard623; +wire _guard625 = tdcc_done_out; +wire _guard626 = par0_go_out; +wire _guard627 = _guard625 & _guard626; +wire _guard628 = pd_out; +wire _guard629 = pd0_out; +wire _guard630 = _guard628 & _guard629; +wire _guard631 = pd1_out; +wire _guard632 = _guard630 & _guard631; +wire _guard633 = pd_out; +wire _guard634 = pd0_out; +wire _guard635 = _guard633 & _guard634; +wire _guard636 = pd1_out; +wire _guard637 = _guard635 & _guard636; +wire _guard638 = tdcc0_done_out; +wire _guard639 = par0_go_out; +wire _guard640 = _guard638 & _guard639; +wire _guard641 = _guard637 | _guard640; +wire _guard642 = tdcc0_done_out; wire _guard643 = par0_go_out; wire _guard644 = _guard642 & _guard643; -wire _guard645 = _guard641 | _guard644; -wire _guard646 = tdcc_done_out; -wire _guard647 = par0_go_out; -wire _guard648 = _guard646 & _guard647; -wire _guard649 = pd_out; -wire _guard650 = pd0_out; -wire _guard651 = _guard649 & _guard650; -wire _guard652 = pd1_out; -wire _guard653 = _guard651 & _guard652; -wire _guard654 = pd_out; -wire _guard655 = pd0_out; -wire _guard656 = _guard654 & _guard655; -wire _guard657 = pd1_out; -wire _guard658 = _guard656 & _guard657; -wire _guard659 = tdcc0_done_out; -wire _guard660 = par0_go_out; +wire _guard645 = pd_out; +wire _guard646 = pd0_out; +wire _guard647 = _guard645 & _guard646; +wire _guard648 = pd1_out; +wire _guard649 = _guard647 & _guard648; +wire _guard650 = pd2_out; +wire _guard651 = pd3_out; +wire _guard652 = _guard650 & _guard651; +wire _guard653 = pd4_out; +wire _guard654 = _guard652 & _guard653; +wire _guard655 = tdcc4_done_out; +wire _guard656 = par1_go_out; +wire _guard657 = _guard655 & _guard656; +wire _guard658 = _guard654 | _guard657; +wire _guard659 = tdcc4_done_out; +wire _guard660 = par1_go_out; wire _guard661 = _guard659 & _guard660; -wire _guard662 = _guard658 | _guard661; -wire _guard663 = tdcc0_done_out; -wire _guard664 = par0_go_out; -wire _guard665 = _guard663 & _guard664; -wire _guard666 = pd_out; -wire _guard667 = pd0_out; -wire _guard668 = _guard666 & _guard667; -wire _guard669 = pd1_out; -wire _guard670 = _guard668 & _guard669; -wire _guard671 = pd2_out; -wire _guard672 = pd3_out; -wire _guard673 = _guard671 & _guard672; -wire _guard674 = pd4_out; -wire _guard675 = _guard673 & _guard674; -wire _guard676 = tdcc4_done_out; -wire _guard677 = par1_go_out; -wire _guard678 = _guard676 & _guard677; -wire _guard679 = _guard675 | _guard678; -wire _guard680 = tdcc4_done_out; -wire _guard681 = par1_go_out; -wire _guard682 = _guard680 & _guard681; -wire _guard683 = pd2_out; -wire _guard684 = pd3_out; -wire _guard685 = _guard683 & _guard684; -wire _guard686 = pd4_out; +wire _guard662 = pd2_out; +wire _guard663 = pd3_out; +wire _guard664 = _guard662 & _guard663; +wire _guard665 = pd4_out; +wire _guard666 = _guard664 & _guard665; +wire _guard667 = wrapper_early_reset_static_par_thread0_go_out; +wire _guard668 = signal_reg_out; +wire _guard669 = pd4_out; +wire _guard670 = tdcc4_done_out; +wire _guard671 = _guard669 | _guard670; +wire _guard672 = ~_guard671; +wire _guard673 = par1_go_out; +wire _guard674 = _guard672 & _guard673; +wire _guard675 = invoke18_go_out; +wire _guard676 = invoke18_go_out; +wire _guard677 = fsm_out == 2'd2; +wire _guard678 = invoke19_done_out; +wire _guard679 = ~_guard678; +wire _guard680 = fsm3_out == 2'd0; +wire _guard681 = _guard679 & _guard680; +wire _guard682 = tdcc3_go_out; +wire _guard683 = _guard681 & _guard682; +wire _guard684 = invoke20_done_out; +wire _guard685 = ~_guard684; +wire _guard686 = fsm3_out == 2'd1; wire _guard687 = _guard685 & _guard686; -wire _guard688 = pd4_out; -wire _guard689 = tdcc4_done_out; -wire _guard690 = _guard688 | _guard689; -wire _guard691 = ~_guard690; -wire _guard692 = par1_go_out; -wire _guard693 = _guard691 & _guard692; -wire _guard694 = invoke18_go_out; -wire _guard695 = invoke18_go_out; -wire _guard696 = wrapper_early_reset_static_par0_done_out; -wire _guard697 = ~_guard696; -wire _guard698 = fsm6_out == 3'd3; -wire _guard699 = _guard697 & _guard698; -wire _guard700 = tdcc5_go_out; -wire _guard701 = _guard699 & _guard700; -wire _guard702 = fsm_out == 1'd0; -wire _guard703 = signal_reg_out; -wire _guard704 = _guard702 & _guard703; -wire _guard705 = fsm0_out == 2'd2; -wire _guard706 = invoke19_done_out; -wire _guard707 = ~_guard706; -wire _guard708 = fsm4_out == 2'd0; +wire _guard688 = tdcc3_go_out; +wire _guard689 = _guard687 & _guard688; +wire _guard690 = invoke16_go_out; +wire _guard691 = invoke16_go_out; +wire _guard692 = invoke22_go_out; +wire _guard693 = invoke22_go_out; +wire _guard694 = invoke22_go_out; +wire _guard695 = invoke22_go_out; +wire _guard696 = invoke23_go_out; +wire _guard697 = invoke23_go_out; +wire _guard698 = invoke23_go_out; +wire _guard699 = invoke23_go_out; +wire _guard700 = invoke23_go_out; +wire _guard701 = invoke23_go_out; +wire _guard702 = invoke23_go_out; +wire _guard703 = invoke23_go_out; +wire _guard704 = invoke23_go_out; +wire _guard705 = pd2_out; +wire _guard706 = pd3_out; +wire _guard707 = _guard705 & _guard706; +wire _guard708 = pd4_out; wire _guard709 = _guard707 & _guard708; -wire _guard710 = tdcc3_go_out; -wire _guard711 = _guard709 & _guard710; -wire _guard712 = invoke20_done_out; -wire _guard713 = ~_guard712; -wire _guard714 = fsm4_out == 2'd1; -wire _guard715 = _guard713 & _guard714; -wire _guard716 = tdcc3_go_out; -wire _guard717 = _guard715 & _guard716; -wire _guard718 = invoke16_go_out; -wire _guard719 = invoke16_go_out; -wire _guard720 = invoke22_go_out; -wire _guard721 = invoke22_go_out; -wire _guard722 = invoke22_go_out; -wire _guard723 = invoke22_go_out; -wire _guard724 = invoke23_go_out; -wire _guard725 = invoke23_go_out; -wire _guard726 = invoke23_go_out; +wire _guard710 = tdcc3_done_out; +wire _guard711 = par1_go_out; +wire _guard712 = _guard710 & _guard711; +wire _guard713 = _guard709 | _guard712; +wire _guard714 = tdcc3_done_out; +wire _guard715 = par1_go_out; +wire _guard716 = _guard714 & _guard715; +wire _guard717 = pd2_out; +wire _guard718 = pd3_out; +wire _guard719 = _guard717 & _guard718; +wire _guard720 = pd4_out; +wire _guard721 = _guard719 & _guard720; +wire _guard722 = fsm4_out == 2'd3; +wire _guard723 = invoke19_go_out; +wire _guard724 = invoke19_go_out; +wire _guard725 = invoke11_go_out; +wire _guard726 = early_reset_static_par_thread_go_out; wire _guard727 = invoke23_go_out; -wire _guard728 = invoke23_go_out; +wire _guard728 = invoke11_go_out; wire _guard729 = invoke23_go_out; -wire _guard730 = invoke23_go_out; -wire _guard731 = invoke23_go_out; -wire _guard732 = invoke23_go_out; -wire _guard733 = pd2_out; -wire _guard734 = pd3_out; -wire _guard735 = _guard733 & _guard734; -wire _guard736 = pd4_out; -wire _guard737 = _guard735 & _guard736; -wire _guard738 = tdcc3_done_out; -wire _guard739 = par1_go_out; +wire _guard730 = early_reset_static_par_thread_go_out; +wire _guard731 = invoke6_done_out; +wire _guard732 = ~_guard731; +wire _guard733 = fsm_out == 2'd0; +wire _guard734 = _guard732 & _guard733; +wire _guard735 = tdcc_go_out; +wire _guard736 = _guard734 & _guard735; +wire _guard737 = invoke24_done_out; +wire _guard738 = ~_guard737; +wire _guard739 = fsm4_out == 2'd2; wire _guard740 = _guard738 & _guard739; -wire _guard741 = _guard737 | _guard740; -wire _guard742 = tdcc3_done_out; -wire _guard743 = par1_go_out; -wire _guard744 = _guard742 & _guard743; -wire _guard745 = pd2_out; -wire _guard746 = pd3_out; -wire _guard747 = _guard745 & _guard746; -wire _guard748 = pd4_out; -wire _guard749 = _guard747 & _guard748; -wire _guard750 = wrapper_early_reset_static_par_go_out; -wire _guard751 = fsm5_out == 2'd3; -wire _guard752 = invoke19_go_out; -wire _guard753 = invoke19_go_out; -wire _guard754 = invoke11_go_out; -wire _guard755 = early_reset_static_par_go_out; -wire _guard756 = invoke23_go_out; -wire _guard757 = invoke11_go_out; -wire _guard758 = invoke23_go_out; -wire _guard759 = early_reset_static_par_go_out; -wire _guard760 = invoke6_done_out; -wire _guard761 = ~_guard760; -wire _guard762 = fsm0_out == 2'd0; -wire _guard763 = _guard761 & _guard762; -wire _guard764 = tdcc_go_out; -wire _guard765 = _guard763 & _guard764; -wire _guard766 = invoke24_done_out; -wire _guard767 = ~_guard766; -wire _guard768 = fsm5_out == 2'd2; -wire _guard769 = _guard767 & _guard768; -wire _guard770 = tdcc4_go_out; -wire _guard771 = _guard769 & _guard770; -wire _guard772 = pd1_out; -wire _guard773 = tdcc1_done_out; -wire _guard774 = _guard772 | _guard773; -wire _guard775 = ~_guard774; -wire _guard776 = par0_go_out; -wire _guard777 = _guard775 & _guard776; -wire _guard778 = par0_done_out; -wire _guard779 = ~_guard778; -wire _guard780 = fsm6_out == 3'd1; -wire _guard781 = _guard779 & _guard780; -wire _guard782 = tdcc5_go_out; -wire _guard783 = _guard781 & _guard782; -wire _guard784 = invoke7_done_out; -wire _guard785 = ~_guard784; -wire _guard786 = fsm0_out == 2'd1; -wire _guard787 = _guard785 & _guard786; -wire _guard788 = tdcc_go_out; -wire _guard789 = _guard787 & _guard788; -wire _guard790 = invoke10_done_out; -wire _guard791 = ~_guard790; -wire _guard792 = fsm2_out == 2'd0; -wire _guard793 = _guard791 & _guard792; -wire _guard794 = tdcc1_go_out; -wire _guard795 = _guard793 & _guard794; -wire _guard796 = invoke22_done_out; -wire _guard797 = ~_guard796; -wire _guard798 = fsm5_out == 2'd0; -wire _guard799 = _guard797 & _guard798; -wire _guard800 = tdcc4_go_out; -wire _guard801 = _guard799 & _guard800; -wire _guard802 = fsm6_out == 3'd5; +wire _guard741 = tdcc4_go_out; +wire _guard742 = _guard740 & _guard741; +wire _guard743 = pd1_out; +wire _guard744 = tdcc1_done_out; +wire _guard745 = _guard743 | _guard744; +wire _guard746 = ~_guard745; +wire _guard747 = par0_go_out; +wire _guard748 = _guard746 & _guard747; +wire _guard749 = par0_done_out; +wire _guard750 = ~_guard749; +wire _guard751 = fsm5_out == 3'd1; +wire _guard752 = _guard750 & _guard751; +wire _guard753 = tdcc5_go_out; +wire _guard754 = _guard752 & _guard753; +wire _guard755 = invoke7_done_out; +wire _guard756 = ~_guard755; +wire _guard757 = fsm_out == 2'd1; +wire _guard758 = _guard756 & _guard757; +wire _guard759 = tdcc_go_out; +wire _guard760 = _guard758 & _guard759; +wire _guard761 = invoke10_done_out; +wire _guard762 = ~_guard761; +wire _guard763 = fsm1_out == 2'd0; +wire _guard764 = _guard762 & _guard763; +wire _guard765 = tdcc1_go_out; +wire _guard766 = _guard764 & _guard765; +wire _guard767 = invoke22_done_out; +wire _guard768 = ~_guard767; +wire _guard769 = fsm4_out == 2'd0; +wire _guard770 = _guard768 & _guard769; +wire _guard771 = tdcc4_go_out; +wire _guard772 = _guard770 & _guard771; +wire _guard773 = fsm5_out == 3'd5; assign curr_addr_internal_mem_A0_write_en = _guard1 ? 1'd1 : _guard2 ? read_channel_A0_curr_addr_internal_mem_write_en : _guard3 ? write_channel_A0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_A0_clk = clk; +assign curr_addr_internal_mem_A0_clk = ap_clk; assign curr_addr_internal_mem_A0_reset = reset; assign curr_addr_internal_mem_A0_in = _guard4 ? read_channel_A0_curr_addr_internal_mem_in : @@ -7274,7 +7104,7 @@ assign read_channel_Sum0_RLAST = assign read_channel_Sum0_RDATA = _guard18 ? Sum0_RDATA : 32'd0; -assign read_channel_Sum0_clk = clk; +assign read_channel_Sum0_clk = ap_clk; assign read_channel_Sum0_go = _guard19; assign read_channel_Sum0_reset = reset; assign read_channel_Sum0_RRESP = @@ -7449,577 +7279,568 @@ assign A0_ARLEN = _guard73 ? ar_channel_A0_ARLEN : 8'd0; assign A0_AWID = 1'd0; -assign fsm_write_en = _guard76; -assign fsm_clk = clk; +assign fsm_write_en = _guard86; +assign fsm_clk = ap_clk; assign fsm_reset = reset; assign fsm_in = - _guard80 ? adder_out : - _guard87 ? 1'd0 : - _guard91 ? adder0_out : - 1'd0; -assign adder_left = - _guard92 ? fsm_out : - 1'd0; -assign adder_right = _guard93; -assign fsm6_write_en = _guard124; -assign fsm6_clk = clk; -assign fsm6_reset = reset; -assign fsm6_in = - _guard129 ? 3'd5 : - _guard134 ? 3'd2 : - _guard139 ? 3'd4 : - _guard144 ? 3'd1 : - _guard145 ? 3'd0 : - _guard150 ? 3'd3 : - 3'd0; -assign early_reset_static_par0_go_in = _guard151; + _guard91 ? 2'd1 : + _guard92 ? 2'd0 : + _guard97 ? 2'd2 : + 2'd0; assign invoke11_done_in = read_channel_Sum0_done; -assign invoke18_go_in = _guard157; -assign tdcc2_go_in = _guard163; +assign invoke18_go_in = _guard103; +assign tdcc2_go_in = _guard109; assign curr_addr_internal_mem_B0_write_en = - _guard164 ? read_channel_B0_curr_addr_internal_mem_write_en : - _guard165 ? 1'd1 : - _guard166 ? write_channel_B0_curr_addr_internal_mem_write_en : + _guard110 ? read_channel_B0_curr_addr_internal_mem_write_en : + _guard111 ? 1'd1 : + _guard112 ? write_channel_B0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_B0_clk = clk; +assign curr_addr_internal_mem_B0_clk = ap_clk; assign curr_addr_internal_mem_B0_reset = reset; assign curr_addr_internal_mem_B0_in = - _guard167 ? read_channel_B0_curr_addr_internal_mem_in : - _guard168 ? write_channel_B0_curr_addr_internal_mem_in : - _guard169 ? 3'd0 : + _guard113 ? read_channel_B0_curr_addr_internal_mem_in : + _guard114 ? write_channel_B0_curr_addr_internal_mem_in : + _guard115 ? 3'd0 : 'x; assign read_channel_B0_curr_addr_internal_mem_out = - _guard170 ? curr_addr_internal_mem_B0_out : + _guard116 ? curr_addr_internal_mem_B0_out : 3'd0; assign read_channel_B0_curr_addr_axi_out = - _guard171 ? curr_addr_axi_B0_out : + _guard117 ? curr_addr_axi_B0_out : 64'd0; assign read_channel_B0_RVALID = - _guard172 ? B0_RVALID : + _guard118 ? B0_RVALID : 1'd0; assign read_channel_B0_RLAST = - _guard173 ? B0_RLAST : + _guard119 ? B0_RLAST : 1'd0; assign read_channel_B0_RDATA = - _guard174 ? B0_RDATA : + _guard120 ? B0_RDATA : 32'd0; -assign read_channel_B0_clk = clk; -assign read_channel_B0_go = _guard175; +assign read_channel_B0_clk = ap_clk; +assign read_channel_B0_go = _guard121; assign read_channel_B0_reset = reset; assign read_channel_B0_RRESP = - _guard176 ? B0_RRESP : + _guard122 ? B0_RRESP : 2'd0; assign read_channel_B0_mem_ref_done = - _guard177 ? internal_mem_B0_done : + _guard123 ? internal_mem_B0_done : 1'd0; assign read_channel_B0_ARESETn = - _guard178 ? B0_ARESETn : + _guard124 ? B0_ARESETn : 1'd0; assign read_channel_B0_curr_addr_internal_mem_done = - _guard179 ? curr_addr_internal_mem_B0_done : + _guard125 ? curr_addr_internal_mem_B0_done : 1'd0; assign read_channel_B0_curr_addr_axi_done = - _guard180 ? curr_addr_axi_B0_done : + _guard126 ? curr_addr_axi_B0_done : 1'd0; assign internal_mem_B0_write_en = - _guard181 ? read_channel_B0_mem_ref_write_en : - _guard182 ? main_compute_B0_write_en : - _guard183 ? write_channel_B0_mem_ref_write_en : + _guard127 ? read_channel_B0_mem_ref_write_en : + _guard128 ? main_compute_B0_write_en : + _guard129 ? write_channel_B0_mem_ref_write_en : 1'd0; -assign internal_mem_B0_clk = clk; +assign internal_mem_B0_clk = ap_clk; assign internal_mem_B0_addr0 = - _guard184 ? read_channel_B0_mem_ref_addr0 : - _guard185 ? main_compute_B0_addr0 : - _guard186 ? write_channel_B0_mem_ref_addr0 : + _guard130 ? read_channel_B0_mem_ref_addr0 : + _guard131 ? main_compute_B0_addr0 : + _guard132 ? write_channel_B0_mem_ref_addr0 : 'x; assign internal_mem_B0_content_en = - _guard187 ? read_channel_B0_mem_ref_content_en : - _guard188 ? main_compute_B0_content_en : - _guard189 ? write_channel_B0_mem_ref_content_en : + _guard133 ? read_channel_B0_mem_ref_content_en : + _guard134 ? main_compute_B0_content_en : + _guard135 ? write_channel_B0_mem_ref_content_en : 1'd0; assign internal_mem_B0_reset = reset; assign internal_mem_B0_write_data = read_channel_B0_mem_ref_write_data; -assign bresp_channel_Sum0_clk = clk; -assign bresp_channel_Sum0_go = _guard191; +assign bresp_channel_Sum0_clk = ap_clk; +assign bresp_channel_Sum0_go = _guard137; assign bresp_channel_Sum0_reset = reset; assign bresp_channel_Sum0_BVALID = - _guard192 ? Sum0_BVALID : + _guard138 ? Sum0_BVALID : + 1'd0; +assign signal_reg0_write_en = _guard146; +assign signal_reg0_clk = ap_clk; +assign signal_reg0_reset = reset; +assign signal_reg0_in = + _guard152 ? 1'd1 : + _guard153 ? 1'd0 : 1'd0; -assign fsm3_write_en = _guard211; -assign fsm3_clk = clk; +assign fsm3_write_en = _guard172; +assign fsm3_clk = ap_clk; assign fsm3_reset = reset; assign fsm3_in = - _guard216 ? 2'd1 : - _guard217 ? 2'd0 : - _guard222 ? 2'd3 : - _guard227 ? 2'd2 : + _guard177 ? 2'd1 : + _guard178 ? 2'd0 : + _guard183 ? 2'd3 : + _guard188 ? 2'd2 : 2'd0; -assign fsm5_write_en = _guard246; -assign fsm5_clk = clk; +assign fsm5_write_en = _guard219; +assign fsm5_clk = ap_clk; assign fsm5_reset = reset; assign fsm5_in = - _guard251 ? 2'd1 : - _guard252 ? 2'd0 : - _guard257 ? 2'd3 : - _guard262 ? 2'd2 : - 2'd0; -assign tdcc0_done_in = _guard263; + _guard224 ? 3'd5 : + _guard229 ? 3'd2 : + _guard234 ? 3'd4 : + _guard239 ? 3'd1 : + _guard240 ? 3'd0 : + _guard245 ? 3'd3 : + 3'd0; +assign wrapper_early_reset_static_par_thread_go_in = _guard251; +assign tdcc0_done_in = _guard252; +assign early_reset_static_par_thread0_done_in = ud0_out; assign curr_addr_axi_B0_write_en = - _guard264 ? read_channel_B0_curr_addr_axi_write_en : - _guard267 ? 1'd1 : - _guard268 ? write_channel_B0_curr_addr_axi_write_en : + _guard253 ? read_channel_B0_curr_addr_axi_write_en : + _guard256 ? 1'd1 : + _guard257 ? write_channel_B0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_B0_clk = clk; +assign curr_addr_axi_B0_clk = ap_clk; assign curr_addr_axi_B0_reset = reset; assign curr_addr_axi_B0_in = - _guard269 ? read_channel_B0_curr_addr_axi_in : - _guard270 ? write_channel_B0_curr_addr_axi_in : - _guard273 ? 64'd4096 : + _guard258 ? read_channel_B0_curr_addr_axi_in : + _guard259 ? write_channel_B0_curr_addr_axi_in : + _guard262 ? 64'd4096 : 'x; assign max_transfers_Sum0_write_en = - _guard274 ? aw_channel_Sum0_max_transfers_write_en : + _guard263 ? aw_channel_Sum0_max_transfers_write_en : 1'd0; -assign max_transfers_Sum0_clk = clk; +assign max_transfers_Sum0_clk = ap_clk; assign max_transfers_Sum0_reset = reset; assign max_transfers_Sum0_in = aw_channel_Sum0_max_transfers_in; assign main_compute_A0_read_data = - _guard276 ? internal_mem_A0_read_data : + _guard265 ? internal_mem_A0_read_data : 32'd0; assign main_compute_B0_read_data = - _guard277 ? internal_mem_B0_read_data : + _guard266 ? internal_mem_B0_read_data : 32'd0; assign main_compute_Sum0_done = - _guard278 ? internal_mem_Sum0_done : + _guard267 ? internal_mem_Sum0_done : 1'd0; -assign main_compute_clk = clk; +assign main_compute_clk = ap_clk; assign main_compute_B0_done = - _guard279 ? internal_mem_B0_done : + _guard268 ? internal_mem_B0_done : 1'd0; -assign main_compute_go = _guard280; +assign main_compute_go = _guard269; assign main_compute_reset = reset; assign main_compute_A0_done = - _guard281 ? internal_mem_A0_done : + _guard270 ? internal_mem_A0_done : 1'd0; -assign fsm1_write_en = _guard294; -assign fsm1_clk = clk; +assign fsm1_write_en = _guard283; +assign fsm1_clk = ap_clk; assign fsm1_reset = reset; assign fsm1_in = - _guard299 ? 2'd1 : - _guard300 ? 2'd0 : - _guard305 ? 2'd2 : + _guard288 ? 2'd1 : + _guard289 ? 2'd0 : + _guard294 ? 2'd2 : 2'd0; -assign fsm4_write_en = _guard324; -assign fsm4_clk = clk; +assign fsm4_write_en = _guard313; +assign fsm4_clk = ap_clk; assign fsm4_reset = reset; assign fsm4_in = - _guard329 ? 2'd1 : - _guard330 ? 2'd0 : - _guard335 ? 2'd3 : - _guard340 ? 2'd2 : + _guard318 ? 2'd1 : + _guard319 ? 2'd0 : + _guard324 ? 2'd3 : + _guard329 ? 2'd2 : 2'd0; -assign wrapper_early_reset_static_par_go_in = _guard346; -assign invoke11_go_in = _guard352; +assign invoke11_go_in = _guard335; assign invoke20_done_in = write_channel_B0_done; -assign invoke23_go_in = _guard358; -assign par1_go_in = _guard364; +assign invoke23_go_in = _guard341; +assign par1_go_in = _guard347; assign curr_addr_axi_A0_write_en = - _guard367 ? 1'd1 : - _guard368 ? read_channel_A0_curr_addr_axi_write_en : - _guard369 ? write_channel_A0_curr_addr_axi_write_en : + _guard350 ? 1'd1 : + _guard351 ? read_channel_A0_curr_addr_axi_write_en : + _guard352 ? write_channel_A0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_A0_clk = clk; +assign curr_addr_axi_A0_clk = ap_clk; assign curr_addr_axi_A0_reset = reset; assign curr_addr_axi_A0_in = - _guard370 ? read_channel_A0_curr_addr_axi_in : - _guard373 ? 64'd4096 : - _guard374 ? write_channel_A0_curr_addr_axi_in : + _guard353 ? read_channel_A0_curr_addr_axi_in : + _guard356 ? 64'd4096 : + _guard357 ? write_channel_A0_curr_addr_axi_in : 'x; assign read_channel_A0_curr_addr_internal_mem_out = - _guard375 ? curr_addr_internal_mem_A0_out : + _guard358 ? curr_addr_internal_mem_A0_out : 3'd0; assign read_channel_A0_curr_addr_axi_out = - _guard376 ? curr_addr_axi_A0_out : + _guard359 ? curr_addr_axi_A0_out : 64'd0; assign read_channel_A0_RVALID = - _guard377 ? A0_RVALID : + _guard360 ? A0_RVALID : 1'd0; assign read_channel_A0_RLAST = - _guard378 ? A0_RLAST : + _guard361 ? A0_RLAST : 1'd0; assign read_channel_A0_RDATA = - _guard379 ? A0_RDATA : + _guard362 ? A0_RDATA : 32'd0; -assign read_channel_A0_clk = clk; -assign read_channel_A0_go = _guard380; +assign read_channel_A0_clk = ap_clk; +assign read_channel_A0_go = _guard363; assign read_channel_A0_reset = reset; assign read_channel_A0_RRESP = - _guard381 ? A0_RRESP : + _guard364 ? A0_RRESP : 2'd0; assign read_channel_A0_mem_ref_done = - _guard382 ? internal_mem_A0_done : + _guard365 ? internal_mem_A0_done : 1'd0; assign read_channel_A0_ARESETn = - _guard383 ? A0_ARESETn : + _guard366 ? A0_ARESETn : 1'd0; assign read_channel_A0_curr_addr_internal_mem_done = - _guard384 ? curr_addr_internal_mem_A0_done : + _guard367 ? curr_addr_internal_mem_A0_done : 1'd0; assign read_channel_A0_curr_addr_axi_done = - _guard385 ? curr_addr_axi_A0_done : + _guard368 ? curr_addr_axi_A0_done : 1'd0; assign internal_mem_A0_write_en = - _guard386 ? main_compute_A0_write_en : - _guard387 ? read_channel_A0_mem_ref_write_en : - _guard388 ? write_channel_A0_mem_ref_write_en : + _guard369 ? main_compute_A0_write_en : + _guard370 ? read_channel_A0_mem_ref_write_en : + _guard371 ? write_channel_A0_mem_ref_write_en : 1'd0; -assign internal_mem_A0_clk = clk; +assign internal_mem_A0_clk = ap_clk; assign internal_mem_A0_addr0 = - _guard389 ? main_compute_A0_addr0 : - _guard390 ? read_channel_A0_mem_ref_addr0 : - _guard391 ? write_channel_A0_mem_ref_addr0 : + _guard372 ? main_compute_A0_addr0 : + _guard373 ? read_channel_A0_mem_ref_addr0 : + _guard374 ? write_channel_A0_mem_ref_addr0 : 'x; assign internal_mem_A0_content_en = - _guard392 ? main_compute_A0_content_en : - _guard393 ? read_channel_A0_mem_ref_content_en : - _guard394 ? write_channel_A0_mem_ref_content_en : + _guard375 ? main_compute_A0_content_en : + _guard376 ? read_channel_A0_mem_ref_content_en : + _guard377 ? write_channel_A0_mem_ref_content_en : 1'd0; assign internal_mem_A0_reset = reset; assign internal_mem_A0_write_data = read_channel_A0_mem_ref_write_data; assign write_channel_B0_WREADY = - _guard396 ? B0_WREADY : + _guard379 ? B0_WREADY : 1'd0; assign write_channel_B0_curr_addr_internal_mem_out = - _guard397 ? curr_addr_internal_mem_B0_out : + _guard380 ? curr_addr_internal_mem_B0_out : 3'd0; assign write_channel_B0_curr_addr_axi_out = - _guard398 ? curr_addr_axi_B0_out : + _guard381 ? curr_addr_axi_B0_out : 64'd0; assign write_channel_B0_max_transfers_out = - _guard399 ? max_transfers_B0_out : + _guard382 ? max_transfers_B0_out : 8'd0; -assign write_channel_B0_clk = clk; +assign write_channel_B0_clk = ap_clk; assign write_channel_B0_mem_ref_read_data = - _guard400 ? internal_mem_B0_read_data : + _guard383 ? internal_mem_B0_read_data : 32'd0; -assign write_channel_B0_go = _guard401; +assign write_channel_B0_go = _guard384; assign write_channel_B0_reset = reset; assign write_channel_B0_ARESETn = - _guard402 ? B0_ARESETn : + _guard385 ? B0_ARESETn : 1'd0; assign write_channel_B0_curr_addr_internal_mem_done = - _guard403 ? curr_addr_internal_mem_B0_done : + _guard386 ? curr_addr_internal_mem_B0_done : 1'd0; assign write_channel_B0_curr_addr_axi_done = - _guard404 ? curr_addr_axi_B0_done : + _guard387 ? curr_addr_axi_B0_done : 1'd0; assign curr_addr_axi_Sum0_write_en = - _guard405 ? read_channel_Sum0_curr_addr_axi_write_en : - _guard408 ? 1'd1 : - _guard409 ? write_channel_Sum0_curr_addr_axi_write_en : + _guard388 ? read_channel_Sum0_curr_addr_axi_write_en : + _guard391 ? 1'd1 : + _guard392 ? write_channel_Sum0_curr_addr_axi_write_en : 1'd0; -assign curr_addr_axi_Sum0_clk = clk; +assign curr_addr_axi_Sum0_clk = ap_clk; assign curr_addr_axi_Sum0_reset = reset; assign curr_addr_axi_Sum0_in = - _guard410 ? read_channel_Sum0_curr_addr_axi_in : - _guard413 ? 64'd4096 : - _guard414 ? write_channel_Sum0_curr_addr_axi_in : + _guard393 ? read_channel_Sum0_curr_addr_axi_in : + _guard396 ? 64'd4096 : + _guard397 ? write_channel_Sum0_curr_addr_axi_in : 'x; assign ar_channel_Sum0_curr_addr_axi_out = - _guard415 ? curr_addr_axi_Sum0_out : + _guard398 ? curr_addr_axi_Sum0_out : 64'd0; -assign ar_channel_Sum0_clk = clk; -assign ar_channel_Sum0_go = _guard416; +assign ar_channel_Sum0_clk = ap_clk; +assign ar_channel_Sum0_go = _guard399; assign ar_channel_Sum0_reset = reset; assign ar_channel_Sum0_ARREADY = - _guard417 ? Sum0_ARREADY : + _guard400 ? Sum0_ARREADY : 1'd0; assign ar_channel_Sum0_ARESETn = - _guard418 ? Sum0_ARESETn : + _guard401 ? Sum0_ARESETn : 1'd0; -assign pd1_write_en = _guard427; -assign pd1_clk = clk; +assign pd1_write_en = _guard410; +assign pd1_clk = ap_clk; assign pd1_reset = reset; assign pd1_in = - _guard430 ? 1'd1 : - _guard435 ? 1'd0 : + _guard413 ? 1'd1 : + _guard418 ? 1'd0 : 1'd0; -assign early_reset_static_par0_done_in = ud0_out; -assign wrapper_early_reset_static_par_done_in = _guard438; -assign tdcc_go_in = _guard444; -assign invoke12_go_in = _guard450; +assign tdcc_go_in = _guard424; +assign invoke12_go_in = _guard430; assign invoke16_done_in = aw_channel_A0_done; assign invoke18_done_in = bresp_channel_A0_done; assign invoke23_done_in = write_channel_Sum0_done; -assign tdcc3_go_in = _guard456; -assign tdcc3_done_in = _guard457; +assign tdcc3_go_in = _guard436; +assign tdcc3_done_in = _guard437; assign aw_channel_B0_curr_addr_axi_out = - _guard458 ? curr_addr_axi_B0_out : + _guard438 ? curr_addr_axi_B0_out : 64'd0; -assign aw_channel_B0_clk = clk; +assign aw_channel_B0_clk = ap_clk; assign aw_channel_B0_AWREADY = - _guard459 ? B0_AWREADY : + _guard439 ? B0_AWREADY : 1'd0; -assign aw_channel_B0_go = _guard460; +assign aw_channel_B0_go = _guard440; assign aw_channel_B0_reset = reset; assign aw_channel_B0_ARESETn = - _guard461 ? B0_ARESETn : + _guard441 ? B0_ARESETn : 1'd0; -assign fsm0_write_en = _guard474; -assign fsm0_clk = clk; +assign fsm0_write_en = _guard454; +assign fsm0_clk = ap_clk; assign fsm0_reset = reset; assign fsm0_in = - _guard479 ? 2'd1 : - _guard480 ? 2'd0 : - _guard485 ? 2'd2 : + _guard459 ? 2'd1 : + _guard460 ? 2'd0 : + _guard465 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard498; -assign fsm2_clk = clk; +assign fsm2_write_en = _guard484; +assign fsm2_clk = ap_clk; assign fsm2_reset = reset; assign fsm2_in = - _guard503 ? 2'd1 : - _guard504 ? 2'd0 : - _guard509 ? 2'd2 : + _guard489 ? 2'd1 : + _guard490 ? 2'd0 : + _guard495 ? 2'd3 : + _guard500 ? 2'd2 : 2'd0; -assign invoke8_go_in = _guard515; +assign invoke8_go_in = _guard506; assign invoke10_done_in = ar_channel_Sum0_done; -assign tdcc0_go_in = _guard521; +assign tdcc0_go_in = _guard512; assign ar_channel_A0_curr_addr_axi_out = - _guard522 ? curr_addr_axi_A0_out : + _guard513 ? curr_addr_axi_A0_out : 64'd0; -assign ar_channel_A0_clk = clk; -assign ar_channel_A0_go = _guard523; +assign ar_channel_A0_clk = ap_clk; +assign ar_channel_A0_go = _guard514; assign ar_channel_A0_reset = reset; assign ar_channel_A0_ARREADY = - _guard524 ? A0_ARREADY : + _guard515 ? A0_ARREADY : 1'd0; assign ar_channel_A0_ARESETn = - _guard525 ? A0_ARESETn : + _guard516 ? A0_ARESETn : 1'd0; assign aw_channel_A0_curr_addr_axi_out = - _guard526 ? curr_addr_axi_A0_out : + _guard517 ? curr_addr_axi_A0_out : 64'd0; -assign aw_channel_A0_clk = clk; +assign aw_channel_A0_clk = ap_clk; assign aw_channel_A0_AWREADY = - _guard527 ? A0_AWREADY : + _guard518 ? A0_AWREADY : 1'd0; -assign aw_channel_A0_go = _guard528; +assign aw_channel_A0_go = _guard519; assign aw_channel_A0_reset = reset; assign aw_channel_A0_ARESETn = - _guard529 ? A0_ARESETn : + _guard520 ? A0_ARESETn : 1'd0; -assign par0_done_in = _guard534; +assign par0_done_in = _guard525; assign invoke8_done_in = ar_channel_B0_done; assign invoke12_done_in = main_compute_done; -assign invoke17_go_in = _guard540; -assign invoke21_go_in = _guard546; -assign adder0_left = - _guard547 ? fsm_out : - 1'd0; -assign adder0_right = _guard548; -assign pd2_write_en = _guard557; -assign pd2_clk = clk; +assign invoke17_go_in = _guard531; +assign invoke21_go_in = _guard537; +assign pd2_write_en = _guard546; +assign pd2_clk = ap_clk; assign pd2_reset = reset; assign pd2_in = - _guard560 ? 1'd1 : - _guard565 ? 1'd0 : + _guard549 ? 1'd1 : + _guard554 ? 1'd0 : 1'd0; -assign early_reset_static_par_done_in = ud_out; +assign wrapper_early_reset_static_par_thread0_go_in = _guard560; assign invoke6_done_in = ar_channel_A0_done; -assign invoke16_go_in = _guard571; +assign invoke16_go_in = _guard566; assign invoke19_done_in = aw_channel_B0_done; assign write_channel_A0_WREADY = - _guard572 ? A0_WREADY : + _guard567 ? A0_WREADY : 1'd0; assign write_channel_A0_curr_addr_internal_mem_out = - _guard573 ? curr_addr_internal_mem_A0_out : + _guard568 ? curr_addr_internal_mem_A0_out : 3'd0; assign write_channel_A0_curr_addr_axi_out = - _guard574 ? curr_addr_axi_A0_out : + _guard569 ? curr_addr_axi_A0_out : 64'd0; assign write_channel_A0_max_transfers_out = - _guard575 ? max_transfers_A0_out : + _guard570 ? max_transfers_A0_out : 8'd0; -assign write_channel_A0_clk = clk; +assign write_channel_A0_clk = ap_clk; assign write_channel_A0_mem_ref_read_data = - _guard576 ? internal_mem_A0_read_data : + _guard571 ? internal_mem_A0_read_data : 32'd0; -assign write_channel_A0_go = _guard577; +assign write_channel_A0_go = _guard572; assign write_channel_A0_reset = reset; assign write_channel_A0_ARESETn = - _guard578 ? A0_ARESETn : + _guard573 ? A0_ARESETn : 1'd0; assign write_channel_A0_curr_addr_internal_mem_done = - _guard579 ? curr_addr_internal_mem_A0_done : + _guard574 ? curr_addr_internal_mem_A0_done : 1'd0; assign write_channel_A0_curr_addr_axi_done = - _guard580 ? curr_addr_axi_A0_done : + _guard575 ? curr_addr_axi_A0_done : 1'd0; assign ar_channel_B0_curr_addr_axi_out = - _guard581 ? curr_addr_axi_B0_out : + _guard576 ? curr_addr_axi_B0_out : 64'd0; -assign ar_channel_B0_clk = clk; -assign ar_channel_B0_go = _guard582; +assign ar_channel_B0_clk = ap_clk; +assign ar_channel_B0_go = _guard577; assign ar_channel_B0_reset = reset; assign ar_channel_B0_ARREADY = - _guard583 ? B0_ARREADY : + _guard578 ? B0_ARREADY : 1'd0; assign ar_channel_B0_ARESETn = - _guard584 ? B0_ARESETn : + _guard579 ? B0_ARESETn : 1'd0; -assign signal_reg_write_en = _guard601; -assign signal_reg_clk = clk; +assign signal_reg_write_en = _guard587; +assign signal_reg_clk = ap_clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard614 ? 1'd1 : - _guard617 ? 1'd0 : + _guard593 ? 1'd1 : + _guard594 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread_go_in = _guard595; +assign wrapper_early_reset_static_par_thread0_done_in = _guard596; assign invoke24_done_in = bresp_channel_Sum0_done; -assign tdcc1_done_in = _guard618; -assign par1_done_in = _guard623; -assign bresp_channel_B0_clk = clk; -assign bresp_channel_B0_go = _guard624; +assign tdcc1_done_in = _guard597; +assign par1_done_in = _guard602; +assign bresp_channel_B0_clk = ap_clk; +assign bresp_channel_B0_go = _guard603; assign bresp_channel_B0_reset = reset; assign bresp_channel_B0_BVALID = - _guard625 ? B0_BVALID : + _guard604 ? B0_BVALID : 1'd0; assign internal_mem_Sum0_write_en = - _guard626 ? read_channel_Sum0_mem_ref_write_en : - _guard627 ? main_compute_Sum0_write_en : - _guard628 ? write_channel_Sum0_mem_ref_write_en : + _guard605 ? read_channel_Sum0_mem_ref_write_en : + _guard606 ? main_compute_Sum0_write_en : + _guard607 ? write_channel_Sum0_mem_ref_write_en : 1'd0; -assign internal_mem_Sum0_clk = clk; +assign internal_mem_Sum0_clk = ap_clk; assign internal_mem_Sum0_addr0 = - _guard629 ? read_channel_Sum0_mem_ref_addr0 : - _guard630 ? main_compute_Sum0_addr0 : - _guard631 ? write_channel_Sum0_mem_ref_addr0 : + _guard608 ? read_channel_Sum0_mem_ref_addr0 : + _guard609 ? main_compute_Sum0_addr0 : + _guard610 ? write_channel_Sum0_mem_ref_addr0 : 'x; assign internal_mem_Sum0_content_en = - _guard632 ? read_channel_Sum0_mem_ref_content_en : - _guard633 ? main_compute_Sum0_content_en : - _guard634 ? write_channel_Sum0_mem_ref_content_en : + _guard611 ? read_channel_Sum0_mem_ref_content_en : + _guard612 ? main_compute_Sum0_content_en : + _guard613 ? write_channel_Sum0_mem_ref_content_en : 1'd0; assign internal_mem_Sum0_reset = reset; assign internal_mem_Sum0_write_data = - _guard635 ? read_channel_Sum0_mem_ref_write_data : - _guard636 ? main_compute_Sum0_write_data : + _guard614 ? read_channel_Sum0_mem_ref_write_data : + _guard615 ? main_compute_Sum0_write_data : 'x; -assign pd_write_en = _guard645; -assign pd_clk = clk; +assign pd_write_en = _guard624; +assign pd_clk = ap_clk; assign pd_reset = reset; assign pd_in = - _guard648 ? 1'd1 : - _guard653 ? 1'd0 : + _guard627 ? 1'd1 : + _guard632 ? 1'd0 : 1'd0; -assign pd0_write_en = _guard662; -assign pd0_clk = clk; +assign pd0_write_en = _guard641; +assign pd0_clk = ap_clk; assign pd0_reset = reset; assign pd0_in = - _guard665 ? 1'd1 : - _guard670 ? 1'd0 : + _guard644 ? 1'd1 : + _guard649 ? 1'd0 : 1'd0; -assign pd4_write_en = _guard679; -assign pd4_clk = clk; +assign pd4_write_en = _guard658; +assign pd4_clk = ap_clk; assign pd4_reset = reset; assign pd4_in = - _guard682 ? 1'd1 : - _guard687 ? 1'd0 : + _guard661 ? 1'd1 : + _guard666 ? 1'd0 : 1'd0; +assign early_reset_static_par_thread0_go_in = _guard667; +assign wrapper_early_reset_static_par_thread_done_in = _guard668; assign invoke22_done_in = aw_channel_Sum0_done; -assign tdcc4_go_in = _guard693; -assign bresp_channel_A0_clk = clk; -assign bresp_channel_A0_go = _guard694; +assign tdcc4_go_in = _guard674; +assign bresp_channel_A0_clk = ap_clk; +assign bresp_channel_A0_go = _guard675; assign bresp_channel_A0_reset = reset; assign bresp_channel_A0_BVALID = - _guard695 ? A0_BVALID : + _guard676 ? A0_BVALID : 1'd0; -assign wrapper_early_reset_static_par0_go_in = _guard701; -assign wrapper_early_reset_static_par0_done_in = _guard704; -assign tdcc_done_in = _guard705; +assign tdcc_done_in = _guard677; assign invoke17_done_in = write_channel_A0_done; -assign invoke19_go_in = _guard711; -assign invoke20_go_in = _guard717; +assign invoke19_go_in = _guard683; +assign invoke20_go_in = _guard689; assign invoke21_done_in = bresp_channel_B0_done; assign max_transfers_A0_write_en = - _guard718 ? aw_channel_A0_max_transfers_write_en : + _guard690 ? aw_channel_A0_max_transfers_write_en : 1'd0; -assign max_transfers_A0_clk = clk; +assign max_transfers_A0_clk = ap_clk; assign max_transfers_A0_reset = reset; assign max_transfers_A0_in = aw_channel_A0_max_transfers_in; assign aw_channel_Sum0_curr_addr_axi_out = - _guard720 ? curr_addr_axi_Sum0_out : + _guard692 ? curr_addr_axi_Sum0_out : 64'd0; -assign aw_channel_Sum0_clk = clk; +assign aw_channel_Sum0_clk = ap_clk; assign aw_channel_Sum0_AWREADY = - _guard721 ? Sum0_AWREADY : + _guard693 ? Sum0_AWREADY : 1'd0; -assign aw_channel_Sum0_go = _guard722; +assign aw_channel_Sum0_go = _guard694; assign aw_channel_Sum0_reset = reset; assign aw_channel_Sum0_ARESETn = - _guard723 ? Sum0_ARESETn : + _guard695 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_WREADY = - _guard724 ? Sum0_WREADY : + _guard696 ? Sum0_WREADY : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_out = - _guard725 ? curr_addr_internal_mem_Sum0_out : + _guard697 ? curr_addr_internal_mem_Sum0_out : 3'd0; assign write_channel_Sum0_curr_addr_axi_out = - _guard726 ? curr_addr_axi_Sum0_out : + _guard698 ? curr_addr_axi_Sum0_out : 64'd0; assign write_channel_Sum0_max_transfers_out = - _guard727 ? max_transfers_Sum0_out : + _guard699 ? max_transfers_Sum0_out : 8'd0; -assign write_channel_Sum0_clk = clk; +assign write_channel_Sum0_clk = ap_clk; assign write_channel_Sum0_mem_ref_read_data = - _guard728 ? internal_mem_Sum0_read_data : + _guard700 ? internal_mem_Sum0_read_data : 32'd0; -assign write_channel_Sum0_go = _guard729; +assign write_channel_Sum0_go = _guard701; assign write_channel_Sum0_reset = reset; assign write_channel_Sum0_ARESETn = - _guard730 ? Sum0_ARESETn : + _guard702 ? Sum0_ARESETn : 1'd0; assign write_channel_Sum0_curr_addr_internal_mem_done = - _guard731 ? curr_addr_internal_mem_Sum0_done : + _guard703 ? curr_addr_internal_mem_Sum0_done : 1'd0; assign write_channel_Sum0_curr_addr_axi_done = - _guard732 ? curr_addr_axi_Sum0_done : + _guard704 ? curr_addr_axi_Sum0_done : 1'd0; -assign pd3_write_en = _guard741; -assign pd3_clk = clk; +assign pd3_write_en = _guard713; +assign pd3_clk = ap_clk; assign pd3_reset = reset; assign pd3_in = - _guard744 ? 1'd1 : - _guard749 ? 1'd0 : + _guard716 ? 1'd1 : + _guard721 ? 1'd0 : 1'd0; -assign early_reset_static_par_go_in = _guard750; -assign tdcc4_done_in = _guard751; +assign tdcc4_done_in = _guard722; assign max_transfers_B0_write_en = - _guard752 ? aw_channel_B0_max_transfers_write_en : + _guard723 ? aw_channel_B0_max_transfers_write_en : 1'd0; -assign max_transfers_B0_clk = clk; +assign max_transfers_B0_clk = ap_clk; assign max_transfers_B0_reset = reset; assign max_transfers_B0_in = aw_channel_B0_max_transfers_in; assign curr_addr_internal_mem_Sum0_write_en = - _guard754 ? read_channel_Sum0_curr_addr_internal_mem_write_en : - _guard755 ? 1'd1 : - _guard756 ? write_channel_Sum0_curr_addr_internal_mem_write_en : + _guard725 ? read_channel_Sum0_curr_addr_internal_mem_write_en : + _guard726 ? 1'd1 : + _guard727 ? write_channel_Sum0_curr_addr_internal_mem_write_en : 1'd0; -assign curr_addr_internal_mem_Sum0_clk = clk; +assign curr_addr_internal_mem_Sum0_clk = ap_clk; assign curr_addr_internal_mem_Sum0_reset = reset; assign curr_addr_internal_mem_Sum0_in = - _guard757 ? read_channel_Sum0_curr_addr_internal_mem_in : - _guard758 ? write_channel_Sum0_curr_addr_internal_mem_in : - _guard759 ? 3'd0 : + _guard728 ? read_channel_Sum0_curr_addr_internal_mem_in : + _guard729 ? write_channel_Sum0_curr_addr_internal_mem_in : + _guard730 ? 3'd0 : 'x; -assign invoke6_go_in = _guard765; -assign invoke24_go_in = _guard771; -assign tdcc1_go_in = _guard777; -assign par0_go_in = _guard783; -assign invoke7_go_in = _guard789; -assign invoke10_go_in = _guard795; -assign invoke22_go_in = _guard801; +assign early_reset_static_par_thread_done_in = ud_out; +assign invoke6_go_in = _guard736; +assign invoke24_go_in = _guard742; +assign tdcc1_go_in = _guard748; +assign par0_go_in = _guard754; +assign invoke7_go_in = _guard760; +assign invoke10_go_in = _guard766; +assign invoke22_go_in = _guard772; assign tdcc5_go_in = go; -assign tdcc5_done_in = _guard802; +assign tdcc5_done_in = _guard773; // COMPONENT END: wrapper endmodule module main( @@ -8085,52 +7906,43 @@ logic comb_reg_clk; logic comb_reg_reset; logic comb_reg_out; logic comb_reg_done; -logic fsm_in; -logic fsm_write_en; -logic fsm_clk; -logic fsm_reset; -logic fsm_out; -logic fsm_done; -logic adder_left; -logic adder_right; -logic adder_out; -logic ud_out; +logic ud0_out; logic signal_reg_in; logic signal_reg_write_en; logic signal_reg_clk; logic signal_reg_reset; logic signal_reg_out; logic signal_reg_done; -logic [1:0] fsm0_in; -logic fsm0_write_en; -logic fsm0_clk; -logic fsm0_reset; -logic [1:0] fsm0_out; -logic fsm0_done; +logic [1:0] fsm_in; +logic fsm_write_en; +logic fsm_clk; +logic fsm_reset; +logic [1:0] fsm_out; +logic fsm_done; logic pd_in; logic pd_write_en; logic pd_clk; logic pd_reset; logic pd_out; logic pd_done; -logic [1:0] fsm1_in; -logic fsm1_write_en; -logic fsm1_clk; -logic fsm1_reset; -logic [1:0] fsm1_out; -logic fsm1_done; +logic [1:0] fsm0_in; +logic fsm0_write_en; +logic fsm0_clk; +logic fsm0_reset; +logic [1:0] fsm0_out; +logic fsm0_done; logic pd0_in; logic pd0_write_en; logic pd0_clk; logic pd0_reset; logic pd0_out; logic pd0_done; -logic [2:0] fsm2_in; -logic fsm2_write_en; -logic fsm2_clk; -logic fsm2_reset; -logic [2:0] fsm2_out; -logic fsm2_done; +logic [2:0] fsm1_in; +logic fsm1_write_en; +logic fsm1_clk; +logic fsm1_reset; +logic [2:0] fsm1_out; +logic fsm1_done; logic beg_spl_upd0_go_in; logic beg_spl_upd0_go_out; logic beg_spl_upd0_done_in; @@ -8159,14 +7971,14 @@ logic invoke3_go_in; logic invoke3_go_out; logic invoke3_done_in; logic invoke3_done_out; -logic early_reset_cond00_go_in; -logic early_reset_cond00_go_out; -logic early_reset_cond00_done_in; -logic early_reset_cond00_done_out; -logic wrapper_early_reset_cond00_go_in; -logic wrapper_early_reset_cond00_go_out; -logic wrapper_early_reset_cond00_done_in; -logic wrapper_early_reset_cond00_done_out; +logic early_reset_cond000_go_in; +logic early_reset_cond000_go_out; +logic early_reset_cond000_done_in; +logic early_reset_cond000_done_out; +logic wrapper_early_reset_cond000_go_in; +logic wrapper_early_reset_cond000_go_out; +logic wrapper_early_reset_cond000_done_in; +logic wrapper_early_reset_cond000_done_out; logic par0_go_in; logic par0_go_out; logic par0_done_in; @@ -8271,27 +8083,10 @@ std_reg # ( .reset(comb_reg_reset), .write_en(comb_reg_write_en) ); -std_reg # ( - .WIDTH(1) -) fsm ( - .clk(fsm_clk), - .done(fsm_done), - .in(fsm_in), - .out(fsm_out), - .reset(fsm_reset), - .write_en(fsm_write_en) -); -std_add # ( - .WIDTH(1) -) adder ( - .left(adder_left), - .out(adder_out), - .right(adder_right) -); undef # ( .WIDTH(1) -) ud ( - .out(ud_out) +) ud0 ( + .out(ud0_out) ); std_reg # ( .WIDTH(1) @@ -8305,13 +8100,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm0 ( - .clk(fsm0_clk), - .done(fsm0_done), - .in(fsm0_in), - .out(fsm0_out), - .reset(fsm0_reset), - .write_en(fsm0_write_en) +) fsm ( + .clk(fsm_clk), + .done(fsm_done), + .in(fsm_in), + .out(fsm_out), + .reset(fsm_reset), + .write_en(fsm_write_en) ); std_reg # ( .WIDTH(1) @@ -8325,13 +8120,13 @@ std_reg # ( ); std_reg # ( .WIDTH(2) -) fsm1 ( - .clk(fsm1_clk), - .done(fsm1_done), - .in(fsm1_in), - .out(fsm1_out), - .reset(fsm1_reset), - .write_en(fsm1_write_en) +) fsm0 ( + .clk(fsm0_clk), + .done(fsm0_done), + .in(fsm0_in), + .out(fsm0_out), + .reset(fsm0_reset), + .write_en(fsm0_write_en) ); std_reg # ( .WIDTH(1) @@ -8345,13 +8140,13 @@ std_reg # ( ); std_reg # ( .WIDTH(3) -) fsm2 ( - .clk(fsm2_clk), - .done(fsm2_done), - .in(fsm2_in), - .out(fsm2_out), - .reset(fsm2_reset), - .write_en(fsm2_write_en) +) fsm1 ( + .clk(fsm1_clk), + .done(fsm1_done), + .in(fsm1_in), + .out(fsm1_out), + .reset(fsm1_reset), + .write_en(fsm1_write_en) ); std_wire # ( .WIDTH(1) @@ -8439,27 +8234,27 @@ std_wire # ( ); std_wire # ( .WIDTH(1) -) early_reset_cond00_go ( - .in(early_reset_cond00_go_in), - .out(early_reset_cond00_go_out) +) early_reset_cond000_go ( + .in(early_reset_cond000_go_in), + .out(early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) early_reset_cond00_done ( - .in(early_reset_cond00_done_in), - .out(early_reset_cond00_done_out) +) early_reset_cond000_done ( + .in(early_reset_cond000_done_in), + .out(early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_go ( - .in(wrapper_early_reset_cond00_go_in), - .out(wrapper_early_reset_cond00_go_out) +) wrapper_early_reset_cond000_go ( + .in(wrapper_early_reset_cond000_go_in), + .out(wrapper_early_reset_cond000_go_out) ); std_wire # ( .WIDTH(1) -) wrapper_early_reset_cond00_done ( - .in(wrapper_early_reset_cond00_done_in), - .out(wrapper_early_reset_cond00_done_out) +) wrapper_early_reset_cond000_done ( + .in(wrapper_early_reset_cond000_done_in), + .out(wrapper_early_reset_cond000_done_out) ); std_wire # ( .WIDTH(1) @@ -8515,268 +8310,268 @@ wire _guard2 = invoke3_go_out; wire _guard3 = _guard1 | _guard2; wire _guard4 = invoke3_go_out; wire _guard5 = invoke0_go_out; -wire _guard6 = wrapper_early_reset_cond00_go_out; +wire _guard6 = invoke3_go_out; wire _guard7 = invoke3_go_out; -wire _guard8 = invoke3_go_out; -wire _guard9 = tdcc1_done_out; -wire _guard10 = upd2_go_out; -wire _guard11 = beg_spl_upd1_go_out; -wire _guard12 = upd2_go_out; -wire _guard13 = _guard11 | _guard12; -wire _guard14 = beg_spl_upd1_go_out; -wire _guard15 = upd2_go_out; -wire _guard16 = _guard14 | _guard15; -wire _guard17 = beg_spl_upd0_go_out; -wire _guard18 = upd2_go_out; -wire _guard19 = _guard17 | _guard18; +wire _guard8 = tdcc1_done_out; +wire _guard9 = upd2_go_out; +wire _guard10 = beg_spl_upd1_go_out; +wire _guard11 = upd2_go_out; +wire _guard12 = _guard10 | _guard11; +wire _guard13 = beg_spl_upd1_go_out; +wire _guard14 = upd2_go_out; +wire _guard15 = _guard13 | _guard14; +wire _guard16 = beg_spl_upd0_go_out; +wire _guard17 = upd2_go_out; +wire _guard18 = _guard16 | _guard17; +wire _guard19 = upd2_go_out; wire _guard20 = upd2_go_out; wire _guard21 = upd2_go_out; -wire _guard22 = upd2_go_out; -wire _guard23 = beg_spl_upd0_go_out; -wire _guard24 = upd2_go_out; -wire _guard25 = _guard23 | _guard24; -wire _guard26 = early_reset_cond00_go_out; -wire _guard27 = fsm_out == 1'd0; -wire _guard28 = ~_guard27; -wire _guard29 = early_reset_cond00_go_out; +wire _guard22 = beg_spl_upd0_go_out; +wire _guard23 = upd2_go_out; +wire _guard24 = _guard22 | _guard23; +wire _guard25 = fsm_out == 2'd2; +wire _guard26 = fsm_out == 2'd0; +wire _guard27 = beg_spl_upd0_done_out; +wire _guard28 = _guard26 & _guard27; +wire _guard29 = tdcc_go_out; wire _guard30 = _guard28 & _guard29; -wire _guard31 = fsm_out == 1'd0; -wire _guard32 = early_reset_cond00_go_out; -wire _guard33 = _guard31 & _guard32; -wire _guard34 = early_reset_cond00_go_out; -wire _guard35 = early_reset_cond00_go_out; -wire _guard36 = beg_spl_upd0_done_out; -wire _guard37 = ~_guard36; -wire _guard38 = fsm0_out == 2'd0; -wire _guard39 = _guard37 & _guard38; -wire _guard40 = tdcc_go_out; -wire _guard41 = _guard39 & _guard40; -wire _guard42 = upd2_go_out; -wire _guard43 = upd2_go_out; -wire _guard44 = invoke2_done_out; -wire _guard45 = ~_guard44; -wire _guard46 = fsm1_out == 2'd1; -wire _guard47 = _guard45 & _guard46; -wire _guard48 = tdcc0_go_out; -wire _guard49 = _guard47 & _guard48; -wire _guard50 = fsm1_out == 2'd2; -wire _guard51 = early_reset_cond00_go_out; -wire _guard52 = early_reset_cond00_go_out; -wire _guard53 = fsm1_out == 2'd2; -wire _guard54 = fsm1_out == 2'd0; -wire _guard55 = beg_spl_upd1_done_out; -wire _guard56 = _guard54 & _guard55; -wire _guard57 = tdcc0_go_out; -wire _guard58 = _guard56 & _guard57; -wire _guard59 = _guard53 | _guard58; -wire _guard60 = fsm1_out == 2'd1; -wire _guard61 = invoke2_done_out; +wire _guard31 = _guard25 | _guard30; +wire _guard32 = fsm_out == 2'd1; +wire _guard33 = invoke1_done_out; +wire _guard34 = _guard32 & _guard33; +wire _guard35 = tdcc_go_out; +wire _guard36 = _guard34 & _guard35; +wire _guard37 = _guard31 | _guard36; +wire _guard38 = fsm_out == 2'd0; +wire _guard39 = beg_spl_upd0_done_out; +wire _guard40 = _guard38 & _guard39; +wire _guard41 = tdcc_go_out; +wire _guard42 = _guard40 & _guard41; +wire _guard43 = fsm_out == 2'd2; +wire _guard44 = fsm_out == 2'd1; +wire _guard45 = invoke1_done_out; +wire _guard46 = _guard44 & _guard45; +wire _guard47 = tdcc_go_out; +wire _guard48 = _guard46 & _guard47; +wire _guard49 = beg_spl_upd0_done_out; +wire _guard50 = ~_guard49; +wire _guard51 = fsm_out == 2'd0; +wire _guard52 = _guard50 & _guard51; +wire _guard53 = tdcc_go_out; +wire _guard54 = _guard52 & _guard53; +wire _guard55 = upd2_go_out; +wire _guard56 = upd2_go_out; +wire _guard57 = invoke2_done_out; +wire _guard58 = ~_guard57; +wire _guard59 = fsm0_out == 2'd1; +wire _guard60 = _guard58 & _guard59; +wire _guard61 = tdcc0_go_out; wire _guard62 = _guard60 & _guard61; -wire _guard63 = tdcc0_go_out; -wire _guard64 = _guard62 & _guard63; -wire _guard65 = _guard59 | _guard64; -wire _guard66 = fsm1_out == 2'd0; -wire _guard67 = beg_spl_upd1_done_out; -wire _guard68 = _guard66 & _guard67; -wire _guard69 = tdcc0_go_out; -wire _guard70 = _guard68 & _guard69; -wire _guard71 = fsm1_out == 2'd2; -wire _guard72 = fsm1_out == 2'd1; -wire _guard73 = invoke2_done_out; -wire _guard74 = _guard72 & _guard73; -wire _guard75 = tdcc0_go_out; -wire _guard76 = _guard74 & _guard75; -wire _guard77 = pd_out; -wire _guard78 = tdcc_done_out; -wire _guard79 = _guard77 | _guard78; -wire _guard80 = ~_guard79; -wire _guard81 = par0_go_out; +wire _guard63 = fsm0_out == 2'd2; +wire _guard64 = early_reset_cond000_go_out; +wire _guard65 = early_reset_cond000_go_out; +wire _guard66 = wrapper_early_reset_cond000_done_out; +wire _guard67 = ~_guard66; +wire _guard68 = fsm1_out == 3'd1; +wire _guard69 = _guard67 & _guard68; +wire _guard70 = tdcc1_go_out; +wire _guard71 = _guard69 & _guard70; +wire _guard72 = wrapper_early_reset_cond000_done_out; +wire _guard73 = ~_guard72; +wire _guard74 = fsm1_out == 3'd5; +wire _guard75 = _guard73 & _guard74; +wire _guard76 = tdcc1_go_out; +wire _guard77 = _guard75 & _guard76; +wire _guard78 = _guard71 | _guard77; +wire _guard79 = fsm1_out == 3'd6; +wire _guard80 = fsm1_out == 3'd0; +wire _guard81 = invoke0_done_out; wire _guard82 = _guard80 & _guard81; -wire _guard83 = invoke0_done_out; -wire _guard84 = ~_guard83; -wire _guard85 = fsm2_out == 3'd0; -wire _guard86 = _guard84 & _guard85; -wire _guard87 = tdcc1_go_out; -wire _guard88 = _guard86 & _guard87; -wire _guard89 = fsm0_out == 2'd2; -wire _guard90 = fsm0_out == 2'd0; -wire _guard91 = beg_spl_upd0_done_out; +wire _guard83 = tdcc1_go_out; +wire _guard84 = _guard82 & _guard83; +wire _guard85 = _guard79 | _guard84; +wire _guard86 = fsm1_out == 3'd1; +wire _guard87 = wrapper_early_reset_cond000_done_out; +wire _guard88 = comb_reg_out; +wire _guard89 = _guard87 & _guard88; +wire _guard90 = _guard86 & _guard89; +wire _guard91 = tdcc1_go_out; wire _guard92 = _guard90 & _guard91; -wire _guard93 = tdcc_go_out; -wire _guard94 = _guard92 & _guard93; -wire _guard95 = _guard89 | _guard94; -wire _guard96 = fsm0_out == 2'd1; -wire _guard97 = invoke1_done_out; -wire _guard98 = _guard96 & _guard97; -wire _guard99 = tdcc_go_out; +wire _guard93 = _guard85 | _guard92; +wire _guard94 = fsm1_out == 3'd5; +wire _guard95 = wrapper_early_reset_cond000_done_out; +wire _guard96 = comb_reg_out; +wire _guard97 = _guard95 & _guard96; +wire _guard98 = _guard94 & _guard97; +wire _guard99 = tdcc1_go_out; wire _guard100 = _guard98 & _guard99; -wire _guard101 = _guard95 | _guard100; -wire _guard102 = fsm0_out == 2'd0; -wire _guard103 = beg_spl_upd0_done_out; +wire _guard101 = _guard93 | _guard100; +wire _guard102 = fsm1_out == 3'd2; +wire _guard103 = par0_done_out; wire _guard104 = _guard102 & _guard103; -wire _guard105 = tdcc_go_out; +wire _guard105 = tdcc1_go_out; wire _guard106 = _guard104 & _guard105; -wire _guard107 = fsm0_out == 2'd2; -wire _guard108 = fsm0_out == 2'd1; -wire _guard109 = invoke1_done_out; +wire _guard107 = _guard101 | _guard106; +wire _guard108 = fsm1_out == 3'd3; +wire _guard109 = upd2_done_out; wire _guard110 = _guard108 & _guard109; -wire _guard111 = tdcc_go_out; +wire _guard111 = tdcc1_go_out; wire _guard112 = _guard110 & _guard111; -wire _guard113 = fsm2_out == 3'd6; -wire _guard114 = fsm2_out == 3'd0; -wire _guard115 = invoke0_done_out; +wire _guard113 = _guard107 | _guard112; +wire _guard114 = fsm1_out == 3'd4; +wire _guard115 = invoke3_done_out; wire _guard116 = _guard114 & _guard115; wire _guard117 = tdcc1_go_out; wire _guard118 = _guard116 & _guard117; wire _guard119 = _guard113 | _guard118; -wire _guard120 = fsm2_out == 3'd1; -wire _guard121 = wrapper_early_reset_cond00_done_out; +wire _guard120 = fsm1_out == 3'd1; +wire _guard121 = wrapper_early_reset_cond000_done_out; wire _guard122 = comb_reg_out; -wire _guard123 = _guard121 & _guard122; -wire _guard124 = _guard120 & _guard123; -wire _guard125 = tdcc1_go_out; -wire _guard126 = _guard124 & _guard125; -wire _guard127 = _guard119 | _guard126; -wire _guard128 = fsm2_out == 3'd5; -wire _guard129 = wrapper_early_reset_cond00_done_out; -wire _guard130 = comb_reg_out; -wire _guard131 = _guard129 & _guard130; -wire _guard132 = _guard128 & _guard131; -wire _guard133 = tdcc1_go_out; -wire _guard134 = _guard132 & _guard133; -wire _guard135 = _guard127 | _guard134; -wire _guard136 = fsm2_out == 3'd2; -wire _guard137 = par0_done_out; -wire _guard138 = _guard136 & _guard137; -wire _guard139 = tdcc1_go_out; -wire _guard140 = _guard138 & _guard139; -wire _guard141 = _guard135 | _guard140; -wire _guard142 = fsm2_out == 3'd3; -wire _guard143 = upd2_done_out; -wire _guard144 = _guard142 & _guard143; -wire _guard145 = tdcc1_go_out; -wire _guard146 = _guard144 & _guard145; -wire _guard147 = _guard141 | _guard146; -wire _guard148 = fsm2_out == 3'd4; -wire _guard149 = invoke3_done_out; -wire _guard150 = _guard148 & _guard149; -wire _guard151 = tdcc1_go_out; -wire _guard152 = _guard150 & _guard151; -wire _guard153 = _guard147 | _guard152; -wire _guard154 = fsm2_out == 3'd1; -wire _guard155 = wrapper_early_reset_cond00_done_out; -wire _guard156 = comb_reg_out; -wire _guard157 = ~_guard156; -wire _guard158 = _guard155 & _guard157; -wire _guard159 = _guard154 & _guard158; -wire _guard160 = tdcc1_go_out; -wire _guard161 = _guard159 & _guard160; -wire _guard162 = _guard153 | _guard161; -wire _guard163 = fsm2_out == 3'd5; -wire _guard164 = wrapper_early_reset_cond00_done_out; -wire _guard165 = comb_reg_out; -wire _guard166 = ~_guard165; -wire _guard167 = _guard164 & _guard166; -wire _guard168 = _guard163 & _guard167; -wire _guard169 = tdcc1_go_out; +wire _guard123 = ~_guard122; +wire _guard124 = _guard121 & _guard123; +wire _guard125 = _guard120 & _guard124; +wire _guard126 = tdcc1_go_out; +wire _guard127 = _guard125 & _guard126; +wire _guard128 = _guard119 | _guard127; +wire _guard129 = fsm1_out == 3'd5; +wire _guard130 = wrapper_early_reset_cond000_done_out; +wire _guard131 = comb_reg_out; +wire _guard132 = ~_guard131; +wire _guard133 = _guard130 & _guard132; +wire _guard134 = _guard129 & _guard133; +wire _guard135 = tdcc1_go_out; +wire _guard136 = _guard134 & _guard135; +wire _guard137 = _guard128 | _guard136; +wire _guard138 = fsm1_out == 3'd1; +wire _guard139 = wrapper_early_reset_cond000_done_out; +wire _guard140 = comb_reg_out; +wire _guard141 = ~_guard140; +wire _guard142 = _guard139 & _guard141; +wire _guard143 = _guard138 & _guard142; +wire _guard144 = tdcc1_go_out; +wire _guard145 = _guard143 & _guard144; +wire _guard146 = fsm1_out == 3'd5; +wire _guard147 = wrapper_early_reset_cond000_done_out; +wire _guard148 = comb_reg_out; +wire _guard149 = ~_guard148; +wire _guard150 = _guard147 & _guard149; +wire _guard151 = _guard146 & _guard150; +wire _guard152 = tdcc1_go_out; +wire _guard153 = _guard151 & _guard152; +wire _guard154 = _guard145 | _guard153; +wire _guard155 = fsm1_out == 3'd4; +wire _guard156 = invoke3_done_out; +wire _guard157 = _guard155 & _guard156; +wire _guard158 = tdcc1_go_out; +wire _guard159 = _guard157 & _guard158; +wire _guard160 = fsm1_out == 3'd1; +wire _guard161 = wrapper_early_reset_cond000_done_out; +wire _guard162 = comb_reg_out; +wire _guard163 = _guard161 & _guard162; +wire _guard164 = _guard160 & _guard163; +wire _guard165 = tdcc1_go_out; +wire _guard166 = _guard164 & _guard165; +wire _guard167 = fsm1_out == 3'd5; +wire _guard168 = wrapper_early_reset_cond000_done_out; +wire _guard169 = comb_reg_out; wire _guard170 = _guard168 & _guard169; -wire _guard171 = _guard162 | _guard170; -wire _guard172 = fsm2_out == 3'd1; -wire _guard173 = wrapper_early_reset_cond00_done_out; -wire _guard174 = comb_reg_out; -wire _guard175 = ~_guard174; -wire _guard176 = _guard173 & _guard175; -wire _guard177 = _guard172 & _guard176; +wire _guard171 = _guard167 & _guard170; +wire _guard172 = tdcc1_go_out; +wire _guard173 = _guard171 & _guard172; +wire _guard174 = _guard166 | _guard173; +wire _guard175 = fsm1_out == 3'd3; +wire _guard176 = upd2_done_out; +wire _guard177 = _guard175 & _guard176; wire _guard178 = tdcc1_go_out; wire _guard179 = _guard177 & _guard178; -wire _guard180 = fsm2_out == 3'd5; -wire _guard181 = wrapper_early_reset_cond00_done_out; -wire _guard182 = comb_reg_out; -wire _guard183 = ~_guard182; -wire _guard184 = _guard181 & _guard183; -wire _guard185 = _guard180 & _guard184; -wire _guard186 = tdcc1_go_out; -wire _guard187 = _guard185 & _guard186; -wire _guard188 = _guard179 | _guard187; -wire _guard189 = fsm2_out == 3'd4; -wire _guard190 = invoke3_done_out; -wire _guard191 = _guard189 & _guard190; -wire _guard192 = tdcc1_go_out; -wire _guard193 = _guard191 & _guard192; -wire _guard194 = fsm2_out == 3'd1; -wire _guard195 = wrapper_early_reset_cond00_done_out; -wire _guard196 = comb_reg_out; -wire _guard197 = _guard195 & _guard196; -wire _guard198 = _guard194 & _guard197; -wire _guard199 = tdcc1_go_out; +wire _guard180 = fsm1_out == 3'd0; +wire _guard181 = invoke0_done_out; +wire _guard182 = _guard180 & _guard181; +wire _guard183 = tdcc1_go_out; +wire _guard184 = _guard182 & _guard183; +wire _guard185 = fsm1_out == 3'd6; +wire _guard186 = fsm1_out == 3'd2; +wire _guard187 = par0_done_out; +wire _guard188 = _guard186 & _guard187; +wire _guard189 = tdcc1_go_out; +wire _guard190 = _guard188 & _guard189; +wire _guard191 = pd_out; +wire _guard192 = tdcc_done_out; +wire _guard193 = _guard191 | _guard192; +wire _guard194 = ~_guard193; +wire _guard195 = par0_go_out; +wire _guard196 = _guard194 & _guard195; +wire _guard197 = invoke0_done_out; +wire _guard198 = ~_guard197; +wire _guard199 = fsm1_out == 3'd0; wire _guard200 = _guard198 & _guard199; -wire _guard201 = fsm2_out == 3'd5; -wire _guard202 = wrapper_early_reset_cond00_done_out; -wire _guard203 = comb_reg_out; -wire _guard204 = _guard202 & _guard203; -wire _guard205 = _guard201 & _guard204; -wire _guard206 = tdcc1_go_out; -wire _guard207 = _guard205 & _guard206; -wire _guard208 = _guard200 | _guard207; -wire _guard209 = fsm2_out == 3'd3; -wire _guard210 = upd2_done_out; -wire _guard211 = _guard209 & _guard210; -wire _guard212 = tdcc1_go_out; -wire _guard213 = _guard211 & _guard212; -wire _guard214 = fsm2_out == 3'd0; -wire _guard215 = invoke0_done_out; -wire _guard216 = _guard214 & _guard215; -wire _guard217 = tdcc1_go_out; +wire _guard201 = tdcc1_go_out; +wire _guard202 = _guard200 & _guard201; +wire _guard203 = fsm0_out == 2'd2; +wire _guard204 = fsm0_out == 2'd0; +wire _guard205 = beg_spl_upd1_done_out; +wire _guard206 = _guard204 & _guard205; +wire _guard207 = tdcc0_go_out; +wire _guard208 = _guard206 & _guard207; +wire _guard209 = _guard203 | _guard208; +wire _guard210 = fsm0_out == 2'd1; +wire _guard211 = invoke2_done_out; +wire _guard212 = _guard210 & _guard211; +wire _guard213 = tdcc0_go_out; +wire _guard214 = _guard212 & _guard213; +wire _guard215 = _guard209 | _guard214; +wire _guard216 = fsm0_out == 2'd0; +wire _guard217 = beg_spl_upd1_done_out; wire _guard218 = _guard216 & _guard217; -wire _guard219 = fsm2_out == 3'd6; -wire _guard220 = fsm2_out == 3'd2; -wire _guard221 = par0_done_out; -wire _guard222 = _guard220 & _guard221; -wire _guard223 = tdcc1_go_out; +wire _guard219 = tdcc0_go_out; +wire _guard220 = _guard218 & _guard219; +wire _guard221 = fsm0_out == 2'd2; +wire _guard222 = fsm0_out == 2'd1; +wire _guard223 = invoke2_done_out; wire _guard224 = _guard222 & _guard223; -wire _guard225 = pd0_out; -wire _guard226 = tdcc0_done_out; -wire _guard227 = _guard225 | _guard226; -wire _guard228 = ~_guard227; -wire _guard229 = par0_go_out; -wire _guard230 = _guard228 & _guard229; -wire _guard231 = pd_out; -wire _guard232 = pd0_out; -wire _guard233 = _guard231 & _guard232; -wire _guard234 = invoke1_done_out; -wire _guard235 = ~_guard234; -wire _guard236 = fsm0_out == 2'd1; -wire _guard237 = _guard235 & _guard236; -wire _guard238 = tdcc_go_out; -wire _guard239 = _guard237 & _guard238; -wire _guard240 = beg_spl_upd1_done_out; -wire _guard241 = ~_guard240; -wire _guard242 = fsm1_out == 2'd0; -wire _guard243 = _guard241 & _guard242; -wire _guard244 = tdcc0_go_out; -wire _guard245 = _guard243 & _guard244; -wire _guard246 = early_reset_cond00_go_out; -wire _guard247 = early_reset_cond00_go_out; -wire _guard248 = fsm_out == 1'd0; +wire _guard225 = tdcc0_go_out; +wire _guard226 = _guard224 & _guard225; +wire _guard227 = pd0_out; +wire _guard228 = tdcc0_done_out; +wire _guard229 = _guard227 | _guard228; +wire _guard230 = ~_guard229; +wire _guard231 = par0_go_out; +wire _guard232 = _guard230 & _guard231; +wire _guard233 = wrapper_early_reset_cond000_go_out; +wire _guard234 = pd_out; +wire _guard235 = pd0_out; +wire _guard236 = _guard234 & _guard235; +wire _guard237 = invoke1_done_out; +wire _guard238 = ~_guard237; +wire _guard239 = fsm_out == 2'd1; +wire _guard240 = _guard238 & _guard239; +wire _guard241 = tdcc_go_out; +wire _guard242 = _guard240 & _guard241; +wire _guard243 = beg_spl_upd1_done_out; +wire _guard244 = ~_guard243; +wire _guard245 = fsm0_out == 2'd0; +wire _guard246 = _guard244 & _guard245; +wire _guard247 = tdcc0_go_out; +wire _guard248 = _guard246 & _guard247; wire _guard249 = signal_reg_out; -wire _guard250 = _guard248 & _guard249; -wire _guard251 = fsm_out == 1'd0; +wire _guard250 = early_reset_cond000_go_out; +wire _guard251 = early_reset_cond000_go_out; wire _guard252 = signal_reg_out; -wire _guard253 = ~_guard252; -wire _guard254 = _guard251 & _guard253; -wire _guard255 = wrapper_early_reset_cond00_go_out; -wire _guard256 = _guard254 & _guard255; -wire _guard257 = _guard250 | _guard256; -wire _guard258 = fsm_out == 1'd0; -wire _guard259 = signal_reg_out; -wire _guard260 = ~_guard259; -wire _guard261 = _guard258 & _guard260; -wire _guard262 = wrapper_early_reset_cond00_go_out; -wire _guard263 = _guard261 & _guard262; -wire _guard264 = fsm_out == 1'd0; -wire _guard265 = signal_reg_out; -wire _guard266 = _guard264 & _guard265; -wire _guard267 = fsm2_out == 3'd6; +wire _guard253 = _guard0 & _guard0; +wire _guard254 = signal_reg_out; +wire _guard255 = ~_guard254; +wire _guard256 = _guard253 & _guard255; +wire _guard257 = wrapper_early_reset_cond000_go_out; +wire _guard258 = _guard256 & _guard257; +wire _guard259 = _guard252 | _guard258; +wire _guard260 = _guard0 & _guard0; +wire _guard261 = signal_reg_out; +wire _guard262 = ~_guard261; +wire _guard263 = _guard260 & _guard262; +wire _guard264 = wrapper_early_reset_cond000_go_out; +wire _guard265 = _guard263 & _guard264; +wire _guard266 = signal_reg_out; +wire _guard267 = fsm1_out == 3'd6; wire _guard268 = invoke2_go_out; wire _guard269 = invoke2_go_out; wire _guard270 = pd_out; @@ -8805,43 +8600,27 @@ wire _guard292 = _guard290 & _guard291; wire _guard293 = pd_out; wire _guard294 = pd0_out; wire _guard295 = _guard293 & _guard294; -wire _guard296 = wrapper_early_reset_cond00_done_out; -wire _guard297 = ~_guard296; -wire _guard298 = fsm2_out == 3'd1; -wire _guard299 = _guard297 & _guard298; -wire _guard300 = tdcc1_go_out; -wire _guard301 = _guard299 & _guard300; -wire _guard302 = wrapper_early_reset_cond00_done_out; -wire _guard303 = ~_guard302; -wire _guard304 = fsm2_out == 3'd5; -wire _guard305 = _guard303 & _guard304; -wire _guard306 = tdcc1_go_out; -wire _guard307 = _guard305 & _guard306; -wire _guard308 = _guard301 | _guard307; -wire _guard309 = fsm_out == 1'd0; -wire _guard310 = signal_reg_out; -wire _guard311 = _guard309 & _guard310; -wire _guard312 = fsm0_out == 2'd2; -wire _guard313 = upd2_done_out; -wire _guard314 = ~_guard313; -wire _guard315 = fsm2_out == 3'd3; +wire _guard296 = fsm_out == 2'd2; +wire _guard297 = upd2_done_out; +wire _guard298 = ~_guard297; +wire _guard299 = fsm1_out == 3'd3; +wire _guard300 = _guard298 & _guard299; +wire _guard301 = tdcc1_go_out; +wire _guard302 = _guard300 & _guard301; +wire _guard303 = invoke3_done_out; +wire _guard304 = ~_guard303; +wire _guard305 = fsm1_out == 3'd4; +wire _guard306 = _guard304 & _guard305; +wire _guard307 = tdcc1_go_out; +wire _guard308 = _guard306 & _guard307; +wire _guard309 = invoke1_go_out; +wire _guard310 = invoke1_go_out; +wire _guard311 = par0_done_out; +wire _guard312 = ~_guard311; +wire _guard313 = fsm1_out == 3'd2; +wire _guard314 = _guard312 & _guard313; +wire _guard315 = tdcc1_go_out; wire _guard316 = _guard314 & _guard315; -wire _guard317 = tdcc1_go_out; -wire _guard318 = _guard316 & _guard317; -wire _guard319 = invoke3_done_out; -wire _guard320 = ~_guard319; -wire _guard321 = fsm2_out == 3'd4; -wire _guard322 = _guard320 & _guard321; -wire _guard323 = tdcc1_go_out; -wire _guard324 = _guard322 & _guard323; -wire _guard325 = invoke1_go_out; -wire _guard326 = invoke1_go_out; -wire _guard327 = par0_done_out; -wire _guard328 = ~_guard327; -wire _guard329 = fsm2_out == 3'd2; -wire _guard330 = _guard328 & _guard329; -wire _guard331 = tdcc1_go_out; -wire _guard332 = _guard330 & _guard331; assign i0_write_en = _guard3; assign i0_clk = clk; assign i0_reset = reset; @@ -8850,92 +8629,83 @@ assign i0_in = _guard5 ? const0_out : 'x; assign upd2_done_in = Sum0_done; -assign early_reset_cond00_go_in = _guard6; assign add1_left = i0_out; assign add1_right = const2_out; -assign done = _guard9; +assign done = _guard8; assign B0_write_en = 1'd0; assign Sum0_addr0 = bit_slice_out; assign A0_write_en = 1'd0; assign B0_addr0 = bit_slice_out; -assign B0_content_en = _guard16; +assign B0_content_en = _guard15; assign A0_addr0 = bit_slice_out; -assign Sum0_write_en = _guard20; -assign Sum0_content_en = _guard21; +assign Sum0_write_en = _guard19; +assign Sum0_content_en = _guard20; assign Sum0_write_data = add0_out; -assign A0_content_en = _guard25; -assign fsm_write_en = _guard26; +assign A0_content_en = _guard24; +assign fsm_write_en = _guard37; assign fsm_clk = clk; assign fsm_reset = reset; assign fsm_in = - _guard30 ? adder_out : - _guard33 ? 1'd0 : - 1'd0; -assign adder_left = - _guard34 ? fsm_out : - 1'd0; -assign adder_right = _guard35; -assign beg_spl_upd0_go_in = _guard41; + _guard42 ? 2'd1 : + _guard43 ? 2'd0 : + _guard48 ? 2'd2 : + 2'd0; +assign beg_spl_upd0_go_in = _guard54; +assign early_reset_cond000_done_in = ud0_out; assign add0_left = B_read0_0_out; assign add0_right = A_read0_0_out; -assign invoke2_go_in = _guard49; -assign tdcc0_done_in = _guard50; -assign comb_reg_write_en = _guard51; +assign invoke2_go_in = _guard62; +assign tdcc0_done_in = _guard63; +assign comb_reg_write_en = _guard64; assign comb_reg_clk = clk; assign comb_reg_reset = reset; assign comb_reg_in = - _guard52 ? le0_out : + _guard65 ? le0_out : 1'd0; -assign early_reset_cond00_done_in = ud_out; -assign fsm1_write_en = _guard65; +assign wrapper_early_reset_cond000_go_in = _guard78; +assign fsm1_write_en = _guard137; assign fsm1_clk = clk; assign fsm1_reset = reset; assign fsm1_in = - _guard70 ? 2'd1 : - _guard71 ? 2'd0 : - _guard76 ? 2'd2 : - 2'd0; -assign tdcc_go_in = _guard82; -assign invoke0_go_in = _guard88; + _guard154 ? 3'd6 : + _guard159 ? 3'd5 : + _guard174 ? 3'd2 : + _guard179 ? 3'd4 : + _guard184 ? 3'd1 : + _guard185 ? 3'd0 : + _guard190 ? 3'd3 : + 3'd0; +assign tdcc_go_in = _guard196; +assign invoke0_go_in = _guard202; assign beg_spl_upd0_done_in = A0_done; assign bit_slice_in = i0_out; -assign fsm0_write_en = _guard101; +assign fsm0_write_en = _guard215; assign fsm0_clk = clk; assign fsm0_reset = reset; assign fsm0_in = - _guard106 ? 2'd1 : - _guard107 ? 2'd0 : - _guard112 ? 2'd2 : + _guard220 ? 2'd1 : + _guard221 ? 2'd0 : + _guard226 ? 2'd2 : 2'd0; -assign fsm2_write_en = _guard171; -assign fsm2_clk = clk; -assign fsm2_reset = reset; -assign fsm2_in = - _guard188 ? 3'd6 : - _guard193 ? 3'd5 : - _guard208 ? 3'd2 : - _guard213 ? 3'd4 : - _guard218 ? 3'd1 : - _guard219 ? 3'd0 : - _guard224 ? 3'd3 : - 3'd0; -assign tdcc0_go_in = _guard230; +assign tdcc0_go_in = _guard232; assign invoke3_done_in = i0_done; -assign par0_done_in = _guard233; +assign early_reset_cond000_go_in = _guard233; +assign par0_done_in = _guard236; assign invoke0_done_in = i0_done; -assign invoke1_go_in = _guard239; -assign beg_spl_upd1_go_in = _guard245; +assign invoke1_go_in = _guard242; +assign beg_spl_upd1_go_in = _guard248; +assign wrapper_early_reset_cond000_done_in = _guard249; assign le0_left = - _guard246 ? i0_out : + _guard250 ? i0_out : 4'd0; assign le0_right = - _guard247 ? const1_out : + _guard251 ? const1_out : 4'd0; -assign signal_reg_write_en = _guard257; +assign signal_reg_write_en = _guard259; assign signal_reg_clk = clk; assign signal_reg_reset = reset; assign signal_reg_in = - _guard263 ? 1'd1 : + _guard265 ? 1'd1 : _guard266 ? 1'd0 : 1'd0; assign invoke2_done_in = B_read0_0_done; @@ -8959,17 +8729,15 @@ assign pd0_in = _guard292 ? 1'd1 : _guard295 ? 1'd0 : 1'd0; -assign wrapper_early_reset_cond00_go_in = _guard308; -assign wrapper_early_reset_cond00_done_in = _guard311; -assign tdcc_done_in = _guard312; -assign upd2_go_in = _guard318; -assign invoke3_go_in = _guard324; +assign tdcc_done_in = _guard296; +assign upd2_go_in = _guard302; +assign invoke3_go_in = _guard308; assign invoke1_done_in = A_read0_0_done; assign tdcc1_go_in = go; -assign A_read0_0_write_en = _guard325; +assign A_read0_0_write_en = _guard309; assign A_read0_0_clk = clk; assign A_read0_0_reset = reset; assign A_read0_0_in = A0_read_data; -assign par0_go_in = _guard332; +assign par0_go_in = _guard316; // COMPONENT END: main endmodule diff --git a/yxi/tests/axi/read-compute-write/seq-mem-vec-add.expect b/yxi/tests/axi/read-compute-write/seq-mem-vec-add.expect index f4cf47810e..3e67016064 100644 --- a/yxi/tests/axi/read-compute-write/seq-mem-vec-add.expect +++ b/yxi/tests/axi/read-compute-write/seq-mem-vec-add.expect @@ -296,7 +296,7 @@ component m_bresp_channel(ARESETn: 1, BVALID: 1) -> (BREADY: 1) { } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); curr_addr_internal_mem_A0 = std_reg(3); diff --git a/yxi/tests/axi/read-compute-write/seq-vec-add.expect b/yxi/tests/axi/read-compute-write/seq-vec-add.expect index c8fb336288..381a64915e 100644 --- a/yxi/tests/axi/read-compute-write/seq-vec-add.expect +++ b/yxi/tests/axi/read-compute-write/seq-vec-add.expect @@ -296,7 +296,7 @@ component m_bresp_channel(ARESETn: 1, BVALID: 1) -> (BREADY: 1) { } } } -component wrapper<"toplevel"=1>(A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { +component wrapper<"toplevel"=1>(@clk ap_clk: 1, A0_ARESETn: 1, A0_ARREADY: 1, A0_RVALID: 1, A0_RLAST: 1, A0_RDATA: 32, A0_RRESP: 2, A0_AWREADY: 1, A0_WRESP: 2, A0_WREADY: 1, A0_BVALID: 1, A0_BRESP: 2, A0_RID: 1, B0_ARESETn: 1, B0_ARREADY: 1, B0_RVALID: 1, B0_RLAST: 1, B0_RDATA: 32, B0_RRESP: 2, B0_AWREADY: 1, B0_WRESP: 2, B0_WREADY: 1, B0_BVALID: 1, B0_BRESP: 2, B0_RID: 1, Sum0_ARESETn: 1, Sum0_ARREADY: 1, Sum0_RVALID: 1, Sum0_RLAST: 1, Sum0_RDATA: 32, Sum0_RRESP: 2, Sum0_AWREADY: 1, Sum0_WRESP: 2, Sum0_WREADY: 1, Sum0_BVALID: 1, Sum0_BRESP: 2, Sum0_RID: 1) -> (A0_ARVALID: 1, A0_ARADDR: 64, A0_ARSIZE: 3, A0_ARLEN: 8, A0_ARBURST: 2, A0_RREADY: 1, A0_AWVALID: 1, A0_AWADDR: 64, A0_AWSIZE: 3, A0_AWLEN: 8, A0_AWBURST: 2, A0_AWPROT: 3, A0_WVALID: 1, A0_WLAST: 1, A0_WDATA: 32, A0_BREADY: 1, A0_ARID: 1, A0_AWID: 1, A0_WID: 1, A0_BID: 1, B0_ARVALID: 1, B0_ARADDR: 64, B0_ARSIZE: 3, B0_ARLEN: 8, B0_ARBURST: 2, B0_RREADY: 1, B0_AWVALID: 1, B0_AWADDR: 64, B0_AWSIZE: 3, B0_AWLEN: 8, B0_AWBURST: 2, B0_AWPROT: 3, B0_WVALID: 1, B0_WLAST: 1, B0_WDATA: 32, B0_BREADY: 1, B0_ARID: 1, B0_AWID: 1, B0_WID: 1, B0_BID: 1, Sum0_ARVALID: 1, Sum0_ARADDR: 64, Sum0_ARSIZE: 3, Sum0_ARLEN: 8, Sum0_ARBURST: 2, Sum0_RREADY: 1, Sum0_AWVALID: 1, Sum0_AWADDR: 64, Sum0_AWSIZE: 3, Sum0_AWLEN: 8, Sum0_AWBURST: 2, Sum0_AWPROT: 3, Sum0_WVALID: 1, Sum0_WLAST: 1, Sum0_WDATA: 32, Sum0_BREADY: 1, Sum0_ARID: 1, Sum0_AWID: 1, Sum0_WID: 1, Sum0_BID: 1) { cells { main_compute = main(); curr_addr_internal_mem_A0 = std_reg(3); From 24bf507f10a88bb4b33d3b5102532f874e1b6833 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 16:24:00 +0200 Subject: [PATCH 65/66] revert gen_xo.tcl to look for ap_clk signal, making single script compatable with the new calyx-axi-wrapper and old verilog-axi-wrapper --- fud2/rsrc/gen_xo.tcl | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/fud2/rsrc/gen_xo.tcl b/fud2/rsrc/gen_xo.tcl index 8b38be91e2..dbe328b6d8 100644 --- a/fud2/rsrc/gen_xo.tcl +++ b/fud2/rsrc/gen_xo.tcl @@ -31,13 +31,10 @@ set_property sdx_kernel true [ipx::current_core] set_property sdx_kernel_type rtl [ipx::current_core] # Declare bus interfaces. -# NOTE: In the old version of our AXI wrapper `clk` was named `ap_clk` -# TODO: Before merging change this back and update Calyx-AXI-wrapper to use ap_clk -# (or do something else that doesnt break the old verilog-wrapper) -ipx::associate_bus_interfaces -busif s_axi_control -clock clk [ipx::current_core] +ipx::associate_bus_interfaces -busif s_axi_control -clock ap_clk [ipx::current_core] lvarpop argv foreach busname $argv { - ipx::associate_bus_interfaces -busif $busname -clock clk [ipx::current_core] + ipx::associate_bus_interfaces -busif $busname -clock ap_clk [ipx::current_core] } # Close & save the temporary project. From a5e858ac361c1059a518390ca044efebf4f324b3 Mon Sep 17 00:00:00 2001 From: Nathaniel Navarro Date: Thu, 2 Jan 2025 16:27:25 +0200 Subject: [PATCH 66/66] remove extra ap_clk ports in axi_generator.py --- yxi/axi-calyx/axi_generator.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/yxi/axi-calyx/axi_generator.py b/yxi/axi-calyx/axi_generator.py index 97c5268a64..8f60000116 100644 --- a/yxi/axi-calyx/axi_generator.py +++ b/yxi/axi-calyx/axi_generator.py @@ -507,8 +507,6 @@ def add_main_comp(prog, mems): ] add_comp_ports(wrapper_comp, wrapper_inputs, wrapper_outputs) - # Naming the clock signal `ap_clk` ensures Xilinx tool compatability - wrapper_comp.input("ap_clk", 1, ["clk"]) # Cells # Read stuff