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configs: Add K230 CANMV MRT defconfig
This commit introduces a new defconfig file for the K230 CANMV MRT platform. The configuration includes support for various features such as SPI, MMC, USB, and environment storage in both MMC and SPI flash. It sets up memory parameters, boot delay, and enables debugging options to facilitate development and testing on the K230 architecture.
1 parent a238962 commit b62de01

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Lines changed: 19010 additions & 1 deletion

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‎arch/riscv/Kconfig‎

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@@ -113,6 +113,10 @@ config TARGET_K230_LABPLUS_1956
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bool "Support K230 LabPlus 1956"
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select SYS_CACHE_SHIFT_6
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config TARGET_K230_CANMV_MRT
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bool "Support K230 CanMV MRT"
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select SYS_CACHE_SHIFT_6
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endchoice
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config SYS_ICACHE_OFF
@@ -169,6 +173,7 @@ source "board/kendryte/k230_evb/Kconfig"
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source "board/kendryte/k230d_labplus_ai_camera/Kconfig"
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source "board/kendryte/k230d_labplus_ai_camera_v2/Kconfig"
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source "board/kendryte/k230_labplus_1956/Kconfig"
176+
source "board/kendryte/k230_canmv_mrt/Kconfig"
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# platform-specific options below
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source "arch/riscv/cpu/ax25/Kconfig"

‎arch/riscv/dts/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ dtb-$(CONFIG_TARGET_K230D_CANMV_ATK_DNK230D) += k230d_canmv_atk_dnk230d.dtb
2525
dtb-$(CONFIG_TARGET_K230_EVB) += k230_evb.dtb
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dtb-$(CONFIG_TARGET_K230_CANMV_RTT_EVB) += k230_canmv_rtt_evb.dtb
2727
dtb-$(CONFIG_TARGET_K230D_CANMV_LABPLUS_AI_CAMERA_V2) += k230d_canmv_labplus_ai_camera_v2.dtb
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dtb-$(CONFIG_TARGET_K230_CANMV_MRT) += k230_canmv_mrt.dtb
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include $(srctree)/scripts/Makefile.dts
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‎arch/riscv/dts/k230_canmv_mrt.dts‎

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/* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
12+
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14+
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
16+
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
17+
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18+
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21+
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24+
*/
25+
/dts-v1/;
26+
#include <dt-bindings/pinctrl/k230-pinctrl.h>
27+
28+
#define BANK_VOLTAGE_IO0_IO1 K230_MSC_1V8
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#define BANK_VOLTAGE_IO2_IO13 K230_MSC_1V8
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#define BANK_VOLTAGE_IO14_IO25 K230_MSC_3V3
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#define BANK_VOLTAGE_IO26_IO37 K230_MSC_1V8
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#define BANK_VOLTAGE_IO38_IO49 K230_MSC_3V3
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#define BANK_VOLTAGE_IO50_IO61 K230_MSC_3V3
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#define BANK_VOLTAGE_IO62_IO63 K230_MSC_1V8
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#include "k230.dtsi"
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/ {
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model = "kendryte k230 canmv mrt";
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compatible = "kendryte,k230_canmv_mrt";
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memory@0 {
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device_type = "memory";
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reg = <
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0x0 0 0x0 0x20000000
45+
>;
46+
};
47+
};
48+
49+
&mmc0 {
50+
status = "okay";
51+
};
52+
53+
&iomux {
54+
pinctrl-names = "default";
55+
pinctrl-0 = <&pins>;
56+
// Please pay attention to the bank voltage! will damage the chip.
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pins: iomux_pins {
58+
u-boot,dm-pre-reloc;
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pinctrl-single,pins = <
60+
(IO0) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO0_IO1 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 0<<DS | 1<<ST )
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(IO1) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO0_IO1 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 0<<DS | 1<<ST )
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(IO2) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO3) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO4) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO5) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO6) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO7) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO8) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO9) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO10) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO11) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO12) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO13) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO2_IO13 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 0<<ST )
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(IO14) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO15) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO16) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO17) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO18) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO19) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO20) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO21) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO22) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO23) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO24) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 15<<DS | 1<<ST )
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(IO25) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO14_IO25 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO26) ( 3<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 0<<ST )
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(IO27) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO28) ( 3<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 0<<DS | 1<<ST )
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(IO29) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO30) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO31) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO32) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO33) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO34) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO35) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO36) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO37) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO26_IO37 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO38) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO39) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO40) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO41) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO42) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO43) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO44) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 0<<ST )
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(IO45) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 0<<DS | 1<<ST )
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(IO46) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO47) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO48) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 0<<ST )
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(IO49) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO38_IO49 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 0<<DS | 1<<ST )
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(IO50) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO51) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 0<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO52) ( 3<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO53) ( 3<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO54) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO55) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO56) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO57) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO58) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO59) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 1<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO60) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO61) ( 2<<SEL | 0<<SL | BANK_VOLTAGE_IO50_IO61 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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(IO62) ( 1<<SEL | 0<<SL | BANK_VOLTAGE_IO62_IO63 <<MSC | 0<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 0<<ST )
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(IO63) ( 0<<SEL | 0<<SL | BANK_VOLTAGE_IO62_IO63 <<MSC | 1<<IE | 1<<OE | 0<<PU | 0<<PD | 7<<DS | 1<<ST )
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>;
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};
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};

‎board/kendryte/k230_canmv_mrt/Kconfig‎

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if TARGET_K230_CANMV_MRT
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config SYS_CPU
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default "k230"
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config SYS_VENDOR
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default "kendryte"
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config SYS_BOARD
10+
default "k230_canmv_mrt"
11+
12+
config SYS_CONFIG_NAME
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default "k230_common"
14+
15+
config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select KENDRYTE_K230
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choice
20+
prompt "DDR Type And Frequency"
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default CANMV_MRT_LPDDR4_2667
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23+
config CANMV_MRT_LPDDR4_2667
24+
bool "k230 canmv mrt ddr4 2667"
25+
endchoice
26+
endif

‎board/kendryte/k230_canmv_mrt/Makefile‎

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# /* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
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# *
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# * Redistribution and use in source and binary forms, with or without
4+
# * modification, are permitted provided that the following conditions are met:
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# * 1. Redistributions of source code must retain the above copyright
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# * notice, this list of conditions and the following disclaimer.
7+
# * 2. Redistributions in binary form must reproduce the above copyright
8+
# * notice, this list of conditions and the following disclaimer in the
9+
# * documentation and/or other materials provided with the distribution.
10+
# *
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# * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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# * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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# * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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# * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
15+
# * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
16+
# * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
17+
# * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18+
# * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19+
# * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20+
# * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21+
# * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22+
# * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
23+
# * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24+
# */
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BOARD_COMMON_DIR = $(srctree)/board/$(VENDOR)/common
27+
EXTRA_CFLAGS += -I$(BOARD_COMMON_DIR)
28+
29+
obj-y += board.o
30+
31+
obj-$(CONFIG_CANMV_MRT_LPDDR4_2667) += gen_lpddr4_32_swap_2667.lex.o
32+
$(obj)/gen_lpddr4_32_swap_2667.lex.c: $(src)/lpddr4_32_swap_2667.c $(BOARD_COMMON_DIR)/ddr.sh
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$(Q)($(BOARD_COMMON_DIR)/ddr.sh $< $@ 0x50000 0x53fff 0x54000 0x5433d || exit 1)

‎board/kendryte/k230_canmv_mrt/board.c‎

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1+
#include <asm/asm.h>
2+
#include <asm/io.h>
3+
#include <asm/spl.h>
4+
#include <asm/types.h>
5+
#include <command.h>
6+
#include <common.h>
7+
#include <cpu_func.h>
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#include <dm.h>
9+
#include <env_internal.h>
10+
#include <image.h>
11+
#include <linux/delay.h>
12+
#include <linux/kernel.h>
13+
#include <lmb.h>
14+
#include <stdio.h>
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16+
#include <kendryte/k230_platform.h>
17+
18+
#include "board_common.h"
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20+
int ddr_init_training(void) {
21+
if (0x00 != (readl((const volatile void __iomem *)0x980001bcULL) & 0x1)) {
22+
// have init ,not need reinit;
23+
return 0;
24+
}
25+
26+
board_ddr_init();
27+
28+
return 0;
29+
}
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31+
int board_early_init_f(void) {
32+
return 0;
33+
}
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35+
#ifdef CONFIG_BOARD_LATE_INIT
36+
int board_late_init(void) {
37+
return 0;
38+
}
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#endif

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