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Add a clang-tidy checks and warnings (#2312)
1 parent c4d0993 commit 6c7b548

16 files changed

+123
-56
lines changed

‎.github/workflows/clang-tidy.yml

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
name: Run clang-tidy
2+
on:
3+
push:
4+
paths:
5+
- '**.c'
6+
- '**.h'
7+
pull_request:
8+
9+
jobs:
10+
analyze:
11+
runs-on: ubuntu-latest
12+
13+
name: Install clang-tidy
14+
steps:
15+
- uses: actions/checkout@v3
16+
- name: Install clang-tidy
17+
run: |
18+
sudo apt install clang-tidy
19+
20+
- name: Build
21+
run: |
22+
mkdir build && cd build
23+
cmake -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DBUILD_SHARED_LIBS=1 ..
24+
sudo cmake --build . --config Release
25+
cd ..
26+
27+
- name: Check for warnings
28+
run: |
29+
./run-clang-tidy.sh build

‎.gitignore

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,7 @@ fuzz_bindisasm
131131
fuzz_disasm
132132
fuzz_decode_platform
133133
capstone_get_setup
134-
suite/fuzz/
134+
suite/fuzz/corpus
135135
suite/cstest/cmocka/
136136

137137
*.s

‎CMakeLists.txt

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,22 +25,32 @@ project(capstone
2525
VERSION 5.0
2626
)
2727

28-
set(UNIX_COMPILER_OPTIONS -Werror -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)
28+
set(UNIX_COMPILER_OPTIONS -Werror -Wall -Warray-bounds -Wshift-negative-value -Wreturn-type -Wformat -Wmissing-braces -Wunused-function -Warray-bounds -Wunused-variable -Wparentheses -Wint-in-bool-context -Wmisleading-indentation)
2929

3030
# maybe-unitialzied is only supported by newer versions of GCC.
3131
# Unfortunately, it is pretty unreliable and reports wrong results.
3232
# So we disable it for all compilers versions which support it.
3333
include(CheckCCompilerFlag)
3434
check_c_compiler_flag("-Wno-maybe-unitialized" SUPPORTS_MU)
35+
check_c_compiler_flag("-Wshadow=local" SUPPORTS_SHADOWING)
36+
check_c_compiler_flag("-Wsometimes-uninitialized" SUPPORTS_SUNINIT)
3537

3638
if (SUPPORTS_MU)
3739
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wno-maybe-unitialized)
3840
endif()
3941

42+
if (SUPPORTS_SHADOWING)
43+
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wshadow=local)
44+
endif()
45+
46+
if (SUPPORTS_SUNINIT)
47+
set(UNIX_COMPILER_OPTIONS ${UNIX_COMPILER_OPTIONS} -Wsometimes-uninitialized)
48+
endif()
49+
4050
if (MSVC)
4151
add_compile_options(/W1 /w14189)
4252
else()
43-
add_compile_options(${UNIX_COMPILE_OPTIONS})
53+
add_compile_options(${UNIX_COMPILER_OPTIONS})
4454
endif()
4555

4656

‎arch/AArch64/AArch64BaseInfo.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -852,6 +852,7 @@ inline static const char *AArch64PACKeyIDToString(AArch64PACKey_ID KeyID)
852852
case AArch64PACKey_DB:
853853
return "db";
854854
}
855+
return NULL;
855856
}
856857

857858
/// Return numeric key ID for 2-letter identifier string.
@@ -867,6 +868,7 @@ AArch64StringToPACKeyID(const char *Name)
867868
if (strcmp(Name, "db") == 0)
868869
return AArch64PACKey_DB;
869870
assert(0 && "Invalid PAC key");
871+
return AArch64PACKey_LAST;
870872
}
871873

872874
// end namespace AArch64

‎arch/AArch64/AArch64Disassembler.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -360,25 +360,25 @@ static DecodeStatus getInstruction(csh handle, const uint8_t *Bytes, size_t Byte
360360
// For Scalable Matrix Extension (SME) instructions that have an
361361
// implicit operand for the accumulator (ZA) or implicit immediate zero
362362
// which isn't encoded, manually insert operand.
363-
for (unsigned i = 0; i < Desc.NumOperands; i++) {
364-
if (Desc.OpInfo[i].OperandType == MCOI_OPERAND_REGISTER) {
365-
switch (Desc.OpInfo[i].RegClass) {
363+
for (unsigned j = 0; j < Desc.NumOperands; j++) {
364+
if (Desc.OpInfo[j].OperandType == MCOI_OPERAND_REGISTER) {
365+
switch (Desc.OpInfo[j].RegClass) {
366366
default:
367367
break;
368368
case AArch64_MPRRegClassID:
369-
MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, AArch64_ZA));
369+
MCInst_insert0(MI, j, MCOperand_CreateReg1(MI, AArch64_ZA));
370370
break;
371371
case AArch64_MPR8RegClassID:
372-
MCInst_insert0(MI, i,
372+
MCInst_insert0(MI, j,
373373
MCOperand_CreateReg1(MI, AArch64_ZAB0));
374374
break;
375375
case AArch64_ZTRRegClassID:
376-
MCInst_insert0(MI, i, MCOperand_CreateReg1(MI, AArch64_ZT0));
376+
MCInst_insert0(MI, j, MCOperand_CreateReg1(MI, AArch64_ZT0));
377377
break;
378378
}
379-
} else if (Desc.OpInfo[i].OperandType ==
379+
} else if (Desc.OpInfo[j].OperandType ==
380380
AArch64_OP_IMPLICIT_IMM_0) {
381-
MCInst_insert0(MI, i, MCOperand_CreateImm1(MI, 0));
381+
MCInst_insert0(MI, j, MCOperand_CreateImm1(MI, 0));
382382
}
383383
}
384384

‎arch/AArch64/AArch64GenAsmWriter.inc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33535,7 +33535,7 @@ static bool AArch64InstPrinterValidateMCOperand(const MCOperand *MCOp,
3353533535
switch (PredicateIndex) {
3353633536
default:
3353733537
assert(0 && "Unknown MCOperandPredicate kind");
33538-
break;
33538+
return false;
3353933539
case 1: {
3354033540

3354133541
if (!MCOperand_isImm(MCOp))

‎arch/AArch64/AArch64InstPrinter.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1358,7 +1358,7 @@ void printOperand(MCInst *MI, unsigned OpNo, SStream *O)
13581358
unsigned Reg = MCOperand_getReg(Op);
13591359
printRegName(O, Reg);
13601360
} else if (MCOperand_isImm(Op)) {
1361-
MCOperand *Op = MCInst_getOperand(MI, (OpNo));
1361+
Op = MCInst_getOperand(MI, (OpNo));
13621362
SStream_concat(O, "%s", markup("<imm:"));
13631363
printInt64Bang(O, MCOperand_getImm(Op));
13641364
SStream_concat0(O, markup(">"));

‎arch/AArch64/AArch64Mapping.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1483,7 +1483,7 @@ static void add_cs_detail_template_1(MCInst *MI, aarch64_op_group op_group,
14831483
case AArch64_OP_GROUP_ZPRasFPR_32:
14841484
case AArch64_OP_GROUP_ZPRasFPR_64:
14851485
case AArch64_OP_GROUP_ZPRasFPR_8: {
1486-
unsigned Base;
1486+
unsigned Base = AArch64_NoRegister;
14871487
unsigned Width = temp_arg_0;
14881488
switch (Width) {
14891489
case 8:

‎arch/ARM/ARMDisassembler.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2082,7 +2082,7 @@ static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst *Inst, unsigned Insn,
20822082
unsigned amt = fieldFromInstruction_4(Insn, 7, 5);
20832083
if (Opc == ARM_AM_ror && amt == 0)
20842084
Opc = ARM_AM_rrx;
2085-
unsigned imm = ARM_AM_getAM2Opc(Op, amt, Opc, idx_mode);
2085+
imm = ARM_AM_getAM2Opc(Op, amt, Opc, idx_mode);
20862086

20872087
MCOperand_CreateImm0(Inst, (imm));
20882088
} else {

‎arch/ARM/ARMMapping.c

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1354,11 +1354,11 @@ static void add_cs_detail_general(MCInst *MI, arm_op_group op_group,
13541354
MCInst_getOpVal(MI, OpNum) + 1);
13551355
break;
13561356
case ARM_OP_GROUP_RotImmOperand: {
1357-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1358-
if (Imm == 0)
1357+
unsigned RotImm = MCInst_getOpVal(MI, OpNum);
1358+
if (RotImm == 0)
13591359
return;
13601360
ARM_get_detail_op(MI, -1)->shift.type = ARM_SFT_ROR;
1361-
ARM_get_detail_op(MI, -1)->shift.value = Imm * 8;
1361+
ARM_get_detail_op(MI, -1)->shift.value = RotImm * 8;
13621362
break;
13631363
}
13641364
case ARM_OP_GROUP_FBits16:
@@ -1390,16 +1390,16 @@ static void add_cs_detail_general(MCInst *MI, arm_op_group op_group,
13901390
break;
13911391
}
13921392
case ARM_OP_GROUP_PostIdxImm8Operand: {
1393-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1394-
bool sub = !(Imm & 256);
1395-
ARM_set_detail_op_mem_offset(MI, OpNum, (Imm & 0xff), sub);
1393+
unsigned Imm8 = MCInst_getOpVal(MI, OpNum);
1394+
bool sub = !(Imm8 & 256);
1395+
ARM_set_detail_op_mem_offset(MI, OpNum, (Imm8 & 0xff), sub);
13961396
ARM_get_detail(MI)->post_index = true;
13971397
break;
13981398
}
13991399
case ARM_OP_GROUP_PostIdxImm8s4Operand: {
1400-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1401-
bool sub = !(Imm & 256);
1402-
ARM_set_detail_op_mem_offset(MI, OpNum, (Imm & 0xff) << 2, sub);
1400+
unsigned Imm8s = MCInst_getOpVal(MI, OpNum);
1401+
bool sub = !(Imm8s & 256);
1402+
ARM_set_detail_op_mem_offset(MI, OpNum, (Imm8s & 0xff) << 2, sub);
14031403
ARM_get_detail(MI)->post_index = true;
14041404
break;
14051405
}
@@ -1569,36 +1569,36 @@ static void add_cs_detail_general(MCInst *MI, arm_op_group op_group,
15691569
ARM_set_mem_access(MI, true);
15701570
ARM_set_detail_op_mem(MI, OpNum, false, 0, 0,
15711571
MCInst_getOpVal(MI, OpNum));
1572-
int64_t Imm = MCInst_getOpVal(MI, OpNum + 1);
1573-
if (Imm)
1572+
int64_t Imm0_1024s4 = MCInst_getOpVal(MI, OpNum + 1);
1573+
if (Imm0_1024s4)
15741574
ARM_set_detail_op_mem(MI, OpNum + 1, false, 0, 0,
1575-
Imm * 4);
1575+
Imm0_1024s4 * 4);
15761576
ARM_set_mem_access(MI, false);
15771577
break;
15781578
case ARM_OP_GROUP_PKHLSLShiftImm: {
1579-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1580-
if (Imm == 0)
1579+
unsigned ShiftImm = MCInst_getOpVal(MI, OpNum);
1580+
if (ShiftImm == 0)
15811581
return;
15821582
ARM_get_detail_op(MI, -1)->shift.type = ARM_SFT_LSL;
1583-
ARM_get_detail_op(MI, -1)->shift.value = Imm;
1583+
ARM_get_detail_op(MI, -1)->shift.value = ShiftImm;
15841584
break;
15851585
}
15861586
case ARM_OP_GROUP_PKHASRShiftImm: {
1587-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1588-
if (Imm == 0)
1589-
Imm = 32;
1587+
unsigned RShiftImm = MCInst_getOpVal(MI, OpNum);
1588+
if (RShiftImm == 0)
1589+
RShiftImm = 32;
15901590
ARM_get_detail_op(MI, -1)->shift.type = ARM_SFT_ASR;
1591-
ARM_get_detail_op(MI, -1)->shift.value = Imm;
1591+
ARM_get_detail_op(MI, -1)->shift.value = RShiftImm;
15921592
break;
15931593
}
15941594
case ARM_OP_GROUP_ThumbS4ImmOperand:
15951595
ARM_set_detail_op_imm(MI, OpNum, ARM_OP_IMM,
15961596
MCInst_getOpVal(MI, OpNum) * 4);
15971597
break;
15981598
case ARM_OP_GROUP_ThumbSRImm: {
1599-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1599+
unsigned SRImm = MCInst_getOpVal(MI, OpNum);
16001600
ARM_set_detail_op_imm(MI, OpNum, ARM_OP_IMM,
1601-
Imm == 0 ? 32 : Imm);
1601+
SRImm == 0 ? 32 : SRImm);
16021602
break;
16031603
}
16041604
case ARM_OP_GROUP_BitfieldInvMaskImmOperand: {
@@ -1610,8 +1610,8 @@ static void add_cs_detail_general(MCInst *MI, arm_op_group op_group,
16101610
break;
16111611
}
16121612
case ARM_OP_GROUP_CPSIMod: {
1613-
unsigned Imm = MCInst_getOpVal(MI, OpNum);
1614-
ARM_get_detail(MI)->cps_mode = Imm;
1613+
unsigned Mode = MCInst_getOpVal(MI, OpNum);
1614+
ARM_get_detail(MI)->cps_mode = Mode;
16151615
break;
16161616
}
16171617
case ARM_OP_GROUP_CPSIFlag: {
@@ -1730,10 +1730,10 @@ static void add_cs_detail_template_1(MCInst *MI, arm_op_group op_group,
17301730
ARM_set_mem_access(MI, true);
17311731
ARM_set_detail_op_mem(MI, OpNum, false, 0, 0,
17321732
MCInst_getOpVal(MI, OpNum));
1733-
int32_t Imm = MCInst_getOpVal(MI, OpNum + 1);
1734-
if (Imm == INT32_MIN)
1735-
Imm = 0;
1736-
ARM_set_detail_op_mem(MI, OpNum + 1, false, 0, 0, Imm);
1733+
int32_t Imm8 = MCInst_getOpVal(MI, OpNum + 1);
1734+
if (Imm8 == INT32_MIN)
1735+
Imm8 = 0;
1736+
ARM_set_detail_op_mem(MI, OpNum + 1, false, 0, 0, Imm8);
17371737
if (AlwaysPrintImm0)
17381738
map_add_implicit_write(MI, MCInst_getOpVal(MI, OpNum));
17391739

@@ -1864,8 +1864,8 @@ static void add_cs_detail_template_2(MCInst *MI, arm_op_group op_group,
18641864
case ARM_OP_GROUP_ComplexRotationOp_180_90: {
18651865
unsigned Angle = temp_arg_0;
18661866
unsigned Remainder = temp_arg_1;
1867-
unsigned Imm = (MCInst_getOpVal(MI, OpNum) * Angle) + Remainder;
1868-
ARM_set_detail_op_imm(MI, OpNum, ARM_OP_IMM, Imm);
1867+
unsigned Rotation = (MCInst_getOpVal(MI, OpNum) * Angle) + Remainder;
1868+
ARM_set_detail_op_imm(MI, OpNum, ARM_OP_IMM, Rotation);
18691869
break;
18701870
}
18711871
}

‎arch/HPPA/HPPADisassembler.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2776,7 +2776,7 @@ static void fill_copr_mods(uint32_t insn, uint32_t uid, uint32_t class,
27762776
push_str_modifier(hppa_ext, "n");
27772777
}
27782778
} else {
2779-
uint32_t uid = get_insn_field(insn, 23, 25);
2779+
uid = get_insn_field(insn, 23, 25);
27802780
uint32_t sop = (get_insn_field(insn, 6, 22) << 5) |
27812781
get_insn_field(insn, 27, 31);
27822782
push_int_modifier(hppa_ext, uid);

‎arch/M68K/M68KDisassembler.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1944,9 +1944,7 @@ static void d68020_cpgen(m68k_info *info)
19441944
// special handling for fmovecr
19451945

19461946
if (BITFIELD(info->ir, 5, 0) == 0 && BITFIELD(next, 15, 10) == 0x17) {
1947-
cs_m68k_op* op0;
1948-
cs_m68k_op* op1;
1949-
cs_m68k* ext = build_init_op(info, M68K_INS_FMOVECR, 2, 0);
1947+
ext = build_init_op(info, M68K_INS_FMOVECR, 2, 0);
19501948

19511949
op0 = &ext->operands[0];
19521950
op1 = &ext->operands[1];

‎cstool/cstool.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -645,8 +645,6 @@ int main(int argc, char **argv)
645645

646646
count = cs_disasm(handle, assembly, size, address, 0, &insn);
647647
if (count > 0) {
648-
size_t i;
649-
650648
for (i = 0; i < count; i++) {
651649
int j;
652650

‎docs/cs_v6_release_guide.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -157,9 +157,9 @@ Write it into `rename_arm64.sh` and run it on files with `sh rename_arm64.sh <sr
157157

158158
These features are only supported by `auto-sync`-enabled architectures.
159159

160-
**Instruction Encoding**
160+
**More code quality checks**
161161

162-
TODO
162+
- `clang-tidy` is now run on all files changed by a PR.
163163

164164
**Instruction formats for PPC**
165165

‎run-clang-tidy.sh

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
#!/bin/sh
2+
3+
if [ $# -ne 1 ] || [ "$1" = "-h" ] || [ "$1" = "--help" ]; then
4+
echo "$0 <build-path>"
5+
exit 1
6+
fi
7+
8+
BUILD_PATH="$1"
9+
10+
clang-tidy $(find ./arch ./*.c -type f -iregex ".*\.[c]") -p "$BUILD_PATH" -checks=clang-analyzer-*,-clang-analyzer-cplusplus* | tee ct-warnings.txt
11+
12+
tmp=$(mktemp)
13+
grep ": warning" ct-warnings.txt | grep -oE "^[/a-zA-Z0-9]*\.[ch]" | sort | uniq > $tmp
14+
top_level=$(git rev-parse --show-toplevel)
15+
16+
echo "\n\n###### REPORT\n\n"
17+
18+
for modified in $(git diff --name-only origin/next); do
19+
full_path="$top_level/$modified"
20+
if grep -q "$full_path" $tmp; then
21+
echo "$full_path as warnings. Please fix them."
22+
needs_fixes=1
23+
fi
24+
done
25+
26+
if [ -z $needs_fixes ]; then
27+
echo "All good"
28+
exit 0
29+
fi
30+
exit 1

‎suite/fuzz/fuzz_disasm.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -60,12 +60,12 @@ int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
6060
unsigned int n;
6161

6262
for (j = 0; j < count; j++) {
63-
cs_insn *i = &(all_insn[j]);
63+
cs_insn *insn = &(all_insn[j]);
6464
fprintf(outfile, "0x%"PRIx64":\t%s\t\t%s // insn-ID: %u, insn-mnem: %s\n",
65-
i->address, i->mnemonic, i->op_str,
66-
i->id, cs_insn_name(handle, i->id));
65+
insn->address, insn->mnemonic, insn->op_str,
66+
insn->id, cs_insn_name(handle, insn->id));
6767

68-
detail = i->detail;
68+
detail = insn->detail;
6969

7070
if (detail->regs_read_count > 0) {
7171
fprintf(outfile, "\tImplicit registers read: ");

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