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Description
Work environment
Questions | Answers |
---|---|
OS/arch/bits | N/A |
Architecture | Xtensa |
Source of Capstone | git clone |
Version/git commit | v6.0.0-Alpha2 + |
Expected behavior
Xtensa consumes as many illegal bytes as possible and prints them as data.
E.g., if the first 4 bytes are invalid (0x00000000<valid bytes>
) it should decode invalid (4bytes) ; valid_insn
.
Actual behavior
It parses only the first 3 bytes and is misaligned afterwards. So the next valid instruction (at 0x4
) is not decoded, because the disassembler starts at 0x3
. Due to only detecting 3 bytes as invalid instruction, not all the 4 bytes.
Steps to reproduce the behavior
Decode 0x00000000<valid bytes>
and see that the valid instruction is not decoded.
Additional Logs, screenshots, source code, configuration dump, ...
There is a defined ILL
instruction (all zero bytes). This is a bit weird, because Capstone assumes it decoded a valid instruction (ILL
), but it didn't.
Attempt at fixing it: https://github.com/Rot127/capstone/tree/xtensa-illegal
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