@@ -146,7 +146,7 @@ def import_node_to_filepath(node, imported_from: Path):
146146def compile_import (node , context : Context ) -> str :
147147 asm = []
148148 filename = import_node_to_filepath (node , context .filename )
149- print ( filename )
149+
150150 # open the file, read it, parse it,
151151 module = parse_file (filename )
152152
@@ -448,7 +448,6 @@ def compile_block(node, context: Context):
448448 asm = []
449449 context .new_frame ()
450450 for child in node .children :
451- print (child .type )
452451 code , registers = compile (child , context )
453452 asm .extend (code )
454453 for reg in registers :
@@ -480,7 +479,7 @@ def ensure_is_a_register(code, maybe_reg, context):
480479 reg = context .take_a_register ()
481480 reg .type = maybe_reg .type
482481 reg .indirection_count = maybe_reg .indirection_count
483- code .append (f"mov { reg . full_reg } , { maybe_reg } " )
482+ code .append (f"mov { reg } , { maybe_reg } " )
484483 return reg
485484
486485
@@ -842,6 +841,7 @@ def compile_assignment(node, context: Context):
842841 sizespec = SizeSpecifiers [identifier .size ]
843842
844843 asm = [
844+ * asm ,
845845 * code ,
846846 f"mov { sizespec } [{ target_address } ], { reg } ; { identifier } [...]=... " , # assign the value
847847 ]
@@ -1436,5 +1436,5 @@ def compiler(file, debug=False):
14361436
14371437 if not module :
14381438 return None
1439- print_tree ( module )
1439+
14401440 return compile (module , Context (filename = file ))[0 ]
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