11/*
2- * Copyright (c) 2022-2024 HPMicro
2+ * Copyright (c) 2022-2025 HPMicro
33 *
44 * SPDX-License-Identifier: BSD-3-Clause
55 *
1313
1414/* USBSTS, USBINTR */
1515enum {
16- intr_usb = HPM_BITSMASK ( 1 , 0 ) ,
17- intr_error = HPM_BITSMASK ( 1 , 1 ) ,
18- intr_port_change = HPM_BITSMASK ( 1 , 2 ) ,
19- intr_reset = HPM_BITSMASK ( 1 , 6 ) ,
20- intr_sof = HPM_BITSMASK ( 1 , 7 ) ,
21- intr_suspend = HPM_BITSMASK ( 1 , 8 ) ,
22- intr_nak = HPM_BITSMASK ( 1 , 16 )
16+ intr_usb = USB_USBINTR_UE_MASK ,
17+ intr_error = USB_USBINTR_UEE_MASK ,
18+ intr_port_change = USB_USBINTR_PCE_MASK ,
19+ intr_reset = USB_USBINTR_URE_MASK ,
20+ intr_sof = USB_USBINTR_SRE_MASK ,
21+ intr_suspend = USB_USBINTR_SLE_MASK ,
22+ intr_nak = USB_USBINTR_NAKE_MASK ,
2323};
2424
2525/* Endpoint state */
@@ -44,10 +44,8 @@ struct hpm_udc {
4444 struct hpm_ep_state out_ep [USB_NUM_BIDIR_ENDPOINTS ]; /*!< OUT endpoint parameters */
4545} g_hpm_udc [CONFIG_USBDEV_MAX_BUS ];
4646
47- static ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT (USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT ) dcd_data_t _dcd_data0 ;
48- #ifdef HPM_USB1_BASE
49- static ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT (USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT ) dcd_data_t _dcd_data1 ;
50- #endif
47+ static ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT (USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT )
48+ uint8_t _dcd_data [CONFIG_USBDEV_MAX_BUS ][HPM_ALIGN_UP (sizeof (dcd_data_t ), USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT )];
5149static ATTR_PLACE_AT_NONCACHEABLE usb_device_handle_t usb_device_handle [CONFIG_USBDEV_MAX_BUS ];
5250static uint32_t _dcd_irqnum [CONFIG_USBDEV_MAX_BUS ];
5351static uint8_t _dcd_busid [CONFIG_USBDEV_MAX_BUS ];
@@ -68,6 +66,7 @@ int usb_dc_init(uint8_t busid)
6866 memset (& g_hpm_udc [busid ], 0 , sizeof (struct hpm_udc ));
6967 g_hpm_udc [busid ].handle = & usb_device_handle [busid ];
7068 g_hpm_udc [busid ].handle -> regs = (USB_Type * )g_usbdev_bus [busid ].reg_base ;
69+ g_hpm_udc [busid ].handle -> dcd_data = (dcd_data_t * )& _dcd_data [busid ][0 ];
7170
7271 if (g_usbdev_bus [busid ].reg_base == HPM_USB0_BASE ) {
7372 _dcd_irqnum [busid ] = IRQn_USB0 ;
@@ -81,22 +80,11 @@ int usb_dc_init(uint8_t busid)
8180#endif
8281 }
8382
84- if (busid == 0 ) {
85- g_hpm_udc [busid ].handle -> dcd_data = & _dcd_data0 ;
86- } else if (busid == 1 ) {
87- #ifdef HPM_USB1_BASE
88- g_hpm_udc [busid ].handle -> dcd_data = & _dcd_data1 ;
89- #endif
90- } else {
91- ;
92- }
93-
9483 uint32_t int_mask ;
95- int_mask = (USB_USBINTR_UE_MASK | USB_USBINTR_UEE_MASK | USB_USBINTR_SLE_MASK |
96- USB_USBINTR_PCE_MASK | USB_USBINTR_URE_MASK );
84+ int_mask = (intr_usb | intr_error |intr_port_change | intr_reset | intr_suspend );
9785
9886#ifdef CONFIG_USBDEV_SOF_ENABLE
99- int_mask |= USB_USBINTR_SRE_MASK ;
87+ int_mask |= intr_sof ;
10088#endif
10189
10290 usb_device_init (g_hpm_udc [busid ].handle , int_mask );
@@ -283,6 +271,7 @@ void USBD_IRQHandler(uint8_t busid)
283271 usbd_event_sof_handler (busid );
284272 }
285273#endif
274+
286275 if (int_status & intr_reset ) {
287276 g_hpm_udc [busid ].is_suspend = false;
288277 memset (g_hpm_udc [busid ].in_ep , 0 , sizeof (struct hpm_ep_state ) * USB_NUM_BIDIR_ENDPOINTS );
@@ -326,7 +315,8 @@ void USBD_IRQHandler(uint8_t busid)
326315 ep_cb_req = true;
327316
328317 /* Failed QTD also get ENDPTCOMPLETE set */
329- dcd_qtd_t * p_qtd = usb_device_qtd_get (handle , ep_idx );
318+ dcd_qhd_t * p_qhd = usb_device_qhd_get (handle , ep_idx );
319+ dcd_qtd_t * p_qtd = p_qhd -> attached_qtd ;
330320 while (1 ) {
331321 if (p_qtd -> halted || p_qtd -> xact_err || p_qtd -> buffer_err ) {
332322 USB_LOG_ERR ("usbd transfer error!\r\n" );
@@ -337,6 +327,7 @@ void USBD_IRQHandler(uint8_t busid)
337327 break ;
338328 } else {
339329 transfer_len += p_qtd -> expected_bytes - p_qtd -> total_bytes ;
330+ p_qtd -> in_use = false;
340331 }
341332
342333 if (p_qtd -> next == USB_SOC_DCD_QTD_NEXT_INVALID ) {
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