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Respect boolean values of acknowledgements. Make acknowledgements combinatorial
Co-authored-by: [email protected]
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2 files changed

+23
-25
lines changed

2 files changed

+23
-25
lines changed

clash-cores/src/Clash/Cores/I2C/ByteMaster.hs

+22-24
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ import Clash.Cores.I2C.Types
1414
import Data.Maybe (fromJust)
1515

1616
data ByteStateMachine = Idle | Active | Start | Read | Write | Ack | Stop
17-
deriving (Show, Generic, NFDataX)
17+
deriving (Show, Generic, NFDataX, Eq)
1818

1919
data I2COperation = ReadData | WriteData (BitVector 8)
2020
deriving (Generic, NFDataX)
@@ -29,10 +29,8 @@ data ByteMasterS
2929
, _coreTxd :: Bit -- coreTxd register
3030
, _shiftsr :: Bool -- shift sr
3131
, _ld :: Bool -- load values in to sr
32-
, _i2cOpAck :: Bool -- host cmd acknowlegde register
33-
, _slaveAck :: Bool -- slave ack register
3432
}
35-
deriving (Generic, NFDataX)
33+
deriving (Generic, NFDataX, Eq)
3634

3735
makeLenses ''ByteMasterS
3836

@@ -78,45 +76,46 @@ byteMasterInit
7876
, _coreTxd = low
7977
, _shiftsr = False
8078
, _ld = False
81-
, _i2cOpAck = False
82-
, _slaveAck = True
8379
}
8480

8581
byteMasterT :: ByteMasterS -> ByteMasterI -> (ByteMasterS, ByteMasterO)
8682
byteMasterT s@(ByteS {_srState = ShiftRegister {..}, ..})
87-
(rst,claimBus,maybeI2COp,ackIn,~(coreAck,al,coreRxd)) = swap $ flip runState s $ do
83+
(rst,claimBus,maybeI2COp,ackRead,~(coreAck,al,coreRxd)) = swap $ flip runState s $ do
8884

8985
-- assign dOut the output of the shift-register
9086
let dout = _sr
9187

9288
cntDone <- zoom srState (shiftRegister rst _ld _shiftsr (bv2v (getWriteData $ fromJust maybeI2COp )) coreRxd)
9389

9490
-- state machine
95-
coreTxd .= head dout
96-
shiftsr .= False
97-
ld .= False
98-
i2cOpAck .= False
91+
coreTxd .= head dout
92+
shiftsr .= False
93+
ld .= False
9994

10095
if rst || al then do
10196
coreCmd .= I2Cnop
10297
coreTxd .= low
10398
byteStateM .= Idle
104-
slaveAck .= True
10599
else case (_byteStateM, maybeI2COp) of
106100
(Idle, _) -> when claimBus $ do
107101
ld .= True
108102
byteStateM .= Start
109103
coreCmd .= I2Cstart
110104
(Active, Just ReadData) -> do
105+
ld .= True
111106
byteStateM .= Read
112107
coreCmd .= I2Cread
113108
(Active, Just (WriteData _)) -> do
114109
ld .= True
115110
byteStateM .= Write
116111
coreCmd .= I2Cwrite
117-
(Active ,Nothing) -> do
118-
byteStateM .= Active
119-
coreCmd .= I2Cnop
112+
(Active ,Nothing) ->
113+
if claimBus then do
114+
byteStateM .= Active
115+
coreCmd .= I2Cnop
116+
else do
117+
byteStateM .= Stop
118+
coreCmd .= I2Cstop
120119
(Start, Nothing) -> when coreAck $ do
121120
byteStateM .= Active
122121
coreCmd .= I2Cnop
@@ -137,7 +136,7 @@ byteMasterT s@(ByteS {_srState = ShiftRegister {..}, ..})
137136

138137
(Read, _) -> when coreAck $ do
139138
shiftsr .= True
140-
coreTxd .= bitCoerce ackIn
139+
coreTxd .= (bitCoerce $ not ackRead)
141140
if cntDone then do
142141
byteStateM .= Ack
143142
coreCmd .= I2Cwrite
@@ -146,26 +145,25 @@ byteMasterT s@(ByteS {_srState = ShiftRegister {..}, ..})
146145

147146
(Ack, _) ->
148147
if coreAck then do
149-
slaveAck .= bitCoerce coreRxd
150-
coreTxd .= high
148+
coreTxd .= high
151149
-- check for stop; Should a STOP command be generated?
152150
if claimBus then do
153151
byteStateM .= Active
154152
coreCmd .= I2Cnop
155-
-- generate command acknowledge signal
156-
i2cOpAck .= True
157153
else do
158154
byteStateM .= Stop
159155
coreCmd .= I2Cstop
160156
else
161-
coreTxd .= bitCoerce ackIn
157+
coreTxd .= (bitCoerce $ not ackRead)
162158

163159
(Stop, _) -> when coreAck $ do
164160
byteStateM .= Idle
165161
coreCmd .= I2Cnop
166-
i2cOpAck .= True
167162

168-
let bitCtrl = (_coreCmd,_coreTxd)
169-
outp = (_i2cOpAck,_slaveAck,v2bv dout,bitCtrl)
163+
let
164+
bitCtrl = (_coreCmd,_coreTxd)
165+
i2cOpAck = (_byteStateM == Ack) && coreAck
166+
ackWrite = i2cOpAck && not (bitCoerce coreRxd)
167+
outp = (i2cOpAck,ackWrite,v2bv dout,bitCtrl)
170168

171169
return outp

clash-cores/src/Clash/Cores/I2C/ByteMaster/ShiftRegister.hs

+1-1
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ data ShiftRegister
1111
= ShiftRegister
1212
{ _sr :: Vec 8 Bit
1313
, _dcnt :: Index 8
14-
} deriving (Generic, NFDataX)
14+
} deriving (Generic, NFDataX, Eq)
1515

1616
makeLenses ''ShiftRegister
1717

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