Missing cache invalidation for custom bit representation files

[kleinreact]

When using a custom bit representation, e.g.,

data T = T0 Bool Bit | T1 (Unsigned 2)

{-# ANN module (DataReprAnn $(liftQ [t|T|]) 3
  [ ConstrRepr 'T0 0b100 0b000 [0b001, 0b010]
  , ConstrRepr 'T1 0b100 0b100 [0b011]
  ]) #-}

and compiling it with clash --verilog CustomBits.hs, then it generates

/* AUTOMATICALLY GENERATED VERILOG-2001 SOURCE CODE.
** GENERATED BY CLASH 1.9.0. DO NOT MODIFY.
*/
`default_nettype none
`timescale 100fs/100fs
module topEntity
    ( // No inputs
      // Outputs
      output wire [2:0] result
    );
  `include "CustomBitsT0.inc"
  assign result = CustomBitsT0(1'b1, 1'b0);
endmodule

with CustomBitsT0.inc containing

function [2:0] CheckT0;
input v1;
input v2;
begin
  CheckT0 = {1'b0,   v2,   v1};
end
endfunction

However, when updating the ConstrRepr of T0 to ConstrRepr 'T0 0b100 0b000 [0b010, 0b001] (i.e., flipping the argument order) and re-running clash --verilog CustomBits.hs, then CustomBitsT0.inc won't be updated.

Re-compilation with -fclash-no-cache is required for the file to be updated correctly. Thanks @christiaanb for pointing this out (#2951 (comment)).