11#include "can_common_declarations.h"
2+ #include "safety.h"
3+
4+ #ifdef STM32H7
5+ // ITCM RAM and DTCM RAM are the fastest for Cortex-M7 core access
6+ __attribute__((section (".axisram" ))) can_buffer (rx_q , CAN_RX_BUFFER_SIZE )
7+ __attribute__((section (".itcmram" ))) can_buffer (tx1_q , CAN_TX_BUFFER_SIZE )
8+ __attribute__((section (".itcmram" ))) can_buffer (tx2_q , CAN_TX_BUFFER_SIZE )
9+ #else
10+ can_buffer (rx_q , CAN_RX_BUFFER_SIZE )
11+ can_buffer (tx1_q , CAN_TX_BUFFER_SIZE )
12+ can_buffer (tx2_q , CAN_TX_BUFFER_SIZE )
13+ #endif
14+ can_buffer (tx3_q , CAN_TX_BUFFER_SIZE )
215
316uint32_t safety_tx_blocked = 0 ;
417uint32_t safety_rx_invalid = 0 ;
@@ -17,25 +30,6 @@ int can_silent = ALL_CAN_SILENT;
1730bool can_loopback = false;
1831
1932// ********************* instantiate queues *********************
20- #define can_buffer (x , size ) \
21- static CANPacket_t elems_##x[size]; \
22- extern can_ring can_##x; \
23- can_ring can_##x = { .w_ptr = 0, .r_ptr = 0, .fifo_size = (size), .elems = (CANPacket_t *)&(elems_##x) };
24-
25- #define CAN_RX_BUFFER_SIZE 4096U
26- #define CAN_TX_BUFFER_SIZE 416U
27-
28- #ifdef STM32H7
29- // ITCM RAM and DTCM RAM are the fastest for Cortex-M7 core access
30- __attribute__((section (".axisram" ))) can_buffer (rx_q , CAN_RX_BUFFER_SIZE )
31- __attribute__((section (".itcmram" ))) can_buffer (tx1_q , CAN_TX_BUFFER_SIZE )
32- __attribute__((section (".itcmram" ))) can_buffer (tx2_q , CAN_TX_BUFFER_SIZE )
33- #else
34- can_buffer (rx_q , CAN_RX_BUFFER_SIZE )
35- can_buffer (tx1_q , CAN_TX_BUFFER_SIZE )
36- can_buffer (tx2_q , CAN_TX_BUFFER_SIZE )
37- #endif
38- can_buffer (tx3_q , CAN_TX_BUFFER_SIZE )
3933
4034// FIXME:
4135// cppcheck-suppress misra-c2012-9.3
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