cppcheck: replace bool 0/1 assignments with false/true (#2409)

* cppcheck: replace bool 0/1 assignments with false/true

* revert pyproject

* update table

* handle 17.3 in a follow up

* lil more

* supress

---------

Co-authored-by: Adeeb Shihadeh <adeebshihadeh@gmail.com>

Author: varshneydevansh

board/drivers/can_common.h

@@ -38,7 +38,7 @@ can_ring *can_queues[PANDA_CAN_CNT] = {&can_tx1_q, &can_tx2_q, &can_tx3_q};
 
 // ********************* interrupt safe queue *********************
 bool can_pop(can_ring *q, CANPacket_t *elem) {
-  bool ret = 0;
+  bool ret = false;
 
   ENTER_CRITICAL();
   if (q->w_ptr != q->r_ptr) {
@@ -48,7 +48,7 @@ bool can_pop(can_ring *q, CANPacket_t *elem) {
     } else {
       q->r_ptr += 1U;
     }
-    ret = 1;
+    ret = true;
   }
   EXIT_CRITICAL();
 

board/drivers/fdcan.h

@@ -170,10 +170,10 @@ void can_rx(uint8_t can_number) {
 
     uint32_t RxFIFO0SA = FDCAN_START_ADDRESS + (can_number * FDCAN_OFFSET);
     CANPacket_t to_push;
-    canfd_fifo *fifo;
+    const canfd_fifo *fifo;
 
     // getting address
-    fifo = (canfd_fifo *)(RxFIFO0SA + (rx_fifo_idx * FDCAN_RX_FIFO_0_EL_SIZE));
+    fifo = (const canfd_fifo *)(RxFIFO0SA + (rx_fifo_idx * FDCAN_RX_FIFO_0_EL_SIZE));
 
     bool canfd_frame = ((fifo->header[1] >> 21) & 0x1U);
     bool brs_frame = ((fifo->header[1] >> 20) & 0x1U);

board/drivers/gpio.h

@@ -9,14 +9,18 @@
 
 #define OUTPUT_TYPE_PUSH_PULL 0U
 #define OUTPUT_TYPE_OPEN_DRAIN 1U
+#define GPIO_PIN_COUNT 16U
 
 void set_gpio_mode(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
-  ENTER_CRITICAL();
-  uint32_t tmp = GPIO->MODER;
-  tmp &= ~(3U << (pin * 2U));
-  tmp |= (mode << (pin * 2U));
-  register_set(&(GPIO->MODER), tmp, 0xFFFFFFFFU);
-  EXIT_CRITICAL();
+  if (pin < GPIO_PIN_COUNT) {
+    ENTER_CRITICAL();
+    uint32_t shift = pin * 2U;
+    uint32_t tmp = GPIO->MODER;
+    tmp &= ~(3UL << shift);
+    tmp |= (mode << shift);
+    register_set(&(GPIO->MODER), tmp, 0xFFFFFFFFU);
+    EXIT_CRITICAL();
+  }
 }
 
 void set_gpio_output(GPIO_TypeDef *GPIO, unsigned int pin, bool enabled) {
@@ -51,12 +55,15 @@ void set_gpio_alternate(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode)
 }
 
 void set_gpio_pullup(GPIO_TypeDef *GPIO, unsigned int pin, unsigned int mode) {
-  ENTER_CRITICAL();
-  uint32_t tmp = GPIO->PUPDR;
-  tmp &= ~(3U << (pin * 2U));
-  tmp |= (mode << (pin * 2U));
-  register_set(&(GPIO->PUPDR), tmp, 0xFFFFFFFFU);
-  EXIT_CRITICAL();
+  if (pin < GPIO_PIN_COUNT) {
+    ENTER_CRITICAL();
+    uint32_t shift = pin * 2U;
+    uint32_t tmp = GPIO->PUPDR;
+    tmp &= ~(3UL << shift);
+    tmp |= (mode << shift);
+    register_set(&(GPIO->PUPDR), tmp, 0xFFFFFFFFU);
+    EXIT_CRITICAL();
+  }
 }
 
 int get_gpio_input(const GPIO_TypeDef *GPIO, unsigned int pin) {

board/drivers/spi.h

@@ -34,7 +34,7 @@ uint16_t spi_error_count = 0;
 // low level SPI prototypes
 void llspi_init(void);
 void llspi_mosi_dma(uint8_t *addr, int len);
-void llspi_miso_dma(uint8_t *addr, int len);
+void llspi_miso_dma(const uint8_t *addr, int len);
 
 static uint8_t spi_state = SPI_STATE_HEADER;
 static uint16_t spi_data_len_mosi;

board/stm32h7/llspi.h

@@ -1,4 +1,5 @@
 // master -> panda DMA start
+// cppcheck-suppress constParameterPointer ; RX DMA writes through addr after return
 void llspi_mosi_dma(uint8_t *addr, int len) {
   // disable DMA + SPI
   register_clear_bits(&(SPI4->CFG1), SPI_CFG1_RXDMAEN);
@@ -26,7 +27,7 @@ void llspi_mosi_dma(uint8_t *addr, int len) {
 }
 
 // panda -> master DMA start
-void llspi_miso_dma(uint8_t *addr, int len) {
+void llspi_miso_dma(const uint8_t *addr, int len) {
   // disable DMA + SPI
   DMA2_Stream3->CR &= ~DMA_SxCR_EN;
   register_clear_bits(&(SPI4->CFG1), SPI_CFG1_TXDMAEN);