@@ -308,6 +308,36 @@ All rights reserved. License: 2-clause BSD
308308Release Notes
309309-------------
310310
311+ ## Release 39 ("Buenos Aires")
312+
313+ * Switch to Proto2 Hardware
314+ * banking through zp addresses 0 and 1
315+ * modified I/O layout
316+ * modified VIA GPIO layout
317+ * support for 4 controllers
318+ * I2C bus with SMC and RTC/NVRAM
319+ * Features
320+ * implemented VIA timers [Natt Akuma]
321+ * added option to disable sound [Jimmy Dansbo]
322+ * added support for Delete, Insert, End, PgUp and PgDn keys [Stefan B Jakobsson]
323+ * debugger scroll up & down description [Matas Lesinskas]
324+ * added anti-aliasing to VERA PSG waveforms [TaleTN]
325+ * Bugs
326+ * fixed sending only one mouse update per frame [Elektron72]
327+ * fixed VSYNC timing [Elektron72]
328+ * switched front and back porches [Elektron72]
329+ * fixed LOAD/SAVE hypercall so debugger doesn't break [Stephen Horn]
330+ * fixed YM2151 frequency from 4MHz ->3.579545MHz [Stephen Horn]
331+ * do not set compositor bypass hint for SDL Window [Stephen Horn]
332+ * reset timing after exiting debugger [Elektron72]
333+ * don't write nvram after every frame
334+ * fixed write outside of line buffer [Stephen Horn]
335+ * fixed BRA extra CPU cycle [LRFLEW]
336+ * fix: clear layer line once layer is disabled
337+ * fixed BBSx/BBRx timing [Natt Akuma]
338+ * Other
339+ * misc speed optimizations [Stephen Horn]
340+
311341## Release 38 ("Kyoto")
312342
313343* CPU
@@ -333,7 +363,6 @@ Release Notes
333363 * zero page register display in debugger [Mike Allison]
334364 * Various WebAssembly improvements and fixes [Sebastian Voges]
335365
336-
337366### Release 37 ("Geneva")
338367
339368* VERA 0.9 register layout [ Frank van den Hoef]
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