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reduce to 3 phase protocol
1 parent 8768b5d commit c465da5

1 file changed

Lines changed: 9 additions & 6 deletions

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runtime/src/utils/buffer/paged/append.rs

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -798,8 +798,11 @@ impl<B: Blob> Append<B> {
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///
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/// Since larger valid lengths are authoritative, a shorter CRC cannot simply be written next to
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/// the old CRC. We first stage the shorter slot with length 0, then make its length durable,
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/// then invalidate the old longer slot. A crash during any phase recovers either the old longer
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/// page or the new shorter page, but never loses the whole page or fabricates a larger length.
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/// then invalidate the old longer slot by clearing its CRC bytes. Once that invalidation is
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/// durable, the old slot cannot validate under the CRC model used throughout this layer, even
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/// though its length bytes remain present. A crash during any phase recovers either the old
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/// longer page or the new shorter page, but never loses the whole page or fabricates a larger
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/// length.
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async fn sync_partial_page_shrink(
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blob: &B,
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page: u64,
@@ -840,17 +843,17 @@ impl<B: Blob> Append<B> {
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};
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let len_size = std::mem::size_of::<u16>();
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let crc_size = CHECKSUM_SLOT_SIZE - len_size;
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// Clear CRC bytes before length bytes. If this write is torn, recovery either sees the old
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// valid CRC or an invalid old slot. After the following sync, the new shorter slot is the
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// only valid slot, so zeroing the old length is unnecessary.
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blob.write_at(
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crc_start + old_slot_start as u64 + len_size as u64,
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vec![0u8; crc_size],
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)
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.await?;
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blob.sync().await?;
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blob.write_at(crc_start + old_slot_start as u64, vec![0u8; len_size])
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.await?;
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blob.sync().await?;
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let final_record = if new_slot_start == 0 {
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Checksum {
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len1: new_len,

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