Skip to content

Commit d7a4460

Browse files
committed
Update README
1 parent 5f57b0c commit d7a4460

File tree

1 file changed

+23
-1
lines changed

1 file changed

+23
-1
lines changed

README.md

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
## Introduction
44

5-
This is a Python package for PAST, a tool developed by [Louis-Noel Pouchet](https://sourceforge.net/projects/pocc/files/?source=navbar) as part of the PoCC project. The package provides Python bindings using **pybind11**.
5+
This is a Python package for [PAST](https://sourceforge.net/projects/pocc/files/1.6/release/modules/), a tool developed by Louis-Noel Pouchet as part of the [PoCC project](https://sourceforge.net/projects/pocc/files/?source=navbar). The package provides Python bindings using **pybind11**.
66

77
Pre-built wheels are automatically released, making installation easy!
88

@@ -31,3 +31,25 @@ def test_gemm():
3131
prog_b = "gemm/acc-inter.c"
3232
out_var = "C"
3333
past.verify(prog_a, prog_b, out_var, debug=False, verbose=True)
34+
```
35+
36+
## Publications
37+
Please refer to the [FPGA'24 paper](https://dl.acm.org/doi/10.1145/3626202.3637563) for more details on formal verification of source-to-source HLS transformations.
38+
```bibtex
39+
@inproceedings{pouchet2024formal,
40+
author = {Pouchet, Louis-No\"{e}l and Tucker, Emily and Zhang, Niansong and Chen, Hongzheng and Pal, Debjit and Rodr\'{\i}guez, Gabriel and Zhang, Zhiru},
41+
title = {Formal Verification of Source-to-Source Transformations for HLS},
42+
year = {2024},
43+
isbn = {9798400704185},
44+
publisher = {Association for Computing Machinery},
45+
address = {New York, NY, USA},
46+
url = {https://doi.org/10.1145/3626202.3637563},
47+
doi = {10.1145/3626202.3637563},
48+
booktitle = {Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays},
49+
pages = {97–107},
50+
numpages = {11},
51+
keywords = {formal verification, high-level synthesis, program equivalence},
52+
location = {Monterey, CA, USA},
53+
series = {FPGA '24}
54+
}
55+
```

0 commit comments

Comments
 (0)