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2 files changed +18
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// Define board type for pin map and default settings.
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- // #define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
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+ #define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
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//#define CPU_MAP_C3D_REMIX // Cohesion3D Remix (NXP LPC1769 MCU)
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- #define CPU_MAP_C3D_MINI // Cohesion3D Mini (NXP LPC1769 MCU)
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+ // #define CPU_MAP_C3D_MINI // Cohesion3D Mini (NXP LPC1769 MCU)
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//#define CPU_MAP_MKS_SBASE // MKS SBASE Board (NXP LPC1768 MCU)
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//#define CPU_MAP_AZTEEG_X5 // Azteeg X5 Board (NXP LPC1769 MCU)
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#define A_LIMIT_BIT 29 // reuse p1.29 from Z-MAX
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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+ // Define spindle enable and spindle direction output pins.
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+ #define SPINDLE_ENABLE_DDR NotUsed
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+ #define SPINDLE_ENABLE_PORT NotUsed
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+ #define SPINDLE_ENABLE_BIT 30 // P1.30
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+ #define SPINDLE_DIRECTION_DDR LPC_GPIO1->FIODIR
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+ #define SPINDLE_DIRECTION_PORT LPC_GPIO1->FIOPIN
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+ #define SPINDLE_DIRECTION_BIT 31 // P1.31
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+
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define A_LIMIT_BIT 27 // reuse p1.27, as X-MAX is not used
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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+ // Define spindle enable and spindle direction output pins.
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+ #define SPINDLE_ENABLE_DDR LPC_GPIO1->FIODIR
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+ #define SPINDLE_ENABLE_PORT LPC_GPIO1->FIOPIN
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+ #define SPINDLE_ENABLE_BIT 30 // P1.30
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+ #define SPINDLE_DIRECTION_DDR LPC_GPIO1->FIODIR
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+ #define SPINDLE_DIRECTION_PORT LPC_GPIO1->FIOPIN
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+ #define SPINDLE_DIRECTION_BIT 31 // P1.31
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
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#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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