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Set coolant pins for all supported boards in cpu-map.h
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-37
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2 files changed

+41
-37
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grbl/config.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,8 @@
3232

3333

3434
// Define board type for pin map and default settings.
35-
//#define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
36-
#define CPU_MAP_C3D_REMIX // Cohesion3D Remix (NXP LPC1769 MCU)
35+
#define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
36+
//#define CPU_MAP_C3D_REMIX // Cohesion3D Remix (NXP LPC1769 MCU)
3737
//#define CPU_MAP_C3D_MINI // Cohesion3D Mini (NXP LPC1769 MCU)
3838
//#define CPU_MAP_MKS_SBASE // MKS SBASE Board (NXP LPC1768 MCU)
3939
//#define CPU_MAP_AZTEEG_X5 // Azteeg X5 Board (NXP LPC1769 MCU)
@@ -196,7 +196,7 @@
196196
// defined at (http://corexy.com/theory.html). Motors are assumed to positioned and wired exactly as
197197
// described, if not, motions may move in strange directions. Grbl requires the CoreXY A and B motors
198198
// have the same steps per mm internally.
199-
#define COREXY // Default disabled. Uncomment to enable.
199+
//#define COREXY // Default disabled. Uncomment to enable.
200200

201201
// Inverts pin logic of the control command pins based on a mask. This essentially means you can use
202202
// normally-closed switches on the specified pins, rather than the default normally-open switches.

grbl/cpu_map.h

+38-34
Original file line numberDiff line numberDiff line change
@@ -195,12 +195,13 @@
195195
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
196196

197197
// Define flood and mist coolant enable output pins.
198-
#define COOLANT_FLOOD_DDR NotUsed
199-
#define COOLANT_FLOOD_PORT NotUsed
200-
#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
201-
#define COOLANT_MIST_DDR NotUsed
202-
#define COOLANT_MIST_PORT NotUsed
203-
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
198+
#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
199+
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
200+
#define COOLANT_FLOOD_BIT 4 // SMALL MOSFET Q8 (P2.4)
201+
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
202+
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
203+
#define COOLANT_MIST_BIT 6 // SMALL MOSFET Q9 (P2.6)
204+
#define ENABLE_M7 // enables COOLANT MIST
204205

205206
// Define user-control controls (cycle start, reset, feed hold) input pins.
206207
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
@@ -229,7 +230,7 @@
229230
// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
230231
// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
231232
// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
232-
#define SPINDLE_PWM_CHANNEL PWM1_CH6
233+
#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BIG MOSFET Q6 (P2.5)
233234
#define SPINDLE_PWM_USE_PRIMARY_PIN false
234235
#define SPINDLE_PWM_USE_SECONDARY_PIN true
235236

@@ -302,10 +303,10 @@
302303
#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
303304
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
304305
#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
305-
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
306-
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
307-
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
308-
#define ENABLE_M7 // enables COOLANT MIST
306+
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
307+
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
308+
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
309+
#define ENABLE_M7 // enables COOLANT MIST
309310

310311
// Define user-control controls (cycle start, reset, feed hold) input pins.
311312
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
@@ -334,7 +335,7 @@
334335
// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
335336
// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
336337
// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
337-
#define SPINDLE_PWM_CHANNEL PWM1_CH6
338+
#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
338339
#define SPINDLE_PWM_USE_PRIMARY_PIN false
339340
#define SPINDLE_PWM_USE_SECONDARY_PIN true
340341

@@ -400,10 +401,11 @@
400401
// Define flood and mist coolant enable output pins.
401402
#define COOLANT_FLOOD_DDR NotUsed
402403
#define COOLANT_FLOOD_PORT NotUsed
403-
#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
404-
#define COOLANT_MIST_DDR NotUsed
405-
#define COOLANT_MIST_PORT NotUsed
406-
#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
404+
#define COOLANT_FLOOD_BIT 6 // not available
405+
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
406+
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
407+
#define COOLANT_MIST_BIT 7 // MOSFET 2 (P2.7)
408+
#define ENABLE_M7 // enables COOLANT MIST
407409

408410
// Define user-control controls (cycle start, reset, feed hold) input pins.
409411
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
@@ -432,7 +434,7 @@
432434
// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
433435
// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
434436
// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
435-
#define SPINDLE_PWM_CHANNEL PWM1_CH6
437+
#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
436438
#define SPINDLE_PWM_USE_PRIMARY_PIN false
437439
#define SPINDLE_PWM_USE_SECONDARY_PIN true
438440

@@ -496,12 +498,13 @@
496498
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
497499

498500
// Define flood and mist coolant enable output pins.
499-
#define COOLANT_FLOOD_DDR NotUsed
500-
#define COOLANT_FLOOD_PORT NotUsed
501-
#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
502-
#define COOLANT_MIST_DDR NotUsed
503-
#define COOLANT_MIST_PORT NotUsed
504-
#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
501+
#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
502+
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
503+
#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
504+
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
505+
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
506+
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
507+
#define ENABLE_M7 // enables COOLANT MIST
505508

506509
// Define user-control controls (cycle start, reset, feed hold) input pins.
507510
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
@@ -600,13 +603,14 @@
600603
#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
601604

602605
// Define flood and mist coolant enable output pins.
603-
#define COOLANT_FLOOD_DDR NotUsed
604-
#define COOLANT_FLOOD_PORT NotUsed
605-
#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
606-
#define COOLANT_MIST_DDR NotUsed
607-
#define COOLANT_MIST_PORT NotUsed
608-
#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
609-
606+
#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
607+
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
608+
#define COOLANT_FLOOD_BIT 4 // FAN MOSFET (P2.4)
609+
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
610+
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
611+
#define COOLANT_MIST_BIT 7 // BED MOSFET (P2.7)
612+
#define ENABLE_M7 // enables COOLANT MIST
613+
610614
// Define user-control controls (cycle start, reset, feed hold) input pins.
611615
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
612616
#define CONTROL_DDR NotUsed
@@ -631,10 +635,10 @@
631635

632636
// The LPC17xx has 6 PWM channels. Each channel has 2 pins. It can drive both pins simultaneously to the same value.
633637
//
634-
// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6 PWM1_CH7 PWM1_CH8
635-
// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26 ? ?
636-
// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7
637-
#define SPINDLE_PWM_CHANNEL PWM1_CH8
638+
// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
639+
// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
640+
// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
641+
#define SPINDLE_PWM_CHANNEL PWM1_CH6 // use Hotend MOSFET (P2.5)
638642
#define SPINDLE_PWM_USE_PRIMARY_PIN false
639643
#define SPINDLE_PWM_USE_SECONDARY_PIN true
640644

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