|
1 | 1 | # Runtime reconfigurable pifo hardware |
2 | 2 |
|
3 | 3 | ```bash |
4 | | -sbt "runMain rio.sim.BasicPifoSim" |
| 4 | +sbt "runMain rio.sim.PifoMeshSim" |
5 | 5 | ``` |
6 | 6 |
|
| 7 | +This contains a PifoMesh Implementation. Current implementation assumes the insert input to be a `PacketToken = engineId ## flowId`. The `PacketToken` will be processed in PifoEngine in the following process: |
| 8 | + |
| 9 | +### Enqueue Path |
| 10 | + |
| 11 | +``` |
| 12 | + ┌─────────────────────┐ |
| 13 | + │ PacketToken │-───────────────────┐ |
| 14 | + │ engineId ## flowId │ │ |
| 15 | + └──────────┬──────────┘ │ |
| 16 | + │ │ |
| 17 | + ▼ │ |
| 18 | + ┌─────────────────────────────┐ │ |
| 19 | + │ EnqueueMapper │-───────────┤ |
| 20 | + │ flowId → vPifoId │ │ |
| 21 | + └──────────┬──────────────────┘ │ |
| 22 | + │ vPifoId │ |
| 23 | + ▼ │ |
| 24 | + ┌─────────────────────────────┐ │ |
| 25 | + │ Brain │ │ |
| 26 | + │ {engineId, vPifo, Flow} │ │ |
| 27 | + │ → Rank │ │ |
| 28 | + └──────────┬──────────────────┘ │ |
| 29 | + │ Rank │ |
| 30 | + ▼ ▼ |
| 31 | + ┌──────────────────────────────────────────────┐ |
| 32 | + │ PIFO.insert │ |
| 33 | + │ { vPifo=vPifoId, rank=Rank, data=Token } │ |
| 34 | + └──────────────────────────────────────────────┘ |
| 35 | +``` |
| 36 | + |
| 37 | +### Dequeue Path |
| 38 | + |
| 39 | +``` |
| 40 | + ┌─────────────────────┐ |
| 41 | + │ DequeueRequest │ |
| 42 | + │ engineId ## vPifoId│ |
| 43 | + └──────────┬──────────┘ |
| 44 | + │ |
| 45 | + ▼ |
| 46 | + ┌─────────────────────┐ |
| 47 | + │ PIFO.dequeue │ |
| 48 | + │ vPifoId → │ |
| 49 | + │{PacketToken, exist?}│-- if not exist? --> Drop |
| 50 | + └──────────┬──────────┘ |
| 51 | + │ if exist? |
| 52 | + ▼ |
| 53 | + ┌──────────────────────────────┐ |
| 54 | + │ DequeueMapper │ |
| 55 | + │ data (PacketToken) │ |
| 56 | + │ → PacketToken │ |
| 57 | + └──────────┬───────────────────┘ |
| 58 | + │ PacketToken |
| 59 | + ▼ |
| 60 | + ┌──────────────────────────────┐ |
| 61 | + │ Crossbar (xbar) │ |
| 62 | + | case engineId | |
| 63 | + │ Port 0 → Output │ |
| 64 | + │ Other → Other Engines │ |
| 65 | + └──────────────────────────────┘ |
| 66 | +``` |
| 67 | + |
| 68 | +**Note**: For simplicity, `flowId` and `vPifoId` have the same width and use the name `vPifoId` in the code. |
| 69 | + |
| 70 | +## TODO List |
| 71 | + |
| 72 | +- [ ] Support per-PIFO copy, make non-exist pifo pop return an invalid message |
| 73 | +- [ ] Support packet meta data and packet identifier in mesh message and brain |
| 74 | +- [ ] Support configurable brain policy |
| 75 | + - [ ] support configurable rank in WFQ |
| 76 | +- [ ] Hardware controller for insertion and pop |
| 77 | +- [ ] Transactional update of |
| 78 | + |
7 | 79 |
|
8 | 80 |
|
0 commit comments