@@ -65,6 +65,14 @@ _start_gw:
6565 stmia r0 , {r1 , r2 , r3}
6666 @ framebuffers properly set
6767
68+ ldr r3 , = 0xFFFF0830 @ flush (clean & invalidate) entire dcache b9 func
69+ blx r3
70+
71+ mov r3 , # 0
72+ mcr p15 , 0 , r3 , c7 , c5 , 0 @ invalidate I - cache
73+
74+ mov r2 , # 0
75+
6876 ldr r3 , .entry
6977 bx r3
7078
@@ -74,8 +82,18 @@ _start_gw:
7482.entry: .word 0x23F00000
7583
7684_skip_gw:
85+ mov r9 , r0 @ argc
86+ mov r10 , r1 @ argv
87+
88+ ldr r4 , = 0xBEEF
89+ lsl r2 , # 16
90+ lsr r2 , # 16
91+ cmp r2 , r4 @ magic word
92+ movne r9 , # 0
93+
7794 @ Disable caches / mpu
7895 mrc p15 , 0 , r4 , c1 , c0 , 0 @ read control register
96+ bic r4 , #( 1 << 16 ) @ - dtcm disable (mandated by the docs , before you change the dtcm's address)
7997 bic r4 , #( 1 << 12 ) @ - instruction cache disable
8098 bic r4 , #( 1 << 2 ) @ - data cache disable
8199 bic r4 , #( 1 << 0 ) @ - mpu disable
@@ -91,10 +109,10 @@ _skip_gw:
91109 strlt r2 , [ r0 ], # 4
92110 blt .bss_clr
93111
94- @ Flush caches
112+ @ Invalidate caches
95113 mov r5 , # 0
96- mcr p15 , 0 , r5 , c7 , c5 , 0 @ flush I - cache
97- mcr p15 , 0 , r5 , c7 , c6 , 0 @ flush D - cache
114+ mcr p15 , 0 , r5 , c7 , c5 , 0 @ invalidate I - cache
115+ mcr p15 , 0 , r5 , c7 , c6 , 0 @ invalidate D - cache
98116 mcr p15 , 0 , r5 , c7 , c10 , 4 @ drain write buffer
99117
100118 @ Give read/write access to all the memory regions
@@ -144,7 +162,9 @@ _skip_gw:
144162
145163 mov sp , # 0x27000000
146164
147- blx main
148- b _start
165+
166+ mov r0 , r9
167+ mov r1 , r10
168+ b main
149169
150170.pool
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