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Merge branch 'lworld' into JDK-8374954
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‎make/CompileJavaModules.gmk‎

Lines changed: 24 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2014, 2025, Oracle and/or its affiliates. All rights reserved.
2+
# Copyright (c) 2014, 2026, Oracle and/or its affiliates. All rights reserved.
33
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
#
55
# This code is free software; you can redistribute it and/or modify it
@@ -140,25 +140,20 @@ VALUECLASSES_STR := valueclasses
140140
ifneq ($(COMPILER), bootjdk)
141141
MODULE_VALUECLASS_SRC_DIRS := $(call FindModuleValueClassSrcDirs, $(MODULE))
142142
MODULE_VALUECLASS_SOURCEPATH := $(call GetModuleValueClassSrcPath)
143-
144-
# Temporarily compile valueclasses into a separate directory with the form:
145-
# <tempdir>/<module>/<classpath>
146-
# and then copy the class files into:
147-
# <outdir>/<module>/META-INF/preview/<classpath>
148-
# We cannot compile directly into the desired directory because it's the
149-
# compiler which creates the original '<module>/<classpath>/...' hierarchy.
150-
VALUECLASS_OUTPUTDIR := $(SUPPORT_OUTPUTDIR)/$(VALUECLASSES_STR)
151-
PREVIEW_OUTPUTDIR := $(COMPILATION_OUTPUTDIR)/$(MODULE)/META-INF/preview
152-
153143
ifneq ($(MODULE_VALUECLASS_SRC_DIRS),)
144+
# Temporarily compile valueclasses into a separate directory, and then copy
145+
# into the correct "META-INF/preview" path location.
146+
# We cannot compile directly into the desired directory because it's the
147+
# compiler which creates the original '<module>/<classpath>/...' hierarchy.
148+
TEMP_OUTPUTDIR := $(SUPPORT_OUTPUTDIR)/$(VALUECLASSES_STR)
149+
154150
$(eval $(call SetupJavaCompilation, $(MODULE)-$(VALUECLASSES_STR), \
155151
SMALL_JAVA := false, \
156152
MODULE := $(MODULE), \
157153
SRC := $(wildcard $(MODULE_VALUECLASS_SRC_DIRS)), \
158154
INCLUDES := $(JDK_USER_DEFINED_FILTER), \
159155
FAIL_NO_SRC := $(FAIL_NO_SRC), \
160-
BIN := $(VALUECLASS_OUTPUTDIR)/, \
161-
JAR := $(JDK_OUTPUTDIR)/lib/$(VALUECLASSES_STR)/$(MODULE)-$(VALUECLASSES_STR).jar, \
156+
BIN := $(TEMP_OUTPUTDIR)/, \
162157
HEADERS := $(SUPPORT_OUTPUTDIR)/headers, \
163158
DISABLED_WARNINGS := $(DISABLED_WARNINGS_java) preview, \
164159
EXCLUDES := $(EXCLUDES), \
@@ -173,27 +168,24 @@ ifneq ($(COMPILER), bootjdk)
173168
--enable-preview -source $(JDK_SOURCE_TARGET_VERSION), \
174169
))
175170

176-
TARGETS += $($(MODULE)-$(VALUECLASSES_STR))
177-
178-
# Restructure the value class hierarchy from "<module>/<classpath>/..."
179-
# to "<module>/META-INF/preview/<classpath>/..."
180-
# When module patching is removed, this could probably be a move rather than a copy.
181-
182-
# FIXME: The marker file should probably go in modules root dir.
183-
# FIXME: Copying value classes should not also copy marker files.
184-
$(PREVIEW_OUTPUTDIR)/_the.copy_valueclasses.marker: $($(MODULE)-$(VALUECLASSES_STR))
185-
$(call MakeTargetDir)
186-
$(CP) -R $(VALUECLASS_OUTPUTDIR)/$(MODULE)/. $(@D)/
171+
# Don't add '$($(MODULE)-$(VALUECLASSES_STR))' to TARGETS (it's transient).
172+
# The 'valueclasses' target below depends on it, and that's the non-transient
173+
# result we care about.
174+
175+
# Copy compiled output from "$TEMP_OUTPUTDIR/$MODULE/<classpath>/..."
176+
# to "$COMPILATION_OUTPUTDIR/$MODULE/META-INF/preview/<classpath>/...".
177+
MOD_SRC := $(TEMP_OUTPUTDIR)/$(MODULE)
178+
MOD_DST := $(COMPILATION_OUTPUTDIR)/$(MODULE)
179+
180+
# NOTE: We cannot use '$(CP) -R $(MOD_SRC)/*/ ...' to select sub-directories (it
181+
# does not work on MacOS/BSD). Use 'filter-out' to explicitly exclude marker files.
182+
$(MOD_DST)/_the.$(MODULE).valueclasses: $($(MODULE)-$(VALUECLASSES_STR))
183+
$(RM) -r $(@D)/META-INF/preview
184+
$(MKDIR) -p $(@D)/META-INF/preview
185+
$(CP) -R $(filter-out $(MOD_SRC)/_%, $(wildcard $(MOD_SRC)/*)) $(@D)/META-INF/preview
187186
$(TOUCH) $@
188187

189-
TARGETS += $(PREVIEW_OUTPUTDIR)/_the.copy_valueclasses.marker
190-
191-
$(eval $(call SetupCopyFiles, $(MODULE)-copy-valueclass-jar, \
192-
FILES := $(JDK_OUTPUTDIR)/lib/$(VALUECLASSES_STR)/$(MODULE)-$(VALUECLASSES_STR).jar, \
193-
DEST := $(SUPPORT_OUTPUTDIR)/modules_libs/$(MODULE)/$(VALUECLASSES_STR), \
194-
))
195-
196-
TARGETS += $($(MODULE)-copy-valueclass-jar)
188+
TARGETS += $(MOD_DST)/_the.$(MODULE).valueclasses
197189
endif
198190
endif
199191

‎make/hotspot/lib/CompileGtest.gmk‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2016, 2025, Oracle and/or its affiliates. All rights reserved.
2+
# Copyright (c) 2016, 2026, Oracle and/or its affiliates. All rights reserved.
33
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
#
55
# This code is free software; you can redistribute it and/or modify it
@@ -61,7 +61,8 @@ $(eval $(call SetupJdkLibrary, BUILD_GTEST_LIBGTEST, \
6161
INCLUDE_FILES := gtest-all.cc gmock-all.cc, \
6262
DISABLED_WARNINGS_gcc := format-nonliteral maybe-uninitialized undef \
6363
unused-result zero-as-null-pointer-constant, \
64-
DISABLED_WARNINGS_clang := format-nonliteral undef unused-result, \
64+
DISABLED_WARNINGS_clang := format-nonliteral undef unused-result \
65+
zero-as-null-pointer-constant, \
6566
DISABLED_WARNINGS_microsoft := 4530, \
6667
DEFAULT_CFLAGS := false, \
6768
CFLAGS := $(JVM_CFLAGS) \

‎src/hotspot/cpu/aarch64/aarch64.ad‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
//
2-
// Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
2+
// Copyright (c) 2003, 2026, Oracle and/or its affiliates. All rights reserved.
33
// Copyright (c) 2014, 2024, Red Hat, Inc. All rights reserved.
44
// Copyright 2025 Arm Limited and/or its affiliates.
55
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
@@ -3997,6 +3997,16 @@ operand immI_le_4()
39973997
interface(CONST_INTER);
39983998
%}
39993999

4000+
operand immI_4()
4001+
%{
4002+
predicate(n->get_int() == 4);
4003+
match(ConI);
4004+
4005+
op_cost(0);
4006+
format %{ %}
4007+
interface(CONST_INTER);
4008+
%}
4009+
40004010
operand immI_16()
40014011
%{
40024012
predicate(n->get_int() == 16);

‎src/hotspot/cpu/aarch64/gc/g1/g1_aarch64.ad‎

Lines changed: 49 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
//
2-
// Copyright (c) 2024, 2025, Oracle and/or its affiliates. All rights reserved.
2+
// Copyright (c) 2024, 2026, Oracle and/or its affiliates. All rights reserved.
33
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
//
55
// This code is free software; you can redistribute it and/or modify it
@@ -74,48 +74,76 @@ static void write_barrier_post(MacroAssembler* masm,
7474
%}
7575

7676
// TODO 8350865 (same applies to g1StoreLSpecialTwoOops)
77-
// - Can we use an unbound register for src?
7877
// - Do no set/overwrite barrier data here, also handle G1C2BarrierPostNotNull
79-
// - Is the zero-extend really required in all the places?
8078
// - Move this into the .m4?
81-
instruct g1StoreLSpecialOneOop(indirect mem, iRegL_R11 src, immI off, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegPNoSp tmp4, rFlagsReg cr)
79+
instruct g1StoreLSpecialOneOopOff0(indirect mem, iRegLNoSp src, immI0 off, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, rFlagsReg cr)
8280
%{
8381
predicate(UseG1GC);
8482
match(Set mem (StoreLSpecial mem (Binary src off)));
85-
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, USE_KILL src, KILL cr);
83+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
84+
ins_cost(INSN_COST);
85+
format %{ "str $src, $mem\t# g1StoreLSpecialOneOopOff0" %}
86+
ins_encode %{
87+
((MachNode*)this)->set_barrier_data(G1C2BarrierPre | G1C2BarrierPost);
88+
write_barrier_pre(masm, this,
89+
$mem$$Register /* obj */,
90+
$tmp1$$Register /* pre_val */,
91+
$tmp2$$Register /* tmp1 */,
92+
$tmp3$$Register /* tmp2 */,
93+
RegSet::of($mem$$Register, $src$$Register) /* preserve */);
94+
95+
__ str($src$$Register, $mem$$Register);
96+
97+
// Extract the narrow oop field value
98+
__ ubfm($tmp1$$Register, $src$$Register, 0, 31);
99+
__ decode_heap_oop($tmp1$$Register, $tmp1$$Register);
100+
write_barrier_post(masm, this,
101+
$mem$$Register /* store_addr */,
102+
$tmp1$$Register /* new_val */,
103+
$tmp2$$Register /* tmp1 */,
104+
$tmp3$$Register /* tmp2 */);
105+
%}
106+
ins_pipe(istore_reg_mem);
107+
%}
108+
109+
instruct g1StoreLSpecialOneOopOff4(indirect mem, iRegLNoSp src, immI_4 off, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegPNoSp tmp4, rFlagsReg cr)
110+
%{
111+
predicate(UseG1GC);
112+
match(Set mem (StoreLSpecial mem (Binary src off)));
113+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, KILL cr);
86114
ins_cost(INSN_COST);
87-
format %{ "str $src, $mem\t# g1StoreLSpecialOneOop" %}
115+
format %{ "str $src, $mem\t# g1StoreLSpecialOneOopOff4" %}
88116
ins_encode %{
89117
((MachNode*)this)->set_barrier_data(G1C2BarrierPre | G1C2BarrierPost);
90118

91119
// Adjust address to point to narrow oop
92-
__ add($tmp4$$Register, $mem$$Register, $off$$constant);
120+
__ add($tmp4$$Register, $mem$$Register, 4);
93121
write_barrier_pre(masm, this,
94122
$tmp4$$Register /* obj */,
95123
$tmp1$$Register /* pre_val */,
96124
$tmp2$$Register /* tmp1 */,
97-
$tmp3$$Register /* tmp2 */);
125+
$tmp3$$Register /* tmp2 */,
126+
RegSet::of($mem$$Register, $src$$Register, $tmp4$$Register) /* preserve */);
98127

99128
__ str($src$$Register, $mem$$Register);
100129

101-
// Shift long value to extract the narrow oop field value and zero-extend it
102-
__ lsr($src$$Register, $src$$Register, $off$$constant << LogBitsPerByte);
103-
__ ubfm($src$$Register, $src$$Register, 0, 31);
104-
130+
// Shift long value to extract the narrow oop field value
131+
__ lsr($tmp1$$Register, $src$$Register, 32);
132+
__ decode_heap_oop($tmp1$$Register, $tmp1$$Register);
105133
write_barrier_post(masm, this,
106134
$tmp4$$Register /* store_addr */,
107-
$src$$Register /* new_val */,
135+
$tmp1$$Register /* new_val */,
108136
$tmp2$$Register /* tmp1 */,
109137
$tmp3$$Register /* tmp2 */);
110138
%}
111139
ins_pipe(istore_reg_mem);
112140
%}
113141

114-
instruct g1StoreLSpecialTwoOops(indirect mem, iRegL_R11 src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegPNoSp tmp4, rFlagsReg cr)
142+
instruct g1StoreLSpecialTwoOops(indirect mem, iRegLNoSp src, iRegPNoSp tmp1, iRegPNoSp tmp2, iRegPNoSp tmp3, iRegPNoSp tmp4, rFlagsReg cr)
115143
%{
116144
predicate(UseG1GC);
117145
match(Set mem (StoreLSpecial mem src));
118-
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, USE_KILL src, KILL cr);
146+
effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, KILL cr);
119147
ins_cost(INSN_COST);
120148
format %{ "str $src, $mem\t# g1StoreLSpecialTwoOops" %}
121149
ins_encode %{
@@ -140,17 +168,19 @@ instruct g1StoreLSpecialTwoOops(indirect mem, iRegL_R11 src, iRegPNoSp tmp1, iRe
140168

141169
// Zero-extend first narrow oop to long
142170
__ ubfm($tmp1$$Register, $src$$Register, 0, 31);
143-
144-
// Shift long value to extract the second narrow oop field value
145-
__ lsr($src$$Register, $src$$Register, 32);
171+
__ decode_heap_oop($tmp1$$Register, $tmp1$$Register);
146172
write_barrier_post(masm, this,
147173
$mem$$Register /* store_addr */,
148174
$tmp1$$Register /* new_val */,
149175
$tmp2$$Register /* tmp1 */,
150176
$tmp3$$Register /* tmp2 */);
177+
178+
// Shift long value to extract the second narrow oop field value
179+
__ lsr($tmp1$$Register, $src$$Register, 32);
180+
__ decode_heap_oop($tmp1$$Register, $tmp1$$Register);
151181
write_barrier_post(masm, this,
152182
$tmp4$$Register /* store_addr */,
153-
$src$$Register /* new_val */,
183+
$tmp1$$Register /* new_val */,
154184
$tmp2$$Register /* tmp1 */,
155185
$tmp3$$Register /* tmp2 */);
156186
%}

‎src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -7261,17 +7261,17 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
72617261
b(L_notNull);
72627262
bind(L_null);
72637263
// Set null marker to zero to signal that the argument is null.
7264-
// Also set all oop fields to zero to make the GC happy.
7264+
// Also set all fields to zero since the runtime requires a canonical
7265+
// representation of a flat null.
72657266
stream.reset(sig_index, to_index);
72667267
while (stream.next(toReg, bt)) {
7267-
if (sig->at(stream.sig_index())._offset == -1 ||
7268-
bt == T_OBJECT || bt == T_ARRAY) {
7269-
if (toReg->is_stack()) {
7270-
int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7271-
str(zr, Address(sp, st_off));
7272-
} else {
7273-
mov(toReg->as_Register(), zr);
7274-
}
7268+
if (toReg->is_stack()) {
7269+
int st_off = toReg->reg2stack() * VMRegImpl::stack_slot_size;
7270+
str(zr, Address(sp, st_off));
7271+
} else if (toReg->is_FloatRegister()) {
7272+
mov(toReg->as_FloatRegister(), T2S, 0);
7273+
} else {
7274+
mov(toReg->as_Register(), zr);
72757275
}
72767276
}
72777277
bind(L_notNull);

‎src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp‎

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1794,7 +1794,8 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
17941794
// SVC, HVC, or SMC. Make it a NOP.
17951795
__ nop();
17961796

1797-
if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1797+
if (method->needs_clinit_barrier()) {
1798+
assert(VM_Version::supports_fast_class_init_checks(), "sanity");
17981799
Label L_skip_barrier;
17991800
__ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
18001801
__ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
@@ -3055,7 +3056,7 @@ BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(con
30553056
j++;
30563057
}
30573058
assert(j == regs->length(), "missed a field?");
3058-
if (vk->has_nullable_atomic_layout()) {
3059+
if (vk->supports_nullable_layouts()) {
30593060
// Zero the null marker (setting it to 1 would be better but would require an additional register)
30603061
__ strb(zr, Address(r0, vk->null_marker_offset()));
30613062
}
@@ -3067,7 +3068,8 @@ BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(con
30673068
Label not_null;
30683069
__ cbnz(r0, not_null);
30693070

3070-
// Return value is null. Zero oop registers to make the GC happy.
3071+
// Return value is null. Zero all registers because the runtime requires a canonical
3072+
// representation of a flat null.
30713073
j = 1;
30723074
for (int i = 0; i < sig_vk->length(); i++) {
30733075
BasicType bt = sig_vk->at(i)._bt;
@@ -3081,9 +3083,12 @@ BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(con
30813083
}
30823084
continue;
30833085
}
3084-
if (bt == T_OBJECT || bt == T_ARRAY) {
3085-
VMRegPair pair = regs->at(j);
3086-
VMReg r_1 = pair.first();
3086+
3087+
VMRegPair pair = regs->at(j);
3088+
VMReg r_1 = pair.first();
3089+
if (r_1->is_FloatRegister()) {
3090+
__ mov(r_1->as_FloatRegister(), Assembler::T2S, 0);
3091+
} else {
30873092
__ mov(r_1->as_Register(), zr);
30883093
}
30893094
j++;

‎src/hotspot/cpu/aarch64/templateTable_aarch64.cpp‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2003, 2026, Oracle and/or its affiliates. All rights reserved.
33
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
44
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
*
@@ -2395,7 +2395,8 @@ void TemplateTable::resolve_cache_and_index_for_method(int byte_no,
23952395
__ subs(zr, temp, (int) code); // have we resolved this bytecode?
23962396

23972397
// Class initialization barrier for static methods
2398-
if (VM_Version::supports_fast_class_init_checks() && bytecode() == Bytecodes::_invokestatic) {
2398+
if (bytecode() == Bytecodes::_invokestatic) {
2399+
assert(VM_Version::supports_fast_class_init_checks(), "sanity");
23992400
__ br(Assembler::NE, L_clinit_barrier_slow);
24002401
__ ldr(temp, Address(Rcache, in_bytes(ResolvedMethodEntry::method_offset())));
24012402
__ load_method_holder(temp, temp);
@@ -2445,8 +2446,8 @@ void TemplateTable::resolve_cache_and_index_for_field(int byte_no,
24452446
__ subs(zr, temp, (int) code); // have we resolved this bytecode?
24462447

24472448
// Class initialization barrier for static fields
2448-
if (VM_Version::supports_fast_class_init_checks() &&
2449-
(bytecode() == Bytecodes::_getstatic || bytecode() == Bytecodes::_putstatic)) {
2449+
if (bytecode() == Bytecodes::_getstatic || bytecode() == Bytecodes::_putstatic) {
2450+
assert(VM_Version::supports_fast_class_init_checks(), "sanity");
24502451
const Register field_holder = temp;
24512452

24522453
__ br(Assembler::NE, L_clinit_barrier_slow);

‎src/hotspot/cpu/arm/frame_arm.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2008, 2026, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -356,10 +356,10 @@ frame frame::sender_for_interpreter_frame(RegisterMap* map) const {
356356
bool frame::is_interpreted_frame_valid(JavaThread* thread) const {
357357
assert(is_interpreted_frame(), "Not an interpreted frame");
358358
// These are reasonable sanity checks
359-
if (fp() == 0 || (intptr_t(fp()) & (wordSize-1)) != 0) {
359+
if (fp() == nullptr || (intptr_t(fp()) & (wordSize-1)) != 0) {
360360
return false;
361361
}
362-
if (sp() == 0 || (intptr_t(sp()) & (wordSize-1)) != 0) {
362+
if (sp() == nullptr || (intptr_t(sp()) & (wordSize-1)) != 0) {
363363
return false;
364364
}
365365
if (fp() + interpreter_frame_initial_sp_offset < sp()) {

‎src/hotspot/cpu/arm/nativeInst_arm_32.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2008, 2026, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -172,7 +172,7 @@ void NativeMovConstReg::set_data(intptr_t x, address pc) {
172172

173173
address addr = oop_addr != nullptr ? (address)oop_addr : (address)metadata_addr;
174174

175-
if(pc == 0) {
175+
if (pc == nullptr) {
176176
offset = addr - instruction_address() - 8;
177177
} else {
178178
offset = addr - pc - 8;
@@ -228,7 +228,7 @@ void NativeMovConstReg::set_data(intptr_t x, address pc) {
228228

229229
void NativeMovConstReg::set_pc_relative_offset(address addr, address pc) {
230230
int offset;
231-
if (pc == 0) {
231+
if (pc == nullptr) {
232232
offset = addr - instruction_address() - 8;
233233
} else {
234234
offset = addr - pc - 8;

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