test: add validated NAO cases to CUDA CI

Author: GenZeal-Lin

.github/workflows/cuda.yml

@@ -73,6 +73,30 @@ jobs:
           cd tests/13_NAO_multik_GPU
           bash ../integrate/Autotest.sh -n 2 -f CASES_GPU.txt
 
+      - name: Test 02_NAO_Gamma on GPU
+        run: |
+          cd tests/02_NAO_Gamma
+          find . -name INPUT | while read f; do
+              if grep -qE '^[[:space:]]*device[[:space:]]+' "$f"; then
+                  sed -i -E 's/^[[:space:]]*device[[:space:]]+.*/device    gpu/' "$f"
+              else
+                  echo "device    gpu" >> "$f"
+              fi
+          done
+          bash ../integrate/Autotest.sh -n 2 -f CASES_GPU.txt
+
+      - name: Test 03_NAO_multik on GPU
+        run: |
+          cd tests/03_NAO_multik
+          find . -name INPUT | while read f; do
+              if grep -qE '^[[:space:]]*device[[:space:]]+' "$f"; then
+                  sed -i -E 's/^[[:space:]]*device[[:space:]]+.*/device    gpu/' "$f"
+              else
+                  echo "device    gpu" >> "$f"
+              fi
+          done
+          bash ../integrate/Autotest.sh -n 2 -f CASES_GPU.txt
+
       - name: Test 15_rtTDDFT_GPU
         run: |
           cd tests/15_rtTDDFT_GPU

tests/02_NAO_Gamma/CASES_GPU.txt

@@ -0,0 +1,38 @@
+#010_NO_GO_RE_OW
+#011_NO_GO_RE_OW2
+#012_NO_GO_MD_OW
+#013_NO_GO_MD_OW2
+get_pchg
+get_wf_spin2
+md_msst
+md_msst2
+md_out_hk_syns
+md_out_hk_spin2
+relax_bfgs2
+relax_cell
+relax_old_cg
+relax_out_hk
+relax_out_hk_spin2
+scf_afm
+scf_bsse
+scf_elenum
+scf_elenum_spin2
+#scf_FeBiTe
+scf_fm
+scf_force_stress
+scf_in_wf
+#scf_metagga
+scf_ocp_spin2
+scf_out_dm
+scf_out_hk
+scf_out_hk_spin2
+scf_out_hxc
+scf_out_dh
+scf_out_mul
+scf_out_mul_spin2
+scf_out_wf
+#scf_out_wf_spin2
+scf_solvation
+scf_u_spin2
+scf_upf100
+test.sum

tests/03_NAO_multik/CASES_GPU.txt

@@ -0,0 +1,67 @@
+scf_pp_upf1
+scf_pp_upf201
+scf_pp_sg15
+scf_pp_gth
+scf_angle_spin4
+scf_u_spin1
+scf_u_spin2
+scf_u_spin4
+#scf_u_ramp
+scf_vdw3abc
+scf_solvation
+scf_eadd
+scf_eadd_spin2
+scf_eminus
+scf_eminus_spin2
+scf_bspline
+scf_0atoms
+#scf_symm_prec
+scf_smallg_spin1
+scf_smallg_spin2
+scf_in_dmr_GaAs
+scf_in_dmr_Si
+scf_in_restart
+#scf_in_dmr_Si_spin2_hasbug
+#scf_in_hr_hasbug
+scf_out_dos_spin2
+scf_out_wf
+scf_out_chg_pot1
+#scf_out_chg_tau
+scf_out_pot3
+scf_out_dmr_dmk
+scf_out_hsk
+scf_out_hsk_binary
+scf_out_hsr
+scf_out_hsr_binary_spin2
+#scf_out_hsr_spin4
+scf_out_dh_t
+scf_out_dos_spin4
+scf_out_mul
+scf_out_mul_spin2
+scf_out_mul_spin4
+scf_out_mul_nupdw
+scf_out_elf
+scf_out_qo
+nscf_out_dos
+nscf_out_band_pband
+nscf_out_pot1
+nscf_out_mul
+#nscf_out_hsr_tr_rr
+relax_bfgs2
+relax_old_cg
+relax_cell
+relax_cell_vdw2
+relax_cell_vdw3
+relax_cell_vdw3bj
+#relax_cell_vdw4_d4
+#relax_cell_vdw4_d4s
+md_nvt
+md_msst
+md_out_wf
+md_out_syns
+md_chg_extra
+get_wf
+get_wf0
+get_pchg
+get_pchg_k
+get_s