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MarekPietarlubos
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applications: nrf_desktop: Add nRF54LM20B support
Change introduces support for nRF54LM20B. The SoC supports the same set of configurations as nRF54LM20A. Jira: NCSDK-38388 Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
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applications/nrf_desktop/board_configuration.rst

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@@ -169,7 +169,7 @@ Sample mouse or keyboard (``nrf54l15dk/nrf54l15/cpuapp``)
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* The board supports the ``debug`` :ref:`nrf_desktop_bluetooth_guide_fast_pair` configuration that acts as a mouse (``fast_pair`` file suffix).
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The configuration uses the MCUboot bootloader built in the direct-xip mode (``MCUBOOT+XIP``), and supports firmware updates using the :ref:`nrf_desktop_dfu` and :ref:`nrf_desktop_dfu_mcumgr`.
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Sample mouse (``nrf54lm20dk/nrf54lm20a/cpuapp``)
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Sample mouse (``nrf54lm20dk/nrf54lm20a/cpuapp``, ``nrf54lm20dk/nrf54lm20b/cpuapp``)
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* The configuration uses the nRF54LM20 DK.
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* The build types allow to build the application as a mouse.
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* Inputs are simulated based on the hardware button presses.

applications/nrf_desktop/bootloader_dfu.rst

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@@ -203,11 +203,11 @@ The application image is always built for the RAM address space in only one vari
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.. caution::
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The RAM load mode of the MCUboot bootloader is not officially supported in |NCS|.
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However, the mode is available in the |NCS| as the support for this feature has been developed as part of the Zephyr RTOS project.
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This feature is only used in a limited context for the ``nrf54lm20dk/nrf54lm20a/cpuapp`` board target configuration to improve performance.
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This feature is only used in a limited context for the nRF54LM20 DK to improve performance.
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You can use the RAM load mode of the MCUboot bootloader to speed up the code execution for the application image, as code execution from the RAM is generally faster than from the NVM.
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This can improve the device performance during the activities that require high CPU usage.
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As an example, the nRF Desktop application uses the RAM load mode for the ``nrf54lm20dk/nrf54lm20a/cpuapp`` board target to improve the HID report rate over USB.
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As an example, the nRF Desktop application uses the RAM load mode for the nRF54LM20 DK to improve the HID report rate over USB.
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To set the MCUboot mode of operations to the RAM load mode, enable the :kconfig:option:`SB_CONFIG_MCUBOOT_MODE_RAM_LOAD` Kconfig option in the sysbuild configuration.
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = <0x0 DT_SIZE_K(2036)>;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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/* Disable pwmleds and redefine them to align configuration with CAF LEDs requirements. */
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/delete-node/ pwmleds;
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pwmleds0 {
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compatible = "pwm-leds";
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status = "okay";
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pwm_led0: led_pwm_0 {
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status = "okay";
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pwms = <&pwm20 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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label = "LED System State";
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};
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};
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pwmleds1 {
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compatible = "pwm-leds";
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status = "okay";
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pwm_led1: led_pwm_1 {
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status = "okay";
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pwms = <&pwm21 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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label = "LED Conn State";
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};
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};
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};
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&pwm20 {
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status = "okay";
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pinctrl-0 = <&pwm20_default_alt>;
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pinctrl-1 = <&pwm20_sleep_alt>;
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pinctrl-names = "default", "sleep";
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};
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&pwm21 {
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status = "okay";
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pinctrl-0 = <&pwm21_default_alt>;
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pinctrl-1 = <&pwm21_sleep_alt>;
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pinctrl-names = "default", "sleep";
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};
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&pinctrl {
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pwm20_default_alt: pwm20_default_alt {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 22)>;
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};
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};
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pwm20_sleep_alt: pwm20_sleep_alt {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 22)>;
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low-power-enable;
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};
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};
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pwm21_default_alt: pwm21_default_alt {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 25)>;
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};
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};
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pwm21_sleep_alt: pwm21_sleep_alt {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 25)>;
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low-power-enable;
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};
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};
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = <0x0 DT_SIZE_K(2036)>;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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#include "memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place the retained memory region that
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* is shared with the MCUboot bootloader image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = <0x0 DT_SIZE_K(2036)>;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/* For nRF54L, watchdog status is disabled by default. Needs to be enabled in DTS overlay. */
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&wdt31 {
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status = "okay";
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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#include "memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place the retained memory region that
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* is shared with the MCUboot bootloader image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/* For nRF54L, watchdog status is disabled by default. Needs to be enabled in DTS overlay. */
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&wdt31 {
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status = "okay";
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <caf/gpio_pins.h>
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/* This configuration file is included only once from button module and holds
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* information about pins forming keyboard matrix.
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*/
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/* This structure enforces the header file is included only once in the build.
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* Violating this requirement triggers a multiple definition error at link time.
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*/
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const struct {} buttons_def_include_once;
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static const struct gpio_pin col[] = {};
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static const struct gpio_pin row[] = {
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{ .port = 1, .pin = DT_GPIO_PIN(DT_NODELABEL(button0), gpios) },
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{ .port = 1, .pin = DT_GPIO_PIN(DT_NODELABEL(button1), gpios) },
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{ .port = 1, .pin = DT_GPIO_PIN(DT_NODELABEL(button2), gpios) },
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{ .port = 0, .pin = DT_GPIO_PIN(DT_NODELABEL(button3), gpios) },
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};
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/*
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* Copyright (c) 2026 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <caf/click_detector.h>
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/* This configuration file is included only once from click_detector module
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* and holds information about click detector configuration.
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*/
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/* This structure enforces the header file is included only once in the build.
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* Violating this requirement triggers a multiple definition error at link time.
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*/
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const struct {} click_detector_def_include_once;
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static const struct click_detector_config click_detector_config[] = {
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#if CONFIG_DESKTOP_BLE_PEER_CONTROL
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{
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.key_id = CONFIG_DESKTOP_BLE_PEER_CONTROL_BUTTON,
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.consume_button_event = false,
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},
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#endif /* CONFIG_DESKTOP_BLE_PEER_CONTROL */
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};

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