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khushal1996khushal1996
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Add CPUID for AvxVnniInt8 and AvxVnniInt16
1 parent 2adab65 commit 141d643

16 files changed

+398
-117
lines changed

‎src/coreclr/inc/clrconfigvalues.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -725,6 +725,8 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI_VL, W("EnableAVX512V
725725
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1, W("EnableAVX10v1"), 1, "Allows AVX10v1+ hardware intrinsics to be disabled")
726726
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v2, W("EnableAVX10v2"), 0, "Allows AVX10v2+ hardware intrinsics to be disabled")
727727
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled")
728+
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNIINT8, W("EnableAVXVNNIINT8"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled")
729+
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNIINT16, W("EnableAVXVNNIINT16"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled")
728730
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled")
729731
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled")
730732
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableFMA, W("EnableFMA"), 1, "Allows FMA+ hardware intrinsics to be disabled")

‎src/coreclr/inc/corinfoinstructionset.h

Lines changed: 124 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -94,34 +94,40 @@ enum CORINFO_InstructionSet
9494
InstructionSet_GFNI=44,
9595
InstructionSet_GFNI_V256=45,
9696
InstructionSet_GFNI_V512=46,
97-
InstructionSet_X86Base_X64=47,
98-
InstructionSet_SSE_X64=48,
99-
InstructionSet_SSE2_X64=49,
100-
InstructionSet_SSE3_X64=50,
101-
InstructionSet_SSSE3_X64=51,
102-
InstructionSet_SSE41_X64=52,
103-
InstructionSet_SSE42_X64=53,
104-
InstructionSet_AVX_X64=54,
105-
InstructionSet_AVX2_X64=55,
106-
InstructionSet_AES_X64=56,
107-
InstructionSet_BMI1_X64=57,
108-
InstructionSet_BMI2_X64=58,
109-
InstructionSet_FMA_X64=59,
110-
InstructionSet_LZCNT_X64=60,
111-
InstructionSet_PCLMULQDQ_X64=61,
112-
InstructionSet_POPCNT_X64=62,
113-
InstructionSet_AVXVNNI_X64=63,
114-
InstructionSet_X86Serialize_X64=64,
115-
InstructionSet_AVX512F_X64=65,
116-
InstructionSet_AVX512BW_X64=66,
117-
InstructionSet_AVX512CD_X64=67,
118-
InstructionSet_AVX512DQ_X64=68,
119-
InstructionSet_AVX512VBMI_X64=69,
120-
InstructionSet_AVX10v1_X64=70,
121-
InstructionSet_AVX10v1_V512_X64=71,
122-
InstructionSet_AVX10v2_X64=72,
123-
InstructionSet_AVX10v2_V512_X64=73,
124-
InstructionSet_GFNI_X64=74,
97+
InstructionSet_AVXVNNIINT8=47,
98+
InstructionSet_AVXVNNIINT8_V512=48,
99+
InstructionSet_AVXVNNIINT16=49,
100+
InstructionSet_AVXVNNIINT16_V512=50,
101+
InstructionSet_X86Base_X64=51,
102+
InstructionSet_SSE_X64=52,
103+
InstructionSet_SSE2_X64=53,
104+
InstructionSet_SSE3_X64=54,
105+
InstructionSet_SSSE3_X64=55,
106+
InstructionSet_SSE41_X64=56,
107+
InstructionSet_SSE42_X64=57,
108+
InstructionSet_AVX_X64=58,
109+
InstructionSet_AVX2_X64=59,
110+
InstructionSet_AES_X64=60,
111+
InstructionSet_BMI1_X64=61,
112+
InstructionSet_BMI2_X64=62,
113+
InstructionSet_FMA_X64=63,
114+
InstructionSet_LZCNT_X64=64,
115+
InstructionSet_PCLMULQDQ_X64=65,
116+
InstructionSet_POPCNT_X64=66,
117+
InstructionSet_AVXVNNI_X64=67,
118+
InstructionSet_X86Serialize_X64=68,
119+
InstructionSet_AVX512F_X64=69,
120+
InstructionSet_AVX512BW_X64=70,
121+
InstructionSet_AVX512CD_X64=71,
122+
InstructionSet_AVX512DQ_X64=72,
123+
InstructionSet_AVX512VBMI_X64=73,
124+
InstructionSet_AVX10v1_X64=74,
125+
InstructionSet_AVX10v1_V512_X64=75,
126+
InstructionSet_AVX10v2_X64=76,
127+
InstructionSet_AVX10v2_V512_X64=77,
128+
InstructionSet_GFNI_X64=78,
129+
InstructionSet_AVXVNNIINT8_X64=79,
130+
InstructionSet_AVXVNNIINT16_X64=80,
125131
#endif // TARGET_AMD64
126132
#ifdef TARGET_X86
127133
InstructionSet_X86Base=1,
@@ -170,34 +176,40 @@ enum CORINFO_InstructionSet
170176
InstructionSet_GFNI=44,
171177
InstructionSet_GFNI_V256=45,
172178
InstructionSet_GFNI_V512=46,
173-
InstructionSet_X86Base_X64=47,
174-
InstructionSet_SSE_X64=48,
175-
InstructionSet_SSE2_X64=49,
176-
InstructionSet_SSE3_X64=50,
177-
InstructionSet_SSSE3_X64=51,
178-
InstructionSet_SSE41_X64=52,
179-
InstructionSet_SSE42_X64=53,
180-
InstructionSet_AVX_X64=54,
181-
InstructionSet_AVX2_X64=55,
182-
InstructionSet_AES_X64=56,
183-
InstructionSet_BMI1_X64=57,
184-
InstructionSet_BMI2_X64=58,
185-
InstructionSet_FMA_X64=59,
186-
InstructionSet_LZCNT_X64=60,
187-
InstructionSet_PCLMULQDQ_X64=61,
188-
InstructionSet_POPCNT_X64=62,
189-
InstructionSet_AVXVNNI_X64=63,
190-
InstructionSet_X86Serialize_X64=64,
191-
InstructionSet_AVX512F_X64=65,
192-
InstructionSet_AVX512BW_X64=66,
193-
InstructionSet_AVX512CD_X64=67,
194-
InstructionSet_AVX512DQ_X64=68,
195-
InstructionSet_AVX512VBMI_X64=69,
196-
InstructionSet_AVX10v1_X64=70,
197-
InstructionSet_AVX10v1_V512_X64=71,
198-
InstructionSet_AVX10v2_X64=72,
199-
InstructionSet_AVX10v2_V512_X64=73,
200-
InstructionSet_GFNI_X64=74,
179+
InstructionSet_AVXVNNIINT8=47,
180+
InstructionSet_AVXVNNIINT8_V512=48,
181+
InstructionSet_AVXVNNIINT16=49,
182+
InstructionSet_AVXVNNIINT16_V512=50,
183+
InstructionSet_X86Base_X64=51,
184+
InstructionSet_SSE_X64=52,
185+
InstructionSet_SSE2_X64=53,
186+
InstructionSet_SSE3_X64=54,
187+
InstructionSet_SSSE3_X64=55,
188+
InstructionSet_SSE41_X64=56,
189+
InstructionSet_SSE42_X64=57,
190+
InstructionSet_AVX_X64=58,
191+
InstructionSet_AVX2_X64=59,
192+
InstructionSet_AES_X64=60,
193+
InstructionSet_BMI1_X64=61,
194+
InstructionSet_BMI2_X64=62,
195+
InstructionSet_FMA_X64=63,
196+
InstructionSet_LZCNT_X64=64,
197+
InstructionSet_PCLMULQDQ_X64=65,
198+
InstructionSet_POPCNT_X64=66,
199+
InstructionSet_AVXVNNI_X64=67,
200+
InstructionSet_X86Serialize_X64=68,
201+
InstructionSet_AVX512F_X64=69,
202+
InstructionSet_AVX512BW_X64=70,
203+
InstructionSet_AVX512CD_X64=71,
204+
InstructionSet_AVX512DQ_X64=72,
205+
InstructionSet_AVX512VBMI_X64=73,
206+
InstructionSet_AVX10v1_X64=74,
207+
InstructionSet_AVX10v1_V512_X64=75,
208+
InstructionSet_AVX10v2_X64=76,
209+
InstructionSet_AVX10v2_V512_X64=77,
210+
InstructionSet_GFNI_X64=78,
211+
InstructionSet_AVXVNNIINT8_X64=79,
212+
InstructionSet_AVXVNNIINT16_X64=80,
201213
#endif // TARGET_X86
202214

203215
};
@@ -371,6 +383,10 @@ struct CORINFO_InstructionSetFlags
371383
AddInstructionSet(InstructionSet_AVX10v2_V512_X64);
372384
if (HasInstructionSet(InstructionSet_GFNI))
373385
AddInstructionSet(InstructionSet_GFNI_X64);
386+
if (HasInstructionSet(InstructionSet_AVXVNNIINT8))
387+
AddInstructionSet(InstructionSet_AVXVNNIINT8_X64);
388+
if (HasInstructionSet(InstructionSet_AVXVNNIINT16))
389+
AddInstructionSet(InstructionSet_AVXVNNIINT16_X64);
374390
#endif // TARGET_AMD64
375391
#ifdef TARGET_X86
376392
#endif // TARGET_X86
@@ -569,6 +585,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
569585
resultflags.RemoveInstructionSet(InstructionSet_GFNI);
570586
if (resultflags.HasInstructionSet(InstructionSet_GFNI_X64) && !resultflags.HasInstructionSet(InstructionSet_GFNI))
571587
resultflags.RemoveInstructionSet(InstructionSet_GFNI_X64);
588+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_X64))
589+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8);
590+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_X64) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
591+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8_X64);
592+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_X64))
593+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16);
594+
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_X64) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
595+
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16_X64);
572596
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
573597
resultflags.RemoveInstructionSet(InstructionSet_SSE);
574598
if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
@@ -683,6 +707,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
683707
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
684708
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512))
685709
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
710+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
711+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
712+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
713+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
714+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_V512))
715+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
716+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_V512))
717+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
686718
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
687719
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
688720
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
@@ -811,6 +843,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
811843
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
812844
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512))
813845
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
846+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
847+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
848+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
849+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
850+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_V512))
851+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
852+
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_V512))
853+
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
814854
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
815855
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
816856
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
@@ -1047,6 +1087,18 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
10471087
return "GFNI_V256";
10481088
case InstructionSet_GFNI_V512 :
10491089
return "GFNI_V512";
1090+
case InstructionSet_AVXVNNIINT8 :
1091+
return "AVXVNNIINT8";
1092+
case InstructionSet_AVXVNNIINT8_X64 :
1093+
return "AVXVNNIINT8_X64";
1094+
case InstructionSet_AVXVNNIINT8_V512 :
1095+
return "AVXVNNIINT8_V512";
1096+
case InstructionSet_AVXVNNIINT16 :
1097+
return "AVXVNNIINT16";
1098+
case InstructionSet_AVXVNNIINT16_X64 :
1099+
return "AVXVNNIINT16_X64";
1100+
case InstructionSet_AVXVNNIINT16_V512 :
1101+
return "AVXVNNIINT16_V512";
10501102
#endif // TARGET_AMD64
10511103
#ifdef TARGET_X86
10521104
case InstructionSet_X86Base :
@@ -1141,6 +1193,14 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
11411193
return "GFNI_V256";
11421194
case InstructionSet_GFNI_V512 :
11431195
return "GFNI_V512";
1196+
case InstructionSet_AVXVNNIINT8 :
1197+
return "AVXVNNIINT8";
1198+
case InstructionSet_AVXVNNIINT8_V512 :
1199+
return "AVXVNNIINT8_V512";
1200+
case InstructionSet_AVXVNNIINT16 :
1201+
return "AVXVNNIINT16";
1202+
case InstructionSet_AVXVNNIINT16_V512 :
1203+
return "AVXVNNIINT16_V512";
11441204
#endif // TARGET_X86
11451205

11461206
default:
@@ -1224,6 +1284,10 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
12241284
case READYTORUN_INSTRUCTION_Gfni: return InstructionSet_GFNI;
12251285
case READYTORUN_INSTRUCTION_Gfni_V256: return InstructionSet_GFNI_V256;
12261286
case READYTORUN_INSTRUCTION_Gfni_V512: return InstructionSet_GFNI_V512;
1287+
case READYTORUN_INSTRUCTION_AvxVnniInt8: return InstructionSet_AVXVNNIINT8;
1288+
case READYTORUN_INSTRUCTION_AvxVnniInt8_V512: return InstructionSet_AVXVNNIINT8_V512;
1289+
case READYTORUN_INSTRUCTION_AvxVnniInt16: return InstructionSet_AVXVNNIINT16;
1290+
case READYTORUN_INSTRUCTION_AvxVnniInt16_V512: return InstructionSet_AVXVNNIINT16_V512;
12271291
#endif // TARGET_AMD64
12281292
#ifdef TARGET_X86
12291293
case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
@@ -1269,6 +1333,10 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
12691333
case READYTORUN_INSTRUCTION_Gfni: return InstructionSet_GFNI;
12701334
case READYTORUN_INSTRUCTION_Gfni_V256: return InstructionSet_GFNI_V256;
12711335
case READYTORUN_INSTRUCTION_Gfni_V512: return InstructionSet_GFNI_V512;
1336+
case READYTORUN_INSTRUCTION_AvxVnniInt8: return InstructionSet_AVXVNNIINT8;
1337+
case READYTORUN_INSTRUCTION_AvxVnniInt8_V512: return InstructionSet_AVXVNNIINT8_V512;
1338+
case READYTORUN_INSTRUCTION_AvxVnniInt16: return InstructionSet_AVXVNNIINT16;
1339+
case READYTORUN_INSTRUCTION_AvxVnniInt16_V512: return InstructionSet_AVXVNNIINT16_V512;
12721340
#endif // TARGET_X86
12731341

12741342
default:

‎src/coreclr/inc/jiteeversionguid.h

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -37,11 +37,11 @@
3737

3838
#include <minipal/guid.h>
3939

40-
constexpr GUID JITEEVersionIdentifier = { /* 7139df75-63b2-4610-9a53-f9a86f474db8 */
41-
0x7139df75,
42-
0x63b2,
43-
0x4610,
44-
{0x9a, 0x53, 0xf9, 0xa8, 0x6f, 0x47, 0x4d, 0xb8}
40+
constexpr GUID JITEEVersionIdentifier = { /* 16edf70b-d4d0-44c5-9ebc-a9d6898119a5 */
41+
0x16edf70b,
42+
0xd4d0,
43+
0x44c5,
44+
{0x9e, 0xbc, 0xa9, 0xd6, 0x89, 0x81, 0x19, 0xa5}
4545
};
4646

4747
#endif // JIT_EE_VERSIONING_GUID_H

‎src/coreclr/inc/readytoruninstructionset.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -66,6 +66,10 @@ enum ReadyToRunInstructionSet
6666
READYTORUN_INSTRUCTION_RiscV64Base=56,
6767
READYTORUN_INSTRUCTION_Zba=57,
6868
READYTORUN_INSTRUCTION_Zbb=58,
69+
READYTORUN_INSTRUCTION_AvxVnniInt8=59,
70+
READYTORUN_INSTRUCTION_AvxVnniInt8_V512=60,
71+
READYTORUN_INSTRUCTION_AvxVnniInt16=61,
72+
READYTORUN_INSTRUCTION_AvxVnniInt16_V512=62,
6973

7074
};
7175

‎src/coreclr/jit/hwintrinsic.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -812,6 +812,10 @@ static const HWIntrinsicIsaRange hwintrinsicIsaRangeArray[] = {
812812
{ FIRST_NI_GFNI, LAST_NI_GFNI },
813813
{ FIRST_NI_GFNI_V256, LAST_NI_GFNI_V256 },
814814
{ FIRST_NI_GFNI_V512, LAST_NI_GFNI_V512 },
815+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT8
816+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT8_V512
817+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT16
818+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT16_V512
815819
{ FIRST_NI_X86Base_X64, LAST_NI_X86Base_X64 },
816820
{ FIRST_NI_SSE_X64, LAST_NI_SSE_X64 },
817821
{ FIRST_NI_SSE2_X64, LAST_NI_SSE2_X64 },
@@ -840,6 +844,8 @@ static const HWIntrinsicIsaRange hwintrinsicIsaRangeArray[] = {
840844
{ NI_Illegal, NI_Illegal }, // AVX10v2_X64
841845
{ NI_Illegal, NI_Illegal }, // AVX10v2_V512_X64
842846
{ NI_Illegal, NI_Illegal }, // GFNI_X64
847+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT8_X64
848+
{ NI_Illegal, NI_Illegal }, // AVXVNNIINT16_X64
843849
#elif defined (TARGET_ARM64)
844850
{ FIRST_NI_ArmBase, LAST_NI_ArmBase },
845851
{ FIRST_NI_AdvSimd, LAST_NI_AdvSimd },

‎src/coreclr/jit/jitconfigvalues.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -411,6 +411,8 @@ RELEASE_CONFIG_INTEGER(EnableAVX512VBMI_VL, "EnableAVX512VBMI_VL",
411411
RELEASE_CONFIG_INTEGER(EnableAVX10v1, "EnableAVX10v1", 1) // Allows AVX10v1+ hardware intrinsics to be disabled
412412
RELEASE_CONFIG_INTEGER(EnableAVX10v2, "EnableAVX10v2", 1) // Allows AVX10v2+ hardware intrinsics to be disabled
413413
RELEASE_CONFIG_INTEGER(EnableAVXVNNI, "EnableAVXVNNI", 1) // Allows AVXVNNI+ hardware intrinsics to be disabled
414+
RELEASE_CONFIG_INTEGER(EnableAVXVNNIINT8, "EnableAVXVNNIINT8", 1) // Allows AVXVNNI+ hardware intrinsics to be disabled
415+
RELEASE_CONFIG_INTEGER(EnableAVXVNNIINT16, "EnableAVXVNNIINT16", 1) // Allows AVXVNNI+ hardware intrinsics to be disabled
414416
RELEASE_CONFIG_INTEGER(EnableBMI1, "EnableBMI1", 1) // Allows BMI1+ hardware intrinsics to be disabled
415417
RELEASE_CONFIG_INTEGER(EnableBMI2, "EnableBMI2", 1) // Allows BMI2+ hardware intrinsics to be disabled
416418
RELEASE_CONFIG_INTEGER(EnableFMA, "EnableFMA", 1) // Allows FMA+ hardware intrinsics to be disabled

‎src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,8 @@ private static class XArchIntrinsicConstants
8585
public const int Vpclmulqdq = 0x200000;
8686
public const int Avx10v2 = 0x400000;
8787
public const int Gfni = 0x800000;
88+
public const int AvxVnniInt8 = 0x1000000;
89+
public const int AvxVnniInt16 = 0x2000000;
8890

8991
public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
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{
@@ -154,6 +156,14 @@ public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
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builder.AddSupportedInstructionSet("avx10v2");
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if (((flags & Avx10v2) != 0) && ((flags & Avx512) != 0))
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builder.AddSupportedInstructionSet("avx10v2_v512");
159+
if ((flags & AvxVnniInt8) != 0)
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builder.AddSupportedInstructionSet("avxvnniint8");
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if (((flags & AvxVnniInt8) != 0) && ((flags & Avx512) != 0))
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builder.AddSupportedInstructionSet("avxvnniint8_v512");
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if ((flags & AvxVnniInt16) != 0)
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builder.AddSupportedInstructionSet("avxvnniint16");
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if (((flags & AvxVnniInt16) != 0) && ((flags & Avx512) != 0))
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builder.AddSupportedInstructionSet("avxvnniint16_v512");
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if ((flags & Gfni) != 0)
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{
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builder.AddSupportedInstructionSet("gfni");
@@ -235,6 +245,12 @@ public static int FromInstructionSet(InstructionSet instructionSet)
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InstructionSet.X64_GFNI_X64 => Gfni,
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InstructionSet.X64_GFNI_V256 => (Gfni | Avx),
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InstructionSet.X64_GFNI_V512 => (Gfni | Avx512),
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InstructionSet.X64_AVXVNNIINT8 => AvxVnniInt8,
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InstructionSet.X64_AVXVNNIINT8_X64 => AvxVnniInt8,
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InstructionSet.X64_AVXVNNIINT8_V512 => (AvxVnniInt8 | Avx512),
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InstructionSet.X64_AVXVNNIINT16 => AvxVnniInt16,
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InstructionSet.X64_AVXVNNIINT16_X64 => AvxVnniInt16,
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InstructionSet.X64_AVXVNNIINT16_V512 => (AvxVnniInt16 | Avx512),
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// Baseline ISAs - they're always available
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InstructionSet.X64_SSE => 0,

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