Consider implementing register-specific write barriers for non-x86 platforms

[BruceForstall]

x86 has a write barrier helper for each possible source register. This means we can avoid moving the source register to a different, argument register when generating code for the write barrier, possibly improving register allocation (and maybe reducing callee-saved register usage) and reducing code size.

Consider adding these optimized write barriers for x64, as well as non-xarch platforms.

category:cq
theme:barriers
skill-level:expert
cost:medium