Skip to content

Consider optimizing more intrinsics that have move/copy semantics #40489

Open
@echesakov

Description

@echesakov

The idea of preferential using op1Reg for targetReg for move/copy semantic intrinsics as it done in #40124 should be extended to x86 and more intrinsics on arm64 as pointed out by @CarolEidt and @tannergooding and @kunalspathak

For example, on Arm64 these could be potentially optimized:

  • Vector64/128.GetElement(0)
  • AdvSimd.Extract(vec, 0)
  • AdvSimd.ExtractVector64(upper, lower, 0)
  • AdvSimd.ExtractVector128(upper, lower, 0)

category:cq
theme:vector-codegen
skill-level:intermediate
cost:medium
impact:medium

Metadata

Metadata

Assignees

No one assigned

    Labels

    Priority:3Work that is nice to havearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIoptimization

    Type

    No type

    Projects

    Status

    Backlog (General)

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions